1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/dts-v1/;
3
4#include <dt-bindings/gpio/gpio.h>
5#include <dt-bindings/input/input.h>
6#include <dt-bindings/leds/common.h>
7#include <dt-bindings/regulator/st,stm32mp13-regulator.h>
8#include "stm32mp133.dtsi"
9#include "stm32mp13xc.dtsi"
10#include "stm32mp13-pinctrl.dtsi"
11
12/ {
13	model = "Priva E-Measuringbox board";
14	compatible = "pri,prihmb", "st,stm32mp133";
15
16	aliases {
17		ethernet0 = &ethernet1;
18		mdio-gpio0 = &mdio0;
19		mmc0 = &sdmmc1;
20		mmc1 = &sdmmc2;
21		serial0 = &uart4;
22		serial1 = &usart6;
23		serial2 = &uart7;
24	};
25
26	chosen {
27		stdout-path = "serial0:115200n8";
28	};
29
30	counter-0 {
31		compatible = "interrupt-counter";
32		gpios = <&gpioa 11 GPIO_ACTIVE_HIGH>;
33	};
34
35	gpio-keys {
36		compatible = "gpio-keys";
37		autorepeat;
38
39		button-reset {
40			label = "reset-button";
41			linux,code = <BTN_1>;
42			gpios = <&gpioi 7 GPIO_ACTIVE_LOW>;
43		};
44	};
45
46	leds {
47		compatible = "gpio-leds";
48
49		led-blue {
50			function = LED_FUNCTION_HEARTBEAT;
51			color = <LED_COLOR_ID_BLUE>;
52			gpios = <&gpioa 14 GPIO_ACTIVE_LOW>;
53			linux,default-trigger = "heartbeat";
54			default-state = "off";
55		};
56	};
57
58	led-controller-0 {
59		compatible = "pwm-leds-multicolor";
60
61		multi-led {
62			color = <LED_COLOR_ID_RGB>;
63			function = LED_FUNCTION_STATUS;
64			max-brightness = <255>;
65
66			led-red {
67				active-low;
68				color = <LED_COLOR_ID_RED>;
69				pwms = <&pwm2 2 1000000 1>;
70			};
71
72			led-green {
73				active-low;
74				color = <LED_COLOR_ID_GREEN>;
75				pwms = <&pwm1 1 1000000 1>;
76			};
77
78			led-blue {
79				active-low;
80				color = <LED_COLOR_ID_BLUE>;
81				pwms = <&pwm1 2 1000000 1>;
82			};
83		};
84	};
85
86	led-controller-1 {
87		compatible = "pwm-leds-multicolor";
88
89		multi-led {
90			color = <LED_COLOR_ID_RGB>;
91			function = LED_FUNCTION_STATUS;
92			max-brightness = <255>;
93
94			led-red {
95				active-low;
96				color = <LED_COLOR_ID_RED>;
97				pwms = <&pwm1 0 1000000 1>;
98			};
99
100			led-green {
101				active-low;
102				color = <LED_COLOR_ID_GREEN>;
103				pwms = <&pwm2 0 1000000 1>;
104			};
105
106			led-blue {
107				active-low;
108				color = <LED_COLOR_ID_BLUE>;
109				pwms = <&pwm2 1 1000000 1>;
110			};
111		};
112	};
113
114	/* DP83TD510E PHYs have max MDC rate of 1.75MHz. Since we can't reduce
115	 * stmmac MDC clock without reducing system bus rate, we need to use
116	 * gpio based MDIO bus.
117	 */
118	mdio0: mdio {
119		compatible = "virtual,mdio-gpio";
120		#address-cells = <1>;
121		#size-cells = <0>;
122		gpios = <&gpiog 2 GPIO_ACTIVE_HIGH
123			 &gpioa 2 GPIO_ACTIVE_HIGH>;
124
125		/* TI DP83TD510E */
126		phy0: ethernet-phy@0 {
127			compatible = "ethernet-phy-id2000.0181";
128			reg = <0>;
129			interrupts-extended = <&gpioa 4 IRQ_TYPE_LEVEL_LOW>;
130			reset-gpios = <&gpioa 3 GPIO_ACTIVE_LOW>;
131			reset-assert-us = <10>;
132			reset-deassert-us = <35>;
133		};
134	};
135
136	memory@c0000000 {
137		device_type = "memory";
138		reg = <0xc0000000 0x10000000>;
139	};
140
141	reg_3v3: regulator-3v3 {
142		compatible = "regulator-fixed";
143		regulator-name = "3v3";
144		regulator-min-microvolt = <3300000>;
145		regulator-max-microvolt = <3300000>;
146	};
147
148	reserved-memory {
149		#address-cells = <1>;
150		#size-cells = <1>;
151		ranges;
152
153		optee@ce000000 {
154			reg = <0xce000000 0x02000000>;
155			no-map;
156		};
157	};
158};
159
160&adc_1 {
161	pinctrl-names = "default";
162	pinctrl-0 = <&adc_1_pins_a>;
163	vdda-supply = <&reg_3v3>;
164	vref-supply = <&reg_3v3>;
165	status = "okay";
166};
167
168&adc1 {
169	status = "okay";
170
171	channel@0 { /* Fan current PC0*/
172		reg = <0>;
173		st,min-sample-time-ns = <10000>;  /* 10µs sampling time */
174	};
175	channel@11 { /* Fan voltage */
176		reg = <11>;
177		st,min-sample-time-ns = <10000>;  /* 10µs sampling time */
178	};
179	channel@15 { /* Supply voltage */
180		reg = <15>;
181		st,min-sample-time-ns = <10000>;  /* 10µs sampling time */
182	};
183};
184
185&dts {
186	status = "okay";
187};
188
189&ethernet1 {
190	status = "okay";
191	pinctrl-0 = <&ethernet1_rmii_pins_a>;
192	pinctrl-1 = <&ethernet1_rmii_sleep_pins_a>;
193	pinctrl-names = "default", "sleep";
194	phy-mode = "rmii";
195	phy-handle = <&phy0>;
196};
197
198&i2c1 {
199	pinctrl-names = "default", "sleep";
200	pinctrl-0 = <&i2c1_pins_a>;
201	pinctrl-1 = <&i2c1_sleep_pins_a>;
202	clock-frequency = <100000>;
203	/delete-property/dmas;
204	/delete-property/dma-names;
205	status = "okay";
206
207	board-sensor@48 {
208		compatible = "ti,tmp1075";
209		reg = <0x48>;
210		vs-supply = <&reg_3v3>;
211	};
212};
213
214&{i2c1_pins_a/pins} {
215	pinmux = <STM32_PINMUX('D', 3, AF5)>, /* I2C1_SCL */
216		 <STM32_PINMUX('B', 8, AF4)>; /* I2C1_SDA */
217	bias-disable;
218	drive-open-drain;
219	slew-rate = <0>;
220};
221
222&{i2c1_sleep_pins_a/pins} {
223	pinmux = <STM32_PINMUX('D', 3, ANALOG)>, /* I2C1_SCL */
224		 <STM32_PINMUX('B', 8, ANALOG)>; /* I2C1_SDA */
225};
226
227&iwdg2 {
228	timeout-sec = <32>;
229	status = "okay";
230};
231
232/* SD card without Card-detect */
233&sdmmc1 {
234	pinctrl-names = "default", "opendrain", "sleep";
235	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
236	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
237	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
238	broken-cd;
239	no-sdio;
240	no-1-8-v;
241	st,neg-edge;
242	bus-width = <4>;
243	vmmc-supply = <&reg_3v3>;
244	status = "okay";
245};
246
247/* EMMC */
248&sdmmc2 {
249	pinctrl-names = "default", "opendrain", "sleep";
250	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>;
251	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_d47_pins_a &sdmmc2_clk_pins_a>;
252	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_d47_sleep_pins_a>;
253	non-removable;
254	no-sd;
255	no-sdio;
256	no-1-8-v;
257	st,neg-edge;
258	mmc-ddr-3_3v;
259	bus-width = <8>;
260	vmmc-supply = <&reg_3v3>;
261	status = "okay";
262};
263
264&timers1 {
265	status = "okay";
266	/delete-property/dmas;
267	/delete-property/dma-names;
268
269	pwm1: pwm {
270		pinctrl-0 = <&pwm1_pins_a>;
271		pinctrl-1 = <&pwm1_sleep_pins_a>;
272		pinctrl-names = "default", "sleep";
273		status = "okay";
274	};
275};
276
277&timers4 {
278	status = "okay";
279	/delete-property/dmas;
280	/delete-property/dma-names;
281
282	pwm2: pwm {
283		pinctrl-0 = <&pwm4_pins_a>;
284		pinctrl-1 = <&pwm4_sleep_pins_a>;
285		pinctrl-names = "default", "sleep";
286		status = "okay";
287	};
288};
289
290/* Fan PWM */
291&timers5 {
292	status = "okay";
293
294	pwm3: pwm {
295		pinctrl-0 = <&pwm5_pins_a>;
296		pinctrl-1 = <&pwm5_sleep_pins_a>;
297		pinctrl-names = "default", "sleep";
298		status = "okay";
299	};
300};
301
302&timers2 {
303	status = "okay";
304
305	timer@1 {
306		status = "okay";
307	};
308};
309
310&uart4 {
311	pinctrl-names = "default", "sleep", "idle";
312	pinctrl-0 = <&uart4_pins_a>;
313	pinctrl-1 = <&uart4_sleep_pins_a>;
314	pinctrl-2 = <&uart4_idle_pins_a>;
315	/delete-property/dmas;
316	/delete-property/dma-names;
317	status = "okay";
318};
319
320&uart7 {
321	pinctrl-names = "default", "sleep", "idle";
322	pinctrl-0 = <&uart7_pins_a>;
323	pinctrl-1 = <&uart7_sleep_pins_a>;
324	pinctrl-2 = <&uart7_idle_pins_a>;
325	/delete-property/dmas;
326	/delete-property/dma-names;
327	status = "okay";
328};
329
330&usart6 {
331	pinctrl-names = "default", "sleep", "idle";
332	pinctrl-0 = <&usart6_pins_a>;
333	pinctrl-1 = <&usart6_sleep_pins_a>;
334	pinctrl-2 = <&usart6_idle_pins_a>;
335	linux,rs485-enabled-at-boot-time;
336	/delete-property/dmas;
337	/delete-property/dma-names;
338	status = "okay";
339};
340
341&pinctrl {
342	adc_1_pins_a: adc1-0 {
343		pins {
344			pinmux = <STM32_PINMUX('C', 0, ANALOG)>, /* ADC1 in0 */
345				 <STM32_PINMUX('C', 2, ANALOG)>, /* ADC1 in15 */
346				 <STM32_PINMUX('F', 13, ANALOG)>; /* ADC1 in11 */
347		};
348	};
349
350	ethernet1_rmii_pins_a: rmii-0 {
351		pins1 {
352			pinmux = <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RMII_TXD0 */
353				 <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RMII_TXD1 */
354				 <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RMII_TX_EN */
355				 <STM32_PINMUX('A', 1, AF11)>;   /* ETH1_RMII_REF_CLK */
356			bias-disable;
357			drive-push-pull;
358			slew-rate = <2>;
359		};
360		pins2 {
361			pinmux = <STM32_PINMUX('C', 4, AF11)>,  /* ETH1_RMII_RXD0 */
362				 <STM32_PINMUX('C', 5, AF11)>,  /* ETH1_RMII_RXD1 */
363				 <STM32_PINMUX('A', 7, AF11)>;  /* ETH1_RMII_CRS_DV */
364			bias-disable;
365		};
366	};
367
368	ethernet1_rmii_sleep_pins_a: rmii-sleep-0 {
369		pins1 {
370			pinmux = <STM32_PINMUX('G', 13, ANALOG)>, /* ETH1_RMII_TXD0 */
371				 <STM32_PINMUX('G', 14, ANALOG)>, /* ETH1_RMII_TXD1 */
372				 <STM32_PINMUX('B', 11, ANALOG)>, /* ETH1_RMII_TX_EN */
373				 <STM32_PINMUX('C', 4, ANALOG)>,  /* ETH1_RMII_RXD0 */
374				 <STM32_PINMUX('C', 5, ANALOG)>,  /* ETH1_RMII_RXD1 */
375				 <STM32_PINMUX('A', 1, ANALOG)>,  /* ETH1_RMII_REF_CLK */
376				 <STM32_PINMUX('A', 7, ANALOG)>;  /* ETH1_RMII_CRS_DV */
377		};
378	};
379
380	pwm1_pins_a: pwm1-0 {
381		pins {
382			pinmux = <STM32_PINMUX('E', 9, AF1)>, /* TIM1_CH1 */
383				 <STM32_PINMUX('E', 11, AF1)>, /* TIM1_CH2 */
384				 <STM32_PINMUX('E', 13, AF1)>; /* TIM1_CH3 */
385			bias-pull-down;
386			drive-push-pull;
387			slew-rate = <0>;
388		};
389	};
390
391	pwm1_sleep_pins_a: pwm1-sleep-0 {
392		pins {
393			pinmux = <STM32_PINMUX('E', 9, ANALOG)>, /* TIM1_CH1 */
394				 <STM32_PINMUX('E', 11, ANALOG)>, /* TIM1_CH2 */
395				 <STM32_PINMUX('E', 13, ANALOG)>; /* TIM1_CH3 */
396		};
397	};
398
399	pwm4_pins_a: pwm4-0 {
400		pins {
401			pinmux = <STM32_PINMUX('D', 12, AF2)>, /* TIM4_CH1 */
402				 <STM32_PINMUX('B', 7, AF2)>, /* TIM4_CH2 */
403				 <STM32_PINMUX('D', 14, AF2)>; /* TIM4_CH3 */
404			bias-pull-down;
405			drive-push-pull;
406			slew-rate = <0>;
407		};
408	};
409
410	pwm4_sleep_pins_a: pwm4-sleep-0 {
411		pins {
412			pinmux = <STM32_PINMUX('D', 12, ANALOG)>, /* TIM4_CH1 */
413				 <STM32_PINMUX('B', 7, ANALOG)>, /* TIM4_CH2 */
414				 <STM32_PINMUX('D', 14, ANALOG)>; /* TIM4_CH3 */
415		};
416	};
417	pwm5_pins_a: pwm5-0 {
418		pins {
419			pinmux = <STM32_PINMUX('A', 0, AF2)>; /* TIM5_CH1 */
420		};
421	};
422
423	pwm5_sleep_pins_a: pwm5-sleep-0 {
424		pins {
425			pinmux = <STM32_PINMUX('A', 0, ANALOG)>; /* TIM5_CH1 */
426		};
427	};
428
429	uart7_pins_a: uart7-0 {
430		pins1 {
431			pinmux = <STM32_PINMUX('E', 8, AF7)>; /* UART_TX */
432			bias-disable;
433			drive-push-pull;
434			slew-rate = <0>;
435		};
436		pins2 {
437			pinmux = <STM32_PINMUX('E', 10, AF7)>; /* UART7_RX */
438			bias-pull-up;
439		};
440	};
441
442	uart7_idle_pins_a: uart7-idle-0 {
443		pins1 {
444			pinmux = <STM32_PINMUX('E', 8, ANALOG)>; /* UART7_TX */
445		};
446		pins2 {
447			pinmux = <STM32_PINMUX('E', 10, AF7)>; /* UART7_RX */
448			bias-pull-up;
449		};
450	};
451
452	uart7_sleep_pins_a: uart7-sleep-0 {
453		pins {
454			pinmux = <STM32_PINMUX('E', 8, ANALOG)>, /* UART7_TX */
455				 <STM32_PINMUX('E', 10, ANALOG)>; /* UART7_RX */
456		};
457	};
458
459	usart6_pins_a: usart6-0 {
460		pins1 {
461			pinmux = <STM32_PINMUX('F', 8, AF7)>, /* USART6_TX */
462				 <STM32_PINMUX('F', 10, AF7)>; /* USART6_DE */
463			bias-disable;
464			drive-push-pull;
465			slew-rate = <0>;
466		};
467		pins2 {
468			pinmux = <STM32_PINMUX('H', 11, AF7)>; /* USART6_RX */
469			bias-disable;
470		};
471	};
472
473	usart6_idle_pins_a: usart6-idle-0 {
474		pins1 {
475			pinmux = <STM32_PINMUX('F', 8, ANALOG)>; /* USART6_TX */
476		};
477		pins2 {
478			pinmux = <STM32_PINMUX('F', 10, AF7)>; /* USART6_DE */
479			bias-disable;
480			drive-push-pull;
481			slew-rate = <0>;
482		};
483		pins3 {
484			pinmux = <STM32_PINMUX('H', 11, AF7)>; /* USART6_RX */
485			bias-disable;
486		};
487	};
488
489	usart6_sleep_pins_a: usart6-sleep-0 {
490		pins {
491			pinmux = <STM32_PINMUX('F', 8, ANALOG)>, /* USART6_TX */
492				 <STM32_PINMUX('F', 10, ANALOG)>, /* USART6_DE */
493				 <STM32_PINMUX('H', 11, ANALOG)>; /* USART6_RX */
494		};
495	};
496};
497