1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Support for GalaxyCore GC0310 VGA camera sensor.
4  *
5  * Copyright (c) 2013 Intel Corporation. All Rights Reserved.
6  * Copyright (c) 2023 Hans de Goede <hdegoede@redhat.com>
7  */
8 
9 #include <linux/delay.h>
10 #include <linux/errno.h>
11 #include <linux/gpio/consumer.h>
12 #include <linux/i2c.h>
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/string.h>
17 #include <linux/types.h>
18 
19 #include <media/v4l2-ctrls.h>
20 #include <media/v4l2-device.h>
21 
22 #define GC0310_NATIVE_WIDTH			656
23 #define GC0310_NATIVE_HEIGHT			496
24 
25 #define GC0310_FPS				30
26 #define GC0310_SKIP_FRAMES			3
27 
28 #define GC0310_FOCAL_LENGTH_NUM			278 /* 2.78mm */
29 
30 #define GC0310_ID				0xa310
31 
32 #define GC0310_RESET_RELATED			0xFE
33 #define GC0310_REGISTER_PAGE_0			0x0
34 #define GC0310_REGISTER_PAGE_3			0x3
35 
36 /*
37  * GC0310 System control registers
38  */
39 #define GC0310_SW_STREAM			0x10
40 
41 #define GC0310_SC_CMMN_CHIP_ID_H		0xf0
42 #define GC0310_SC_CMMN_CHIP_ID_L		0xf1
43 
44 #define GC0310_AEC_PK_EXPO_H			0x03
45 #define GC0310_AEC_PK_EXPO_L			0x04
46 #define GC0310_AGC_ADJ				0x48
47 #define GC0310_DGC_ADJ				0x71
48 #define GC0310_GROUP_ACCESS			0x3208
49 
50 #define GC0310_H_CROP_START_H			0x09
51 #define GC0310_H_CROP_START_L			0x0A
52 #define GC0310_V_CROP_START_H			0x0B
53 #define GC0310_V_CROP_START_L			0x0C
54 #define GC0310_H_OUTSIZE_H			0x0F
55 #define GC0310_H_OUTSIZE_L			0x10
56 #define GC0310_V_OUTSIZE_H			0x0D
57 #define GC0310_V_OUTSIZE_L			0x0E
58 #define GC0310_H_BLANKING_H			0x05
59 #define GC0310_H_BLANKING_L			0x06
60 #define GC0310_V_BLANKING_H			0x07
61 #define GC0310_V_BLANKING_L			0x08
62 #define GC0310_SH_DELAY				0x11
63 
64 #define GC0310_START_STREAMING			0x94 /* 8-bit enable */
65 #define GC0310_STOP_STREAMING			0x0 /* 8-bit disable */
66 
67 #define to_gc0310_sensor(x) container_of(x, struct gc0310_device, sd)
68 
69 struct gc0310_device {
70 	struct v4l2_subdev sd;
71 	struct media_pad pad;
72 	/* Protect against concurrent changes to controls */
73 	struct mutex input_lock;
74 	bool is_streaming;
75 
76 	struct gpio_desc *reset;
77 	struct gpio_desc *powerdown;
78 
79 	struct gc0310_mode {
80 		struct v4l2_mbus_framefmt fmt;
81 	} mode;
82 
83 	struct gc0310_ctrls {
84 		struct v4l2_ctrl_handler handler;
85 		struct v4l2_ctrl *exposure;
86 		struct v4l2_ctrl *gain;
87 	} ctrls;
88 };
89 
90 struct gc0310_reg {
91 	u8 reg;
92 	u8 val;
93 };
94 
95 static const struct gc0310_reg gc0310_reset_register[] = {
96 	/* System registers */
97 	{ 0xfe, 0xf0 },
98 	{ 0xfe, 0xf0 },
99 	{ 0xfe, 0x00 },
100 
101 	{ 0xfc, 0x0e }, /* 4e */
102 	{ 0xfc, 0x0e }, /* 16//4e // [0]apwd [6]regf_clk_gate */
103 	{ 0xf2, 0x80 }, /* sync output */
104 	{ 0xf3, 0x00 }, /* 1f//01 data output */
105 	{ 0xf7, 0x33 }, /* f9 */
106 	{ 0xf8, 0x05 }, /* 00 */
107 	{ 0xf9, 0x0e }, /* 0x8e //0f */
108 	{ 0xfa, 0x11 },
109 
110 	/* MIPI */
111 	{ 0xfe, 0x03 },
112 	{ 0x01, 0x03 }, /* mipi 1lane */
113 	{ 0x02, 0x22 }, /* 0x33 */
114 	{ 0x03, 0x94 },
115 	{ 0x04, 0x01 }, /* fifo_prog */
116 	{ 0x05, 0x00 }, /* fifo_prog */
117 	{ 0x06, 0x80 }, /* b0  //YUV ISP data */
118 	{ 0x11, 0x2a }, /* 1e //LDI set YUV422 */
119 	{ 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0] */
120 	{ 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */
121 	{ 0x15, 0x12 }, /* 0x10 //DPHYY_MODE read_ready */
122 	{ 0x17, 0x01 },
123 	{ 0x40, 0x08 },
124 	{ 0x41, 0x00 },
125 	{ 0x42, 0x00 },
126 	{ 0x43, 0x00 },
127 	{ 0x21, 0x02 }, /* 0x01 */
128 	{ 0x22, 0x02 }, /* 0x01 */
129 	{ 0x23, 0x01 }, /* 0x05 //Nor:0x05 DOU:0x06 */
130 	{ 0x29, 0x00 },
131 	{ 0x2A, 0x25 }, /* 0x05 //data zero 0x7a de */
132 	{ 0x2B, 0x02 },
133 
134 	{ 0xfe, 0x00 },
135 
136 	/* CISCTL */
137 	{ 0x00, 0x2f }, /* 2f//0f//02//01 */
138 	{ 0x01, 0x0f }, /* 06 */
139 	{ 0x02, 0x04 },
140 	{ 0x4f, 0x00 }, /* AEC 0FF */
141 	{ 0x03, 0x01 }, /* 0x03 //04 */
142 	{ 0x04, 0xc0 }, /* 0xe8 //58 */
143 	{ 0x05, 0x00 },
144 	{ 0x06, 0xb2 }, /* 0x0a //HB */
145 	{ 0x07, 0x00 },
146 	{ 0x08, 0x0c }, /* 0x89 //VB */
147 	{ 0x09, 0x00 }, /* row start */
148 	{ 0x0a, 0x00 },
149 	{ 0x0b, 0x00 }, /* col start */
150 	{ 0x0c, 0x00 },
151 	{ 0x0d, 0x01 }, /* height */
152 	{ 0x0e, 0xf2 }, /* 0xf7 //height */
153 	{ 0x0f, 0x02 }, /* width */
154 	{ 0x10, 0x94 }, /* 0xa0 //height */
155 	{ 0x17, 0x14 },
156 	{ 0x18, 0x1a }, /* 0a//[4]double reset */
157 	{ 0x19, 0x14 }, /* AD pipeline */
158 	{ 0x1b, 0x48 },
159 	{ 0x1e, 0x6b }, /* 3b//col bias */
160 	{ 0x1f, 0x28 }, /* 20//00//08//txlow */
161 	{ 0x20, 0x89 }, /* 88//0c//[3:2]DA15 */
162 	{ 0x21, 0x49 }, /* 48//[3] txhigh */
163 	{ 0x22, 0xb0 },
164 	{ 0x23, 0x04 }, /* [1:0]vcm_r */
165 	{ 0x24, 0x16 }, /* 15 */
166 	{ 0x34, 0x20 }, /* [6:4] rsg high//range */
167 
168 	/* BLK */
169 	{ 0x26, 0x23 }, /* [1]dark_current_en [0]offset_en */
170 	{ 0x28, 0xff }, /* BLK_limie_value */
171 	{ 0x29, 0x00 }, /* global offset */
172 	{ 0x33, 0x18 }, /* offset_ratio */
173 	{ 0x37, 0x20 }, /* dark_current_ratio */
174 	{ 0x2a, 0x00 },
175 	{ 0x2b, 0x00 },
176 	{ 0x2c, 0x00 },
177 	{ 0x2d, 0x00 },
178 	{ 0x2e, 0x00 },
179 	{ 0x2f, 0x00 },
180 	{ 0x30, 0x00 },
181 	{ 0x31, 0x00 },
182 	{ 0x47, 0x80 }, /* a7 */
183 	{ 0x4e, 0x66 }, /* select_row */
184 	{ 0xa8, 0x02 }, /* win_width_dark, same with crop_win_width */
185 	{ 0xa9, 0x80 },
186 
187 	/* ISP */
188 	{ 0x40, 0x06 }, /* 0xff //ff //48 */
189 	{ 0x41, 0x00 }, /* 0x21 //00//[0]curve_en */
190 	{ 0x42, 0x04 }, /* 0xcf //0a//[1]awn_en */
191 	{ 0x44, 0x18 }, /* 0x18 //02 */
192 	{ 0x46, 0x02 }, /* 0x03 //sync */
193 	{ 0x49, 0x03 },
194 	{ 0x4c, 0x20 }, /* 00[5]pretect exp */
195 	{ 0x50, 0x01 }, /* crop enable */
196 	{ 0x51, 0x00 },
197 	{ 0x52, 0x00 },
198 	{ 0x53, 0x00 },
199 	{ 0x54, 0x01 },
200 	{ 0x55, 0x01 }, /* crop window height */
201 	{ 0x56, 0xf0 },
202 	{ 0x57, 0x02 }, /* crop window width */
203 	{ 0x58, 0x90 },
204 
205 	/* Gain */
206 	{ 0x70, 0x70 }, /* 70 //80//global gain */
207 	{ 0x71, 0x20 }, /* pregain gain */
208 	{ 0x72, 0x40 }, /* post gain */
209 	{ 0x5a, 0x84 }, /* 84//analog gain 0  */
210 	{ 0x5b, 0xc9 }, /* c9 */
211 	{ 0x5c, 0xed }, /* ed//not use pga gain highest level */
212 	{ 0x77, 0x40 }, /* R gain 0x74 //awb gain */
213 	{ 0x78, 0x40 }, /* G gain */
214 	{ 0x79, 0x40 }, /* B gain 0x5f */
215 
216 	{ 0x48, 0x00 },
217 	{ 0xfe, 0x01 },
218 	{ 0x0a, 0x45 }, /* [7]col gain mode */
219 
220 	{ 0x3e, 0x40 },
221 	{ 0x3f, 0x5c },
222 	{ 0x40, 0x7b },
223 	{ 0x41, 0xbd },
224 	{ 0x42, 0xf6 },
225 	{ 0x43, 0x63 },
226 	{ 0x03, 0x60 },
227 	{ 0x44, 0x03 },
228 
229 	/* Dark / Sun mode related */
230 	{ 0xfe, 0x01 },
231 	{ 0x45, 0xa4 }, /* 0xf7 */
232 	{ 0x46, 0xf0 }, /* 0xff //f0//sun value th */
233 	{ 0x48, 0x03 }, /* sun mode */
234 	{ 0x4f, 0x60 }, /* sun_clamp */
235 	{ 0xfe, 0x00 },
236 };
237 
238 static const struct gc0310_reg gc0310_VGA_30fps[] = {
239 	{ 0xfe, 0x00 },
240 	{ 0x0d, 0x01 }, /* height */
241 	{ 0x0e, 0xf2 }, /* 0xf7 //height */
242 	{ 0x0f, 0x02 }, /* width */
243 	{ 0x10, 0x94 }, /* 0xa0 //height */
244 
245 	{ 0x50, 0x01 }, /* crop enable */
246 	{ 0x51, 0x00 },
247 	{ 0x52, 0x00 },
248 	{ 0x53, 0x00 },
249 	{ 0x54, 0x01 },
250 	{ 0x55, 0x01 }, /* crop window height */
251 	{ 0x56, 0xf0 },
252 	{ 0x57, 0x02 }, /* crop window width */
253 	{ 0x58, 0x90 },
254 
255 	{ 0xfe, 0x03 },
256 	{ 0x12, 0x90 }, /* 00 //04 //00 //04//00 //LWC[7:0]  */
257 	{ 0x13, 0x02 }, /* 05 //05 //LWC[15:8] */
258 
259 	{ 0xfe, 0x00 },
260 };
261 
262 /*
263  * gc0310_write_reg_array - Initializes a list of GC0310 registers
264  * @client: i2c driver client structure
265  * @reglist: list of registers to be written
266  * @count: number of register, value pairs in the list
267  */
gc0310_write_reg_array(struct i2c_client * client,const struct gc0310_reg * reglist,int count)268 static int gc0310_write_reg_array(struct i2c_client *client,
269 				  const struct gc0310_reg *reglist, int count)
270 {
271 	int i, err;
272 
273 	for (i = 0; i < count; i++) {
274 		err = i2c_smbus_write_byte_data(client, reglist[i].reg, reglist[i].val);
275 		if (err) {
276 			dev_err(&client->dev, "write error: wrote 0x%x to offset 0x%x error %d",
277 				reglist[i].val, reglist[i].reg, err);
278 			return err;
279 		}
280 	}
281 
282 	return 0;
283 }
284 
gc0310_exposure_set(struct gc0310_device * dev,u32 exp)285 static int gc0310_exposure_set(struct gc0310_device *dev, u32 exp)
286 {
287 	struct i2c_client *client = v4l2_get_subdevdata(&dev->sd);
288 
289 	return i2c_smbus_write_word_swapped(client, GC0310_AEC_PK_EXPO_H, exp);
290 }
291 
gc0310_gain_set(struct gc0310_device * dev,u32 gain)292 static int gc0310_gain_set(struct gc0310_device *dev, u32 gain)
293 {
294 	struct i2c_client *client = v4l2_get_subdevdata(&dev->sd);
295 	u8 again, dgain;
296 	int ret;
297 
298 	/* Taken from original driver, this never sets dgain lower then 32? */
299 
300 	/* Change 0 - 95 to 32 - 127 */
301 	gain += 32;
302 
303 	if (gain < 64) {
304 		again = 0x0; /* sqrt(2) */
305 		dgain = gain;
306 	} else {
307 		again = 0x2; /* 2 * sqrt(2) */
308 		dgain = gain / 2;
309 	}
310 
311 	ret = i2c_smbus_write_byte_data(client, GC0310_AGC_ADJ, again);
312 	if (ret)
313 		return ret;
314 
315 	return i2c_smbus_write_byte_data(client, GC0310_DGC_ADJ, dgain);
316 }
317 
gc0310_s_ctrl(struct v4l2_ctrl * ctrl)318 static int gc0310_s_ctrl(struct v4l2_ctrl *ctrl)
319 {
320 	struct gc0310_device *dev =
321 		container_of(ctrl->handler, struct gc0310_device, ctrls.handler);
322 	int ret;
323 
324 	/* Only apply changes to the controls if the device is powered up */
325 	if (!pm_runtime_get_if_in_use(dev->sd.dev))
326 		return 0;
327 
328 	switch (ctrl->id) {
329 	case V4L2_CID_EXPOSURE:
330 		ret = gc0310_exposure_set(dev, ctrl->val);
331 		break;
332 	case V4L2_CID_GAIN:
333 		ret = gc0310_gain_set(dev, ctrl->val);
334 		break;
335 	default:
336 		ret = -EINVAL;
337 		break;
338 	}
339 
340 	pm_runtime_put(dev->sd.dev);
341 	return ret;
342 }
343 
344 static const struct v4l2_ctrl_ops ctrl_ops = {
345 	.s_ctrl = gc0310_s_ctrl,
346 };
347 
348 static struct v4l2_mbus_framefmt *
gc0310_get_pad_format(struct gc0310_device * dev,struct v4l2_subdev_state * state,unsigned int pad,enum v4l2_subdev_format_whence which)349 gc0310_get_pad_format(struct gc0310_device *dev,
350 		      struct v4l2_subdev_state *state,
351 		      unsigned int pad, enum v4l2_subdev_format_whence which)
352 {
353 	if (which == V4L2_SUBDEV_FORMAT_TRY)
354 		return v4l2_subdev_state_get_format(state, pad);
355 
356 	return &dev->mode.fmt;
357 }
358 
359 /* The GC0310 currently only supports 1 fixed fmt */
gc0310_fill_format(struct v4l2_mbus_framefmt * fmt)360 static void gc0310_fill_format(struct v4l2_mbus_framefmt *fmt)
361 {
362 	memset(fmt, 0, sizeof(*fmt));
363 	fmt->width = GC0310_NATIVE_WIDTH;
364 	fmt->height = GC0310_NATIVE_HEIGHT;
365 	fmt->field = V4L2_FIELD_NONE;
366 	fmt->code = MEDIA_BUS_FMT_SGRBG8_1X8;
367 }
368 
gc0310_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)369 static int gc0310_set_fmt(struct v4l2_subdev *sd,
370 			  struct v4l2_subdev_state *sd_state,
371 			  struct v4l2_subdev_format *format)
372 {
373 	struct gc0310_device *dev = to_gc0310_sensor(sd);
374 	struct v4l2_mbus_framefmt *fmt;
375 
376 	fmt = gc0310_get_pad_format(dev, sd_state, format->pad, format->which);
377 	gc0310_fill_format(fmt);
378 
379 	format->format = *fmt;
380 	return 0;
381 }
382 
gc0310_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_format * format)383 static int gc0310_get_fmt(struct v4l2_subdev *sd,
384 			  struct v4l2_subdev_state *sd_state,
385 			  struct v4l2_subdev_format *format)
386 {
387 	struct gc0310_device *dev = to_gc0310_sensor(sd);
388 	struct v4l2_mbus_framefmt *fmt;
389 
390 	fmt = gc0310_get_pad_format(dev, sd_state, format->pad, format->which);
391 	format->format = *fmt;
392 	return 0;
393 }
394 
gc0310_detect(struct i2c_client * client)395 static int gc0310_detect(struct i2c_client *client)
396 {
397 	struct i2c_adapter *adapter = client->adapter;
398 	int ret;
399 
400 	if (!i2c_check_functionality(adapter, I2C_FUNC_I2C))
401 		return -ENODEV;
402 
403 	ret = pm_runtime_get_sync(&client->dev);
404 	if (ret >= 0)
405 		ret = i2c_smbus_read_word_swapped(client, GC0310_SC_CMMN_CHIP_ID_H);
406 	pm_runtime_put(&client->dev);
407 	if (ret < 0) {
408 		dev_err(&client->dev, "read sensor_id failed: %d\n", ret);
409 		return -ENODEV;
410 	}
411 
412 	dev_dbg(&client->dev, "sensor ID = 0x%x\n", ret);
413 
414 	if (ret != GC0310_ID) {
415 		dev_err(&client->dev, "sensor ID error, read id = 0x%x, target id = 0x%x\n",
416 			ret, GC0310_ID);
417 		return -ENODEV;
418 	}
419 
420 	dev_dbg(&client->dev, "detect gc0310 success\n");
421 
422 	return 0;
423 }
424 
gc0310_s_stream(struct v4l2_subdev * sd,int enable)425 static int gc0310_s_stream(struct v4l2_subdev *sd, int enable)
426 {
427 	struct gc0310_device *dev = to_gc0310_sensor(sd);
428 	struct i2c_client *client = v4l2_get_subdevdata(sd);
429 	int ret = 0;
430 
431 	dev_dbg(&client->dev, "%s S enable=%d\n", __func__, enable);
432 	mutex_lock(&dev->input_lock);
433 
434 	if (enable) {
435 		ret = pm_runtime_get_sync(&client->dev);
436 		if (ret < 0)
437 			goto error_power_down;
438 
439 		msleep(100);
440 
441 		ret = gc0310_write_reg_array(client, gc0310_reset_register,
442 					     ARRAY_SIZE(gc0310_reset_register));
443 		if (ret)
444 			goto error_power_down;
445 
446 		ret = gc0310_write_reg_array(client, gc0310_VGA_30fps,
447 					     ARRAY_SIZE(gc0310_VGA_30fps));
448 		if (ret)
449 			goto error_power_down;
450 
451 		/* restore value of all ctrls */
452 		ret = __v4l2_ctrl_handler_setup(&dev->ctrls.handler);
453 		if (ret)
454 			goto error_power_down;
455 
456 		/* enable per frame MIPI and sensor ctrl reset  */
457 		ret = i2c_smbus_write_byte_data(client, 0xFE, 0x30);
458 		if (ret)
459 			goto error_power_down;
460 	}
461 
462 	ret = i2c_smbus_write_byte_data(client, GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_3);
463 	if (ret)
464 		goto error_power_down;
465 
466 	ret = i2c_smbus_write_byte_data(client, GC0310_SW_STREAM,
467 					enable ? GC0310_START_STREAMING : GC0310_STOP_STREAMING);
468 	if (ret)
469 		goto error_power_down;
470 
471 	ret = i2c_smbus_write_byte_data(client, GC0310_RESET_RELATED, GC0310_REGISTER_PAGE_0);
472 	if (ret)
473 		goto error_power_down;
474 
475 	if (!enable)
476 		pm_runtime_put(&client->dev);
477 
478 	dev->is_streaming = enable;
479 	mutex_unlock(&dev->input_lock);
480 	return 0;
481 
482 error_power_down:
483 	pm_runtime_put(&client->dev);
484 	dev->is_streaming = false;
485 	mutex_unlock(&dev->input_lock);
486 	return ret;
487 }
488 
gc0310_get_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_interval * interval)489 static int gc0310_get_frame_interval(struct v4l2_subdev *sd,
490 				     struct v4l2_subdev_state *sd_state,
491 				     struct v4l2_subdev_frame_interval *interval)
492 {
493 	/*
494 	 * FIXME: Implement support for V4L2_SUBDEV_FORMAT_TRY, using the V4L2
495 	 * subdev active state API.
496 	 */
497 	if (interval->which != V4L2_SUBDEV_FORMAT_ACTIVE)
498 		return -EINVAL;
499 
500 	interval->interval.numerator = 1;
501 	interval->interval.denominator = GC0310_FPS;
502 
503 	return 0;
504 }
505 
gc0310_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_mbus_code_enum * code)506 static int gc0310_enum_mbus_code(struct v4l2_subdev *sd,
507 				 struct v4l2_subdev_state *sd_state,
508 				 struct v4l2_subdev_mbus_code_enum *code)
509 {
510 	/* We support only a single format */
511 	if (code->index)
512 		return -EINVAL;
513 
514 	code->code = MEDIA_BUS_FMT_SGRBG8_1X8;
515 	return 0;
516 }
517 
gc0310_enum_frame_size(struct v4l2_subdev * sd,struct v4l2_subdev_state * sd_state,struct v4l2_subdev_frame_size_enum * fse)518 static int gc0310_enum_frame_size(struct v4l2_subdev *sd,
519 				  struct v4l2_subdev_state *sd_state,
520 				  struct v4l2_subdev_frame_size_enum *fse)
521 {
522 	/* We support only a single resolution */
523 	if (fse->index)
524 		return -EINVAL;
525 
526 	fse->min_width = GC0310_NATIVE_WIDTH;
527 	fse->max_width = GC0310_NATIVE_WIDTH;
528 	fse->min_height = GC0310_NATIVE_HEIGHT;
529 	fse->max_height = GC0310_NATIVE_HEIGHT;
530 
531 	return 0;
532 }
533 
gc0310_g_skip_frames(struct v4l2_subdev * sd,u32 * frames)534 static int gc0310_g_skip_frames(struct v4l2_subdev *sd, u32 *frames)
535 {
536 	*frames = GC0310_SKIP_FRAMES;
537 	return 0;
538 }
539 
540 static const struct v4l2_subdev_sensor_ops gc0310_sensor_ops = {
541 	.g_skip_frames	= gc0310_g_skip_frames,
542 };
543 
544 static const struct v4l2_subdev_video_ops gc0310_video_ops = {
545 	.s_stream = gc0310_s_stream,
546 };
547 
548 static const struct v4l2_subdev_pad_ops gc0310_pad_ops = {
549 	.enum_mbus_code = gc0310_enum_mbus_code,
550 	.enum_frame_size = gc0310_enum_frame_size,
551 	.get_fmt = gc0310_get_fmt,
552 	.set_fmt = gc0310_set_fmt,
553 	.get_frame_interval = gc0310_get_frame_interval,
554 };
555 
556 static const struct v4l2_subdev_ops gc0310_ops = {
557 	.video = &gc0310_video_ops,
558 	.pad = &gc0310_pad_ops,
559 	.sensor = &gc0310_sensor_ops,
560 };
561 
gc0310_init_controls(struct gc0310_device * dev)562 static int gc0310_init_controls(struct gc0310_device *dev)
563 {
564 	struct v4l2_ctrl_handler *hdl = &dev->ctrls.handler;
565 
566 	v4l2_ctrl_handler_init(hdl, 2);
567 
568 	/* Use the same lock for controls as for everything else */
569 	hdl->lock = &dev->input_lock;
570 	dev->sd.ctrl_handler = hdl;
571 
572 	dev->ctrls.exposure =
573 		v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_EXPOSURE, 0, 4095, 1, 1023);
574 
575 	/* 32 steps at base gain 1 + 64 half steps at base gain 2 */
576 	dev->ctrls.gain =
577 		v4l2_ctrl_new_std(hdl, &ctrl_ops, V4L2_CID_GAIN, 0, 95, 1, 31);
578 
579 	return hdl->error;
580 }
581 
gc0310_remove(struct i2c_client * client)582 static void gc0310_remove(struct i2c_client *client)
583 {
584 	struct v4l2_subdev *sd = i2c_get_clientdata(client);
585 	struct gc0310_device *dev = to_gc0310_sensor(sd);
586 
587 	dev_dbg(&client->dev, "gc0310_remove...\n");
588 
589 	v4l2_async_unregister_subdev(sd);
590 	media_entity_cleanup(&dev->sd.entity);
591 	v4l2_ctrl_handler_free(&dev->ctrls.handler);
592 	mutex_destroy(&dev->input_lock);
593 	pm_runtime_disable(&client->dev);
594 }
595 
gc0310_probe(struct i2c_client * client)596 static int gc0310_probe(struct i2c_client *client)
597 {
598 	struct fwnode_handle *ep_fwnode;
599 	struct gc0310_device *dev;
600 	int ret;
601 
602 	/*
603 	 * Sometimes the fwnode graph is initialized by the bridge driver.
604 	 * Bridge drivers doing this may also add GPIO mappings, wait for this.
605 	 */
606 	ep_fwnode = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
607 	if (!ep_fwnode)
608 		return dev_err_probe(&client->dev, -EPROBE_DEFER, "waiting for fwnode graph endpoint\n");
609 
610 	fwnode_handle_put(ep_fwnode);
611 
612 	dev = devm_kzalloc(&client->dev, sizeof(*dev), GFP_KERNEL);
613 	if (!dev)
614 		return -ENOMEM;
615 
616 	dev->reset = devm_gpiod_get(&client->dev, "reset", GPIOD_OUT_HIGH);
617 	if (IS_ERR(dev->reset)) {
618 		return dev_err_probe(&client->dev, PTR_ERR(dev->reset),
619 				     "getting reset GPIO\n");
620 	}
621 
622 	dev->powerdown = devm_gpiod_get(&client->dev, "powerdown", GPIOD_OUT_HIGH);
623 	if (IS_ERR(dev->powerdown)) {
624 		return dev_err_probe(&client->dev, PTR_ERR(dev->powerdown),
625 				     "getting powerdown GPIO\n");
626 	}
627 
628 	mutex_init(&dev->input_lock);
629 	v4l2_i2c_subdev_init(&dev->sd, client, &gc0310_ops);
630 	gc0310_fill_format(&dev->mode.fmt);
631 
632 	pm_runtime_set_suspended(&client->dev);
633 	pm_runtime_enable(&client->dev);
634 	pm_runtime_set_autosuspend_delay(&client->dev, 1000);
635 	pm_runtime_use_autosuspend(&client->dev);
636 
637 	ret = gc0310_detect(client);
638 	if (ret) {
639 		gc0310_remove(client);
640 		return ret;
641 	}
642 
643 	dev->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
644 	dev->pad.flags = MEDIA_PAD_FL_SOURCE;
645 	dev->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
646 
647 	ret = gc0310_init_controls(dev);
648 	if (ret) {
649 		gc0310_remove(client);
650 		return ret;
651 	}
652 
653 	ret = media_entity_pads_init(&dev->sd.entity, 1, &dev->pad);
654 	if (ret) {
655 		gc0310_remove(client);
656 		return ret;
657 	}
658 
659 	ret = v4l2_async_register_subdev_sensor(&dev->sd);
660 	if (ret) {
661 		gc0310_remove(client);
662 		return ret;
663 	}
664 
665 	return 0;
666 }
667 
gc0310_suspend(struct device * dev)668 static int gc0310_suspend(struct device *dev)
669 {
670 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
671 	struct gc0310_device *gc0310_dev = to_gc0310_sensor(sd);
672 
673 	gpiod_set_value_cansleep(gc0310_dev->powerdown, 1);
674 	gpiod_set_value_cansleep(gc0310_dev->reset, 1);
675 	return 0;
676 }
677 
gc0310_resume(struct device * dev)678 static int gc0310_resume(struct device *dev)
679 {
680 	struct v4l2_subdev *sd = dev_get_drvdata(dev);
681 	struct gc0310_device *gc0310_dev = to_gc0310_sensor(sd);
682 
683 	usleep_range(10000, 15000);
684 	gpiod_set_value_cansleep(gc0310_dev->reset, 0);
685 	usleep_range(10000, 15000);
686 	gpiod_set_value_cansleep(gc0310_dev->powerdown, 0);
687 
688 	return 0;
689 }
690 
691 static DEFINE_RUNTIME_DEV_PM_OPS(gc0310_pm_ops, gc0310_suspend, gc0310_resume, NULL);
692 
693 static const struct acpi_device_id gc0310_acpi_match[] = {
694 	{"INT0310"},
695 	{},
696 };
697 MODULE_DEVICE_TABLE(acpi, gc0310_acpi_match);
698 
699 static struct i2c_driver gc0310_driver = {
700 	.driver = {
701 		.name = "gc0310",
702 		.pm = pm_sleep_ptr(&gc0310_pm_ops),
703 		.acpi_match_table = gc0310_acpi_match,
704 	},
705 	.probe = gc0310_probe,
706 	.remove = gc0310_remove,
707 };
708 module_i2c_driver(gc0310_driver);
709 
710 MODULE_AUTHOR("Lai, Angie <angie.lai@intel.com>");
711 MODULE_DESCRIPTION("A low-level driver for GalaxyCore GC0310 sensors");
712 MODULE_LICENSE("GPL");
713