1 /* SPDX-License-Identifier: GPL-2.0 */
2
3 /***************************************************************************
4 * copyright : (C) 2002 by Frank Mori Hess
5 ***************************************************************************/
6
7 #ifndef _GPIB_USER_H
8 #define _GPIB_USER_H
9
10 #define GPIB_MAX_NUM_BOARDS 16
11 #define GPIB_MAX_NUM_DESCRIPTORS 0x1000
12
13 enum ibsta_bit_numbers {
14 DCAS_NUM = 0,
15 DTAS_NUM = 1,
16 LACS_NUM = 2,
17 TACS_NUM = 3,
18 ATN_NUM = 4,
19 CIC_NUM = 5,
20 REM_NUM = 6,
21 LOK_NUM = 7,
22 CMPL_NUM = 8,
23 EVENT_NUM = 9,
24 SPOLL_NUM = 10,
25 RQS_NUM = 11,
26 SRQI_NUM = 12,
27 END_NUM = 13,
28 TIMO_NUM = 14,
29 ERR_NUM = 15
30 };
31
32 /* IBSTA status bits (returned by all functions) */
33 enum ibsta_bits {
34 DCAS = (1 << DCAS_NUM), /* device clear state */
35 DTAS = (1 << DTAS_NUM), /* device trigger state */
36 LACS = (1 << LACS_NUM), /* GPIB interface is addressed as Listener */
37 TACS = (1 << TACS_NUM), /* GPIB interface is addressed as Talker */
38 ATN = (1 << ATN_NUM), /* Attention is asserted */
39 CIC = (1 << CIC_NUM), /* GPIB interface is Controller-in-Charge */
40 REM = (1 << REM_NUM), /* remote state */
41 LOK = (1 << LOK_NUM), /* lockout state */
42 CMPL = (1 << CMPL_NUM), /* I/O is complete */
43 EVENT = (1 << EVENT_NUM), /* DCAS, DTAS, or IFC has occurred */
44 SPOLL = (1 << SPOLL_NUM), /* board serial polled by busmaster */
45 RQS = (1 << RQS_NUM), /* Device requesting service */
46 SRQI = (1 << SRQI_NUM), /* SRQ is asserted */
47 END = (1 << END_NUM), /* EOI or EOS encountered */
48 TIMO = (1 << TIMO_NUM), /* Time limit on I/O or wait function exceeded */
49 ERR = (1 << ERR_NUM), /* Function call terminated on error */
50
51 device_status_mask = ERR | TIMO | END | CMPL | RQS,
52 board_status_mask = ERR | TIMO | END | CMPL | SPOLL |
53 EVENT | LOK | REM | CIC | ATN | TACS | LACS | DTAS | DCAS | SRQI,
54 };
55
56 /* IBERR error codes */
57 enum iberr_code {
58 EDVR = 0, /* system error */
59 ECIC = 1, /* not CIC */
60 ENOL = 2, /* no listeners */
61 EADR = 3, /* CIC and not addressed before I/O */
62 EARG = 4, /* bad argument to function call */
63 ESAC = 5, /* not SAC */
64 EABO = 6, /* I/O operation was aborted */
65 ENEB = 7, /* non-existent board (GPIB interface offline) */
66 EDMA = 8, /* DMA hardware error detected */
67 EOIP = 10, /* new I/O attempted with old I/O in progress */
68 ECAP = 11, /* no capability for intended opeation */
69 EFSO = 12, /* file system operation error */
70 EBUS = 14, /* bus error */
71 ESTB = 15, /* lost serial poll bytes */
72 ESRQ = 16, /* SRQ stuck on */
73 ETAB = 20 /* Table Overflow */
74 };
75
76 /* Timeout values and meanings */
77 enum gpib_timeout {
78 TNONE = 0, /* Infinite timeout (disabled) */
79 T10us = 1, /* Timeout of 10 usec (ideal) */
80 T30us = 2, /* Timeout of 30 usec (ideal) */
81 T100us = 3, /* Timeout of 100 usec (ideal) */
82 T300us = 4, /* Timeout of 300 usec (ideal) */
83 T1ms = 5, /* Timeout of 1 msec (ideal) */
84 T3ms = 6, /* Timeout of 3 msec (ideal) */
85 T10ms = 7, /* Timeout of 10 msec (ideal) */
86 T30ms = 8, /* Timeout of 30 msec (ideal) */
87 T100ms = 9, /* Timeout of 100 msec (ideal) */
88 T300ms = 10, /* Timeout of 300 msec (ideal) */
89 T1s = 11, /* Timeout of 1 sec (ideal) */
90 T3s = 12, /* Timeout of 3 sec (ideal) */
91 T10s = 13, /* Timeout of 10 sec (ideal) */
92 T30s = 14, /* Timeout of 30 sec (ideal) */
93 T100s = 15, /* Timeout of 100 sec (ideal) */
94 T300s = 16, /* Timeout of 300 sec (ideal) */
95 T1000s = 17 /* Timeout of 1000 sec (maximum) */
96 };
97
98 /* End-of-string (EOS) modes for use with ibeos */
99
100 enum eos_flags {
101 EOS_MASK = 0x1c00,
102 REOS = 0x0400, /* Terminate reads on EOS */
103 XEOS = 0x800, /* assert EOI when EOS char is sent */
104 BIN = 0x1000 /* Do 8-bit compare on EOS */
105 };
106
107 /* GPIB Bus Control Lines bit vector */
108 enum bus_control_line {
109 VALID_DAV = 0x01,
110 VALID_NDAC = 0x02,
111 VALID_NRFD = 0x04,
112 VALID_IFC = 0x08,
113 VALID_REN = 0x10,
114 VALID_SRQ = 0x20,
115 VALID_ATN = 0x40,
116 VALID_EOI = 0x80,
117 VALID_ALL = 0xff,
118 BUS_DAV = 0x0100, /* DAV line status bit */
119 BUS_NDAC = 0x0200, /* NDAC line status bit */
120 BUS_NRFD = 0x0400, /* NRFD line status bit */
121 BUS_IFC = 0x0800, /* IFC line status bit */
122 BUS_REN = 0x1000, /* REN line status bit */
123 BUS_SRQ = 0x2000, /* SRQ line status bit */
124 BUS_ATN = 0x4000, /* ATN line status bit */
125 BUS_EOI = 0x8000 /* EOI line status bit */
126 };
127
128 /* Possible GPIB command messages */
129
130 enum cmd_byte {
131 GTL = 0x1, /* go to local */
132 SDC = 0x4, /* selected device clear */
133 PPConfig = 0x5,
134 #ifndef PPC
135 PPC = PPConfig, /* parallel poll configure */
136 #endif
137 GET = 0x8, /* group execute trigger */
138 TCT = 0x9, /* take control */
139 LLO = 0x11, /* local lockout */
140 DCL = 0x14, /* device clear */
141 PPU = 0x15, /* parallel poll unconfigure */
142 SPE = 0x18, /* serial poll enable */
143 SPD = 0x19, /* serial poll disable */
144 CFE = 0x1f, /* configure enable */
145 LAD = 0x20, /* value to be 'ored' in to obtain listen address */
146 UNL = 0x3F, /* unlisten */
147 TAD = 0x40, /* value to be 'ored' in to obtain talk address */
148 UNT = 0x5F, /* untalk */
149 SAD = 0x60, /* my secondary address (base) */
150 PPE = 0x60, /* parallel poll enable (base) */
151 PPD = 0x70 /* parallel poll disable */
152 };
153
154 enum ppe_bits {
155 PPC_DISABLE = 0x10,
156 PPC_SENSE = 0x8, /* parallel poll sense bit */
157 PPC_DIO_MASK = 0x7
158 };
159
160 /* confine address to range 0 to 30. */
gpib_address_restrict(unsigned int addr)161 static inline unsigned int gpib_address_restrict(unsigned int addr)
162 {
163 addr &= 0x1f;
164 if (addr == 0x1f)
165 addr = 0;
166 return addr;
167 }
168
MLA(unsigned int addr)169 static inline uint8_t MLA(unsigned int addr)
170 {
171 return gpib_address_restrict(addr) | LAD;
172 }
173
MTA(unsigned int addr)174 static inline uint8_t MTA(unsigned int addr)
175 {
176 return gpib_address_restrict(addr) | TAD;
177 }
178
MSA(unsigned int addr)179 static inline uint8_t MSA(unsigned int addr)
180 {
181 return gpib_address_restrict(addr) | SAD;
182 }
183
PPE_byte(unsigned int dio_line,int sense)184 static inline uint8_t PPE_byte(unsigned int dio_line, int sense)
185 {
186 uint8_t cmd;
187
188 cmd = PPE;
189 if (sense)
190 cmd |= PPC_SENSE;
191 cmd |= (dio_line - 1) & 0x7;
192 return cmd;
193 }
194
CFGn(unsigned int meters)195 static inline uint8_t CFGn(unsigned int meters)
196 {
197 return 0x6 | (meters & 0xf);
198 }
199
200 /* mask of bits that actually matter in a command byte */
201 enum {
202 gpib_command_mask = 0x7f,
203 };
204
is_PPE(uint8_t command)205 static inline int is_PPE(uint8_t command)
206 {
207 return (command & 0x70) == 0x60;
208 }
209
is_PPD(uint8_t command)210 static inline int is_PPD(uint8_t command)
211 {
212 return (command & 0x70) == 0x70;
213 }
214
in_addressed_command_group(uint8_t command)215 static inline int in_addressed_command_group(uint8_t command)
216 {
217 return (command & 0x70) == 0x0;
218 }
219
in_universal_command_group(uint8_t command)220 static inline int in_universal_command_group(uint8_t command)
221 {
222 return (command & 0x70) == 0x10;
223 }
224
in_listen_address_group(uint8_t command)225 static inline int in_listen_address_group(uint8_t command)
226 {
227 return (command & 0x60) == 0x20;
228 }
229
in_talk_address_group(uint8_t command)230 static inline int in_talk_address_group(uint8_t command)
231 {
232 return (command & 0x60) == 0x40;
233 }
234
in_primary_command_group(uint8_t command)235 static inline int in_primary_command_group(uint8_t command)
236 {
237 return in_addressed_command_group(command) ||
238 in_universal_command_group(command) ||
239 in_listen_address_group(command) ||
240 in_talk_address_group(command);
241 }
242
gpib_address_equal(unsigned int pad1,int sad1,unsigned int pad2,int sad2)243 static inline int gpib_address_equal(unsigned int pad1, int sad1, unsigned int pad2, int sad2)
244 {
245 if (pad1 == pad2) {
246 if (sad1 == sad2)
247 return 1;
248 if (sad1 < 0 && sad2 < 0)
249 return 1;
250 }
251
252 return 0;
253 }
254
255 enum ibask_option {
256 IbaPAD = 0x1,
257 IbaSAD = 0x2,
258 IbaTMO = 0x3,
259 IbaEOT = 0x4,
260 IbaPPC = 0x5, /* board only */
261 IbaREADDR = 0x6, /* device only */
262 IbaAUTOPOLL = 0x7, /* board only */
263 IbaCICPROT = 0x8, /* board only */
264 IbaIRQ = 0x9, /* board only */
265 IbaSC = 0xa, /* board only */
266 IbaSRE = 0xb, /* board only */
267 IbaEOSrd = 0xc,
268 IbaEOSwrt = 0xd,
269 IbaEOScmp = 0xe,
270 IbaEOSchar = 0xf,
271 IbaPP2 = 0x10, /* board only */
272 IbaTIMING = 0x11, /* board only */
273 IbaDMA = 0x12, /* board only */
274 IbaReadAdjust = 0x13,
275 IbaWriteAdjust = 0x14,
276 IbaEventQueue = 0x15, /* board only */
277 IbaSPollBit = 0x16, /* board only */
278 IbaSpollBit = 0x16, /* board only */
279 IbaSendLLO = 0x17, /* board only */
280 IbaSPollTime = 0x18, /* device only */
281 IbaPPollTime = 0x19, /* board only */
282 IbaEndBitIsNormal = 0x1a,
283 IbaUnAddr = 0x1b, /* device only */
284 IbaHSCableLength = 0x1f, /* board only */
285 IbaIst = 0x20, /* board only */
286 IbaRsv = 0x21, /* board only */
287 IbaBNA = 0x200, /* device only */
288 /* linux-gpib extensions */
289 Iba7BitEOS = 0x1000 /* board only. Returns 1 if board supports 7 bit eos compares*/
290 };
291
292 enum ibconfig_option {
293 IbcPAD = 0x1,
294 IbcSAD = 0x2,
295 IbcTMO = 0x3,
296 IbcEOT = 0x4,
297 IbcPPC = 0x5, /* board only */
298 IbcREADDR = 0x6, /* device only */
299 IbcAUTOPOLL = 0x7, /* board only */
300 IbcCICPROT = 0x8, /* board only */
301 IbcIRQ = 0x9, /* board only */
302 IbcSC = 0xa, /* board only */
303 IbcSRE = 0xb, /* board only */
304 IbcEOSrd = 0xc,
305 IbcEOSwrt = 0xd,
306 IbcEOScmp = 0xe,
307 IbcEOSchar = 0xf,
308 IbcPP2 = 0x10, /* board only */
309 IbcTIMING = 0x11, /* board only */
310 IbcDMA = 0x12, /* board only */
311 IbcReadAdjust = 0x13,
312 IbcWriteAdjust = 0x14,
313 IbcEventQueue = 0x15, /* board only */
314 IbcSPollBit = 0x16, /* board only */
315 IbcSpollBit = 0x16, /* board only */
316 IbcSendLLO = 0x17, /* board only */
317 IbcSPollTime = 0x18, /* device only */
318 IbcPPollTime = 0x19, /* board only */
319 IbcEndBitIsNormal = 0x1a,
320 IbcUnAddr = 0x1b, /* device only */
321 IbcHSCableLength = 0x1f, /* board only */
322 IbcIst = 0x20, /* board only */
323 IbcRsv = 0x21, /* board only */
324 IbcBNA = 0x200 /* device only */
325 };
326
327 enum t1_delays {
328 T1_DELAY_2000ns = 1,
329 T1_DELAY_500ns = 2,
330 T1_DELAY_350ns = 3
331 };
332
333 enum {
334 request_service_bit = 0x40,
335 };
336
337 enum gpib_events {
338 EventNone = 0,
339 EventDevTrg = 1,
340 EventDevClr = 2,
341 EventIFC = 3
342 };
343
344 enum gpib_stb {
345 IbStbRQS = 0x40, /* IEEE 488.1 & 2 */
346 IbStbESB = 0x20, /* IEEE 488.2 only */
347 IbStbMAV = 0x10 /* IEEE 488.2 only */
348 };
349
350 #endif /* _GPIB_USER_H */
351
352 /* Check for errors */
353