1 // SPDX-License-Identifier: GPL-2.0
2 
3 /***************************************************************************
4  *   copyright		  : (C) 2001, 2002 by Frank Mori Hess
5  ***************************************************************************/
6 
7 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8 #define dev_fmt pr_fmt
9 
10 #include <linux/ioport.h>
11 #include <linux/sched.h>
12 #include <linux/module.h>
13 #include <linux/slab.h>
14 #include <asm/dma.h>
15 #include <linux/io.h>
16 #include <linux/bitops.h>
17 #include <linux/pci.h>
18 #include <linux/pci_ids.h>
19 #include <linux/string.h>
20 #include <linux/init.h>
21 #include <linux/spinlock.h>
22 #include <linux/delay.h>
23 
24 #include "gpibP.h"
25 #include "tms9914.h"
26 
27 MODULE_LICENSE("GPL");
28 MODULE_DESCRIPTION("GPIB library for tms9914");
29 
30 static unsigned int update_status_nolock(struct gpib_board *board, struct tms9914_priv *priv);
31 
tms9914_take_control(struct gpib_board * board,struct tms9914_priv * priv,int synchronous)32 int tms9914_take_control(struct gpib_board *board, struct tms9914_priv *priv, int synchronous)
33 {
34 	int i;
35 	const int timeout = 100;
36 
37 	if (synchronous)
38 		write_byte(priv, AUX_TCS, AUXCR);
39 	else
40 		write_byte(priv, AUX_TCA, AUXCR);
41 	// busy wait until ATN is asserted
42 	for (i = 0; i < timeout; i++) {
43 		if ((read_byte(priv, ADSR) & HR_ATN))
44 			break;
45 		udelay(1);
46 	}
47 	if (i == timeout)
48 		return -ETIMEDOUT;
49 
50 	clear_bit(WRITE_READY_BN, &priv->state);
51 
52 	return 0;
53 }
54 EXPORT_SYMBOL_GPL(tms9914_take_control);
55 
56 /* The agilent 82350B has a buggy implementation of tcs which interferes with the
57  * operation of tca.  It appears to be based on the controller state machine
58  * described in the TI 9900 TMS9914A data manual published in 1982.  This
59  * manual describes tcs as putting the controller into a CWAS
60  * state where it waits indefinitely for ANRS and ignores tca.	Since a
61  * functioning tca is far more important than tcs, we work around the
62  * problem by never issuing tcs.
63  *
64  * I don't know if this problem exists in the real tms9914a or just in the fpga
65  * of the 82350B.  For now, only the agilent_82350b uses this workaround.
66  * The rest of the tms9914 based drivers still use tms9914_take_control
67  * directly (which does issue tcs).
68  */
tms9914_take_control_workaround(struct gpib_board * board,struct tms9914_priv * priv,int synchronous)69 int tms9914_take_control_workaround(struct gpib_board *board, struct tms9914_priv *priv, int synchronous)
70 {
71 	if (synchronous)
72 		return -ETIMEDOUT;
73 	return tms9914_take_control(board, priv, synchronous);
74 }
75 EXPORT_SYMBOL_GPL(tms9914_take_control_workaround);
76 
tms9914_go_to_standby(struct gpib_board * board,struct tms9914_priv * priv)77 int tms9914_go_to_standby(struct gpib_board *board, struct tms9914_priv *priv)
78 {
79 	int i;
80 	const int timeout = 1000;
81 
82 	write_byte(priv, AUX_GTS, AUXCR);
83 	// busy wait until ATN is released
84 	for (i = 0; i < timeout; i++) {
85 		if ((read_byte(priv, ADSR) & HR_ATN) == 0)
86 			break;
87 		udelay(1);
88 	}
89 	if (i == timeout)
90 		return -ETIMEDOUT;
91 
92 	clear_bit(COMMAND_READY_BN, &priv->state);
93 
94 	return 0;
95 }
96 EXPORT_SYMBOL_GPL(tms9914_go_to_standby);
97 
tms9914_interface_clear(struct gpib_board * board,struct tms9914_priv * priv,int assert)98 void tms9914_interface_clear(struct gpib_board *board, struct tms9914_priv *priv, int assert)
99 {
100 	if (assert) {
101 		write_byte(priv, AUX_SIC | AUX_CS, AUXCR);
102 
103 		set_bit(CIC_NUM, &board->status);
104 	} else {
105 		write_byte(priv, AUX_SIC, AUXCR);
106 	}
107 }
108 EXPORT_SYMBOL_GPL(tms9914_interface_clear);
109 
tms9914_remote_enable(struct gpib_board * board,struct tms9914_priv * priv,int enable)110 void tms9914_remote_enable(struct gpib_board *board, struct tms9914_priv *priv, int enable)
111 {
112 	if (enable)
113 		write_byte(priv, AUX_SRE | AUX_CS, AUXCR);
114 	else
115 		write_byte(priv, AUX_SRE, AUXCR);
116 }
117 EXPORT_SYMBOL_GPL(tms9914_remote_enable);
118 
tms9914_request_system_control(struct gpib_board * board,struct tms9914_priv * priv,int request_control)119 void tms9914_request_system_control(struct gpib_board *board, struct tms9914_priv *priv,
120 				    int request_control)
121 {
122 	if (request_control) {
123 		write_byte(priv, AUX_RQC, AUXCR);
124 	} else {
125 		clear_bit(CIC_NUM, &board->status);
126 		write_byte(priv, AUX_RLC, AUXCR);
127 	}
128 }
129 EXPORT_SYMBOL_GPL(tms9914_request_system_control);
130 
tms9914_t1_delay(struct gpib_board * board,struct tms9914_priv * priv,unsigned int nano_sec)131 unsigned int tms9914_t1_delay(struct gpib_board *board, struct tms9914_priv *priv,
132 			      unsigned int nano_sec)
133 {
134 	static const int clock_period = 200;	// assuming 5Mhz input clock
135 	int num_cycles;
136 
137 	num_cycles = 12;
138 
139 	if (nano_sec <= 8 * clock_period) {
140 		write_byte(priv, AUX_STDL | AUX_CS, AUXCR);
141 		num_cycles = 8;
142 	} else {
143 		write_byte(priv, AUX_STDL, AUXCR);
144 	}
145 
146 	if (nano_sec <= 4 * clock_period) {
147 		write_byte(priv, AUX_VSTDL | AUX_CS, AUXCR);
148 		num_cycles = 4;
149 	} else {
150 		write_byte(priv, AUX_VSTDL, AUXCR);
151 	}
152 
153 	return num_cycles * clock_period;
154 }
155 EXPORT_SYMBOL_GPL(tms9914_t1_delay);
156 
tms9914_return_to_local(const struct gpib_board * board,struct tms9914_priv * priv)157 void tms9914_return_to_local(const struct gpib_board *board, struct tms9914_priv *priv)
158 {
159 	write_byte(priv, AUX_RTL, AUXCR);
160 }
161 EXPORT_SYMBOL_GPL(tms9914_return_to_local);
162 
tms9914_set_holdoff_mode(struct tms9914_priv * priv,enum tms9914_holdoff_mode mode)163 void tms9914_set_holdoff_mode(struct tms9914_priv *priv, enum tms9914_holdoff_mode mode)
164 {
165 	switch (mode) {
166 	case TMS9914_HOLDOFF_NONE:
167 		write_byte(priv, AUX_HLDE, AUXCR);
168 		write_byte(priv, AUX_HLDA, AUXCR);
169 		break;
170 	case TMS9914_HOLDOFF_EOI:
171 		write_byte(priv, AUX_HLDE | AUX_CS, AUXCR);
172 		write_byte(priv, AUX_HLDA, AUXCR);
173 		break;
174 	case TMS9914_HOLDOFF_ALL:
175 		write_byte(priv, AUX_HLDE, AUXCR);
176 		write_byte(priv, AUX_HLDA | AUX_CS, AUXCR);
177 		break;
178 	default:
179 		pr_err("bug! bad holdoff mode %i\n", mode);
180 		break;
181 	}
182 	priv->holdoff_mode = mode;
183 }
184 EXPORT_SYMBOL_GPL(tms9914_set_holdoff_mode);
185 
tms9914_release_holdoff(struct tms9914_priv * priv)186 void tms9914_release_holdoff(struct tms9914_priv *priv)
187 {
188 	if (priv->holdoff_active) {
189 		write_byte(priv, AUX_RHDF, AUXCR);
190 		priv->holdoff_active = 0;
191 	}
192 }
193 EXPORT_SYMBOL_GPL(tms9914_release_holdoff);
194 
tms9914_enable_eos(struct gpib_board * board,struct tms9914_priv * priv,uint8_t eos_byte,int compare_8_bits)195 int tms9914_enable_eos(struct gpib_board *board, struct tms9914_priv *priv, uint8_t eos_byte,
196 		       int compare_8_bits)
197 {
198 	priv->eos = eos_byte;
199 	priv->eos_flags = REOS;
200 	if (compare_8_bits)
201 		priv->eos_flags |= BIN;
202 	return 0;
203 }
204 EXPORT_SYMBOL(tms9914_enable_eos);
205 
tms9914_disable_eos(struct gpib_board * board,struct tms9914_priv * priv)206 void tms9914_disable_eos(struct gpib_board *board, struct tms9914_priv *priv)
207 {
208 	priv->eos_flags &= ~REOS;
209 }
210 EXPORT_SYMBOL(tms9914_disable_eos);
211 
tms9914_parallel_poll(struct gpib_board * board,struct tms9914_priv * priv,uint8_t * result)212 int tms9914_parallel_poll(struct gpib_board *board, struct tms9914_priv *priv, uint8_t *result)
213 {
214 	// execute parallel poll
215 	write_byte(priv, AUX_CS | AUX_RPP, AUXCR);
216 	udelay(2);
217 	*result = read_byte(priv, CPTR);
218 	// clear parallel poll state
219 	write_byte(priv, AUX_RPP, AUXCR);
220 	return 0;
221 }
222 EXPORT_SYMBOL(tms9914_parallel_poll);
223 
set_ppoll_reg(struct tms9914_priv * priv,int enable,unsigned int dio_line,int sense,int ist)224 static void set_ppoll_reg(struct tms9914_priv *priv, int enable,
225 			  unsigned int dio_line, int sense, int ist)
226 {
227 	u8 dio_byte;
228 
229 	if (enable && ((sense && ist) || (!sense && !ist))) {
230 		dio_byte = 1 << (dio_line - 1);
231 		write_byte(priv, dio_byte, PPR);
232 	} else {
233 		write_byte(priv, 0, PPR);
234 	}
235 }
236 
tms9914_parallel_poll_configure(struct gpib_board * board,struct tms9914_priv * priv,uint8_t config)237 void tms9914_parallel_poll_configure(struct gpib_board *board,
238 				     struct tms9914_priv *priv, uint8_t config)
239 {
240 	priv->ppoll_enable = (config & PPC_DISABLE) == 0;
241 	priv->ppoll_line = (config & PPC_DIO_MASK) + 1;
242 	priv->ppoll_sense = (config & PPC_SENSE) != 0;
243 	set_ppoll_reg(priv, priv->ppoll_enable, priv->ppoll_line, priv->ppoll_sense, board->ist);
244 }
245 EXPORT_SYMBOL(tms9914_parallel_poll_configure);
246 
tms9914_parallel_poll_response(struct gpib_board * board,struct tms9914_priv * priv,int ist)247 void tms9914_parallel_poll_response(struct gpib_board *board,
248 				    struct tms9914_priv *priv, int ist)
249 {
250 	set_ppoll_reg(priv, priv->ppoll_enable, priv->ppoll_line, priv->ppoll_sense, ist);
251 }
252 EXPORT_SYMBOL(tms9914_parallel_poll_response);
253 
tms9914_serial_poll_response(struct gpib_board * board,struct tms9914_priv * priv,uint8_t status)254 void tms9914_serial_poll_response(struct gpib_board *board, struct tms9914_priv *priv, uint8_t status)
255 {
256 	unsigned long flags;
257 
258 	spin_lock_irqsave(&board->spinlock, flags);
259 	write_byte(priv, status, SPMR);
260 	priv->spoll_status = status;
261 	if (status & request_service_bit)
262 		write_byte(priv, AUX_RSV2 | AUX_CS, AUXCR);
263 	else
264 		write_byte(priv, AUX_RSV2, AUXCR);
265 	spin_unlock_irqrestore(&board->spinlock, flags);
266 }
267 EXPORT_SYMBOL(tms9914_serial_poll_response);
268 
tms9914_serial_poll_status(struct gpib_board * board,struct tms9914_priv * priv)269 uint8_t tms9914_serial_poll_status(struct gpib_board *board, struct tms9914_priv *priv)
270 {
271 	u8 status;
272 	unsigned long flags;
273 
274 	spin_lock_irqsave(&board->spinlock, flags);
275 	status = priv->spoll_status;
276 	spin_unlock_irqrestore(&board->spinlock, flags);
277 
278 	return status;
279 }
280 EXPORT_SYMBOL(tms9914_serial_poll_status);
281 
tms9914_primary_address(struct gpib_board * board,struct tms9914_priv * priv,unsigned int address)282 int tms9914_primary_address(struct gpib_board *board, struct tms9914_priv *priv, unsigned int address)
283 {
284 	// put primary address in address0
285 	write_byte(priv, address & ADDRESS_MASK, ADR);
286 	return 0;
287 }
288 EXPORT_SYMBOL(tms9914_primary_address);
289 
tms9914_secondary_address(struct gpib_board * board,struct tms9914_priv * priv,unsigned int address,int enable)290 int tms9914_secondary_address(struct gpib_board *board, struct tms9914_priv *priv,
291 			      unsigned int address, int enable)
292 {
293 	if (enable)
294 		priv->imr1_bits |= HR_APTIE;
295 	else
296 		priv->imr1_bits &= ~HR_APTIE;
297 
298 	write_byte(priv, priv->imr1_bits, IMR1);
299 	return 0;
300 }
301 EXPORT_SYMBOL(tms9914_secondary_address);
302 
tms9914_update_status(struct gpib_board * board,struct tms9914_priv * priv,unsigned int clear_mask)303 unsigned int tms9914_update_status(struct gpib_board *board, struct tms9914_priv *priv,
304 				   unsigned int clear_mask)
305 {
306 	unsigned long flags;
307 	unsigned int retval;
308 
309 	spin_lock_irqsave(&board->spinlock, flags);
310 	retval = update_status_nolock(board, priv);
311 	board->status &= ~clear_mask;
312 	spin_unlock_irqrestore(&board->spinlock, flags);
313 
314 	return retval;
315 }
316 EXPORT_SYMBOL(tms9914_update_status);
317 
update_talker_state(struct tms9914_priv * priv,unsigned int address_status_bits)318 static void update_talker_state(struct tms9914_priv *priv, unsigned int address_status_bits)
319 {
320 	if (address_status_bits & HR_TA)	{
321 		if (address_status_bits & HR_ATN)
322 			priv->talker_state = talker_addressed;
323 		else
324 			/* this could also be serial_poll_active, but the tms9914 provides no
325 			 * way to distinguish, so we'll assume talker_active
326 			 */
327 			priv->talker_state = talker_active;
328 	} else {
329 		priv->talker_state = talker_idle;
330 	}
331 }
332 
update_listener_state(struct tms9914_priv * priv,unsigned int address_status_bits)333 static void update_listener_state(struct tms9914_priv *priv, unsigned int address_status_bits)
334 {
335 	if (address_status_bits & HR_LA)	{
336 		if (address_status_bits & HR_ATN)
337 			priv->listener_state = listener_addressed;
338 		else
339 			priv->listener_state = listener_active;
340 	} else {
341 		priv->listener_state = listener_idle;
342 	}
343 }
344 
update_status_nolock(struct gpib_board * board,struct tms9914_priv * priv)345 static unsigned int update_status_nolock(struct gpib_board *board, struct tms9914_priv *priv)
346 {
347 	int address_status;
348 	int bsr_bits;
349 
350 	address_status = read_byte(priv, ADSR);
351 
352 	// check for remote/local
353 	if (address_status & HR_REM)
354 		set_bit(REM_NUM, &board->status);
355 	else
356 		clear_bit(REM_NUM, &board->status);
357 	// check for lockout
358 	if (address_status & HR_LLO)
359 		set_bit(LOK_NUM, &board->status);
360 	else
361 		clear_bit(LOK_NUM, &board->status);
362 	// check for ATN
363 	if (address_status & HR_ATN)
364 		set_bit(ATN_NUM, &board->status);
365 	else
366 		clear_bit(ATN_NUM, &board->status);
367 	// check for talker/listener addressed
368 	update_talker_state(priv, address_status);
369 	if (priv->talker_state == talker_active || priv->talker_state == talker_addressed)
370 		set_bit(TACS_NUM, &board->status);
371 	else
372 		clear_bit(TACS_NUM, &board->status);
373 
374 	update_listener_state(priv, address_status);
375 	if (priv->listener_state == listener_active || priv->listener_state == listener_addressed)
376 		set_bit(LACS_NUM, &board->status);
377 	else
378 		clear_bit(LACS_NUM, &board->status);
379 	// Check for SRQI - not reset elsewhere except in autospoll
380 	if (board->status & SRQI) {
381 		bsr_bits = read_byte(priv, BSR);
382 		if (!(bsr_bits & BSR_SRQ_BIT))
383 			clear_bit(SRQI_NUM, &board->status);
384 	}
385 
386 	dev_dbg(board->gpib_dev, "status 0x%lx, state 0x%lx\n", board->status, priv->state);
387 
388 	return board->status;
389 }
390 
tms9914_line_status(const struct gpib_board * board,struct tms9914_priv * priv)391 int tms9914_line_status(const struct gpib_board *board, struct tms9914_priv *priv)
392 {
393 	int bsr_bits;
394 	int status = VALID_ALL;
395 
396 	bsr_bits = read_byte(priv, BSR);
397 
398 	if (bsr_bits & BSR_REN_BIT)
399 		status |= BUS_REN;
400 	if (bsr_bits & BSR_IFC_BIT)
401 		status |= BUS_IFC;
402 	if (bsr_bits & BSR_SRQ_BIT)
403 		status |= BUS_SRQ;
404 	if (bsr_bits & BSR_EOI_BIT)
405 		status |= BUS_EOI;
406 	if (bsr_bits & BSR_NRFD_BIT)
407 		status |= BUS_NRFD;
408 	if (bsr_bits & BSR_NDAC_BIT)
409 		status |= BUS_NDAC;
410 	if (bsr_bits & BSR_DAV_BIT)
411 		status |= BUS_DAV;
412 	if (bsr_bits & BSR_ATN_BIT)
413 		status |= BUS_ATN;
414 
415 	return status;
416 }
417 EXPORT_SYMBOL(tms9914_line_status);
418 
check_for_eos(struct tms9914_priv * priv,uint8_t byte)419 static int check_for_eos(struct tms9914_priv *priv, uint8_t byte)
420 {
421 	static const u8 seven_bit_compare_mask = 0x7f;
422 
423 	if ((priv->eos_flags & REOS) == 0)
424 		return 0;
425 
426 	if (priv->eos_flags & BIN) {
427 		if (priv->eos == byte)
428 			return 1;
429 	} else	{
430 		if ((priv->eos & seven_bit_compare_mask) == (byte & seven_bit_compare_mask))
431 			return 1;
432 	}
433 	return 0;
434 }
435 
wait_for_read_byte(struct gpib_board * board,struct tms9914_priv * priv)436 static int wait_for_read_byte(struct gpib_board *board, struct tms9914_priv *priv)
437 {
438 	if (wait_event_interruptible(board->wait,
439 				     test_bit(READ_READY_BN, &priv->state) ||
440 				     test_bit(DEV_CLEAR_BN, &priv->state) ||
441 				     test_bit(TIMO_NUM, &board->status)))
442 		return -ERESTARTSYS;
443 
444 	if (test_bit(TIMO_NUM, &board->status))
445 		return -ETIMEDOUT;
446 
447 	if (test_bit(DEV_CLEAR_BN, &priv->state))
448 		return -EINTR;
449 	return 0;
450 }
451 
tms9914_read_data_in(struct gpib_board * board,struct tms9914_priv * priv,int * end)452 static inline uint8_t tms9914_read_data_in(struct gpib_board *board, struct tms9914_priv *priv, int *end)
453 {
454 	unsigned long flags;
455 	u8 data;
456 
457 	spin_lock_irqsave(&board->spinlock, flags);
458 	clear_bit(READ_READY_BN, &priv->state);
459 	data = read_byte(priv, DIR);
460 	if (test_and_clear_bit(RECEIVED_END_BN, &priv->state))
461 		*end = 1;
462 	else
463 		*end = 0;
464 	switch (priv->holdoff_mode) {
465 	case TMS9914_HOLDOFF_EOI:
466 		if (*end)
467 			priv->holdoff_active = 1;
468 		break;
469 	case TMS9914_HOLDOFF_ALL:
470 		priv->holdoff_active = 1;
471 		break;
472 	case TMS9914_HOLDOFF_NONE:
473 		break;
474 	default:
475 		dev_err(board->gpib_dev, "bug! bad holdoff mode %i\n", priv->holdoff_mode);
476 		break;
477 	}
478 	spin_unlock_irqrestore(&board->spinlock, flags);
479 
480 	return data;
481 }
482 
pio_read(struct gpib_board * board,struct tms9914_priv * priv,uint8_t * buffer,size_t length,int * end,size_t * bytes_read)483 static int pio_read(struct gpib_board *board, struct tms9914_priv *priv, uint8_t *buffer,
484 		    size_t length, int *end, size_t *bytes_read)
485 {
486 	ssize_t retval = 0;
487 
488 	*bytes_read = 0;
489 	*end = 0;
490 	while (*bytes_read < length && *end == 0) {
491 		tms9914_release_holdoff(priv);
492 		retval = wait_for_read_byte(board, priv);
493 		if (retval < 0)
494 			return retval;
495 		buffer[(*bytes_read)++] = tms9914_read_data_in(board, priv, end);
496 
497 		if (check_for_eos(priv, buffer[*bytes_read - 1]))
498 			*end = 1;
499 	}
500 
501 	return retval;
502 }
503 
tms9914_read(struct gpib_board * board,struct tms9914_priv * priv,uint8_t * buffer,size_t length,int * end,size_t * bytes_read)504 int tms9914_read(struct gpib_board *board, struct tms9914_priv *priv, uint8_t *buffer,
505 		 size_t length, int *end, size_t *bytes_read)
506 {
507 	ssize_t retval = 0;
508 	size_t num_bytes;
509 
510 	*end = 0;
511 	*bytes_read = 0;
512 	if (length == 0)
513 		return 0;
514 
515 	clear_bit(DEV_CLEAR_BN, &priv->state);
516 
517 	// transfer data (except for last byte)
518 	if (length > 1)	{
519 		if (priv->eos_flags & REOS)
520 			tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_ALL);
521 		else
522 			tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_EOI);
523 		// PIO transfer
524 		retval = pio_read(board, priv, buffer, length - 1, end, &num_bytes);
525 		*bytes_read += num_bytes;
526 		if (retval < 0)
527 			return retval;
528 		buffer += num_bytes;
529 		length -= num_bytes;
530 	}
531 	// read last bytes if we havn't received an END yet
532 	if (*end == 0) {
533 		// make sure we holdoff after last byte read
534 		tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_ALL);
535 		retval = pio_read(board, priv, buffer, length, end, &num_bytes);
536 		*bytes_read += num_bytes;
537 		if (retval < 0)
538 			return retval;
539 	}
540 	return 0;
541 }
542 EXPORT_SYMBOL(tms9914_read);
543 
pio_write_wait(struct gpib_board * board,struct tms9914_priv * priv)544 static int pio_write_wait(struct gpib_board *board, struct tms9914_priv *priv)
545 {
546 	// wait until next byte is ready to be sent
547 	if (wait_event_interruptible(board->wait,
548 				     test_bit(WRITE_READY_BN, &priv->state) ||
549 				     test_bit(BUS_ERROR_BN, &priv->state) ||
550 				     test_bit(DEV_CLEAR_BN, &priv->state) ||
551 				     test_bit(TIMO_NUM, &board->status)))
552 		return -ERESTARTSYS;
553 
554 	if (test_bit(TIMO_NUM, &board->status))
555 		return -ETIMEDOUT;
556 	if (test_bit(BUS_ERROR_BN, &priv->state))
557 		return -EIO;
558 	if (test_bit(DEV_CLEAR_BN, &priv->state))
559 		return -EINTR;
560 
561 	return 0;
562 }
563 
pio_write(struct gpib_board * board,struct tms9914_priv * priv,uint8_t * buffer,size_t length,size_t * bytes_written)564 static int pio_write(struct gpib_board *board, struct tms9914_priv *priv, uint8_t *buffer,
565 		     size_t length, size_t *bytes_written)
566 {
567 	ssize_t retval = 0;
568 	unsigned long flags;
569 
570 	*bytes_written = 0;
571 	while (*bytes_written < length) {
572 		retval = pio_write_wait(board, priv);
573 		if (retval < 0)
574 			break;
575 
576 		spin_lock_irqsave(&board->spinlock, flags);
577 		clear_bit(WRITE_READY_BN, &priv->state);
578 		write_byte(priv, buffer[(*bytes_written)++], CDOR);
579 		spin_unlock_irqrestore(&board->spinlock, flags);
580 	}
581 	retval = pio_write_wait(board, priv);
582 	if (retval < 0)
583 		return retval;
584 
585 	return length;
586 }
587 
tms9914_write(struct gpib_board * board,struct tms9914_priv * priv,uint8_t * buffer,size_t length,int send_eoi,size_t * bytes_written)588 int tms9914_write(struct gpib_board *board, struct tms9914_priv *priv, uint8_t *buffer, size_t length,
589 		  int send_eoi, size_t *bytes_written)
590 {
591 	ssize_t retval = 0;
592 
593 	*bytes_written = 0;
594 	if (length == 0)
595 		return 0;
596 
597 	clear_bit(BUS_ERROR_BN, &priv->state);
598 	clear_bit(DEV_CLEAR_BN, &priv->state);
599 
600 	if (send_eoi)
601 		length-- ; /* save the last byte for sending EOI */
602 
603 	if (length > 0)	{
604 		size_t num_bytes;
605 		// PIO transfer
606 		retval = pio_write(board, priv, buffer, length, &num_bytes);
607 		*bytes_written += num_bytes;
608 		if (retval < 0)
609 			return retval;
610 	}
611 	if (send_eoi) {
612 		size_t num_bytes;
613 		/*send EOI */
614 		write_byte(priv, AUX_SEOI, AUXCR);
615 
616 		retval = pio_write(board, priv, &buffer[*bytes_written], 1, &num_bytes);
617 		*bytes_written += num_bytes;
618 	}
619 	return retval;
620 }
621 EXPORT_SYMBOL(tms9914_write);
622 
check_my_address_state(struct gpib_board * board,struct tms9914_priv * priv,int cmd_byte)623 static void check_my_address_state(struct gpib_board *board, struct tms9914_priv *priv, int cmd_byte)
624 {
625 	if (cmd_byte == MLA(board->pad)) {
626 		priv->primary_listen_addressed = 1;
627 		// become active listener
628 		if (board->sad < 0)
629 			write_byte(priv, AUX_LON | AUX_CS, AUXCR);
630 	} else if (board->sad >= 0 && priv->primary_listen_addressed &&
631 		  cmd_byte == MSA(board->sad)) {
632 		// become active listener
633 		write_byte(priv, AUX_LON | AUX_CS, AUXCR);
634 	} else if (cmd_byte != MLA(board->pad) && (cmd_byte & 0xe0) == LAD) {
635 		priv->primary_listen_addressed = 0;
636 	} else if (cmd_byte == UNL) {
637 		priv->primary_listen_addressed = 0;
638 		write_byte(priv, AUX_LON, AUXCR);
639 	} else if (cmd_byte == MTA(board->pad))	{
640 		priv->primary_talk_addressed = 1;
641 		if (board->sad < 0)
642 			//make active talker
643 			write_byte(priv, AUX_TON | AUX_CS, AUXCR);
644 	} else if (board->sad >= 0 && priv->primary_talk_addressed &&
645 		   cmd_byte == MSA(board->sad)) {
646 		// become active talker
647 		write_byte(priv, AUX_TON | AUX_CS, AUXCR);
648 	} else if (cmd_byte != MTA(board->pad) && (cmd_byte & 0xe0) == TAD) {
649 		// Other Talk Address
650 		priv->primary_talk_addressed = 0;
651 		write_byte(priv, AUX_TON, AUXCR);
652 	} else if (cmd_byte == UNT) {
653 		priv->primary_talk_addressed = 0;
654 		write_byte(priv, AUX_TON, AUXCR);
655 	}
656 }
657 
tms9914_command(struct gpib_board * board,struct tms9914_priv * priv,uint8_t * buffer,size_t length,size_t * bytes_written)658 int tms9914_command(struct gpib_board *board, struct tms9914_priv *priv,  uint8_t *buffer,
659 		    size_t length, size_t *bytes_written)
660 {
661 	int retval = 0;
662 	unsigned long flags;
663 
664 	*bytes_written = 0;
665 	while (*bytes_written < length) {
666 		if (wait_event_interruptible(board->wait,
667 					     test_bit(COMMAND_READY_BN,
668 						      &priv->state) ||
669 					     test_bit(TIMO_NUM, &board->status)))
670 			break;
671 		if (test_bit(TIMO_NUM, &board->status))
672 			break;
673 
674 		spin_lock_irqsave(&board->spinlock, flags);
675 		clear_bit(COMMAND_READY_BN, &priv->state);
676 		write_byte(priv, buffer[*bytes_written], CDOR);
677 		spin_unlock_irqrestore(&board->spinlock, flags);
678 
679 		check_my_address_state(board, priv, buffer[*bytes_written]);
680 
681 		++(*bytes_written);
682 	}
683 	// wait until last command byte is written
684 	if (wait_event_interruptible(board->wait,
685 				     test_bit(COMMAND_READY_BN,
686 					      &priv->state) || test_bit(TIMO_NUM, &board->status)))
687 		retval = -ERESTARTSYS;
688 	if (test_bit(TIMO_NUM, &board->status))
689 		retval = -ETIMEDOUT;
690 
691 	return retval;
692 }
693 EXPORT_SYMBOL(tms9914_command);
694 
tms9914_interrupt(struct gpib_board * board,struct tms9914_priv * priv)695 irqreturn_t tms9914_interrupt(struct gpib_board *board, struct tms9914_priv *priv)
696 {
697 	int status0, status1;
698 
699 	// read interrupt status (also clears status)
700 	status0 = read_byte(priv, ISR0);
701 	status1 = read_byte(priv, ISR1);
702 	return tms9914_interrupt_have_status(board, priv, status0, status1);
703 }
704 EXPORT_SYMBOL(tms9914_interrupt);
705 
tms9914_interrupt_have_status(struct gpib_board * board,struct tms9914_priv * priv,int status0,int status1)706 irqreturn_t tms9914_interrupt_have_status(struct gpib_board *board, struct tms9914_priv *priv,
707 					  int status0, int status1)
708 {
709 	// record reception of END
710 	if (status0 & HR_END)
711 		set_bit(RECEIVED_END_BN, &priv->state);
712 	// get incoming data in PIO mode
713 	if ((status0 & HR_BI))
714 		set_bit(READ_READY_BN, &priv->state);
715 	if ((status0 & HR_BO))	{
716 		if (read_byte(priv, ADSR) & HR_ATN)
717 			set_bit(COMMAND_READY_BN, &priv->state);
718 		else
719 			set_bit(WRITE_READY_BN, &priv->state);
720 	}
721 
722 	if (status0 & HR_SPAS) {
723 		priv->spoll_status &= ~request_service_bit;
724 		write_byte(priv, priv->spoll_status, SPMR);
725 		//FIXME: set SPOLL status bit
726 	}
727 	// record service request in status
728 	if (status1 & HR_SRQ)
729 		set_bit(SRQI_NUM, &board->status);
730 	// have been addressed (with secondary addressing disabled)
731 	if (status1 & HR_MA)
732 		// clear dac holdoff
733 		write_byte(priv, AUX_VAL, AUXCR);
734 	// unrecognized command received
735 	if (status1 & HR_UNC) {
736 		unsigned short command_byte = read_byte(priv, CPTR) & gpib_command_mask;
737 
738 		switch (command_byte) {
739 		case PPConfig:
740 			priv->ppoll_configure_state = 1;
741 			/* AUX_PTS generates another UNC interrupt on the next command byte
742 			 * if it is in the secondary address group (such as PPE and PPD).
743 			 */
744 			write_byte(priv, AUX_PTS, AUXCR);
745 			write_byte(priv, AUX_VAL, AUXCR);
746 			break;
747 		case PPU:
748 			tms9914_parallel_poll_configure(board, priv, command_byte);
749 			write_byte(priv, AUX_VAL, AUXCR);
750 			break;
751 		default:
752 			if (is_PPE(command_byte) || is_PPD(command_byte)) {
753 				if (priv->ppoll_configure_state) {
754 					tms9914_parallel_poll_configure(board, priv, command_byte);
755 					write_byte(priv, AUX_VAL, AUXCR);
756 				} else	{// bad parallel poll configure byte
757 					// clear dac holdoff
758 					write_byte(priv, AUX_INVAL, AUXCR);
759 				}
760 			} else	{
761 				// clear dac holdoff
762 				write_byte(priv, AUX_INVAL, AUXCR);
763 			}
764 			break;
765 		}
766 
767 		if (in_primary_command_group(command_byte) && command_byte != PPConfig)
768 			priv->ppoll_configure_state = 0;
769 	}
770 
771 	if (status1 & HR_ERR) {
772 		dev_dbg(board->gpib_dev, "gpib bus error\n");
773 		set_bit(BUS_ERROR_BN, &priv->state);
774 	}
775 
776 	if (status1 & HR_IFC) {
777 		push_gpib_event(board, EventIFC);
778 		clear_bit(CIC_NUM, &board->status);
779 	}
780 
781 	if (status1 & HR_GET) {
782 		push_gpib_event(board, EventDevTrg);
783 		// clear dac holdoff
784 		write_byte(priv, AUX_VAL, AUXCR);
785 	}
786 
787 	if (status1 & HR_DCAS) {
788 		push_gpib_event(board, EventDevClr);
789 		// clear dac holdoff
790 		write_byte(priv, AUX_VAL, AUXCR);
791 		set_bit(DEV_CLEAR_BN, &priv->state);
792 	}
793 
794 	// check for being addressed with secondary addressing
795 	if (status1 & HR_APT) {
796 		if (board->sad < 0)
797 			dev_err(board->gpib_dev, "bug, APT interrupt without secondary addressing?\n");
798 		if ((read_byte(priv, CPTR) & gpib_command_mask) == MSA(board->sad))
799 			write_byte(priv, AUX_VAL, AUXCR);
800 		else
801 			write_byte(priv, AUX_INVAL, AUXCR);
802 	}
803 
804 	if ((status0 & priv->imr0_bits) || (status1 & priv->imr1_bits))	{
805 		dev_dbg(board->gpib_dev, "isr0 0x%x, imr0 0x%x, isr1 0x%x, imr1 0x%x\n",
806 			status0, priv->imr0_bits, status1, priv->imr1_bits);
807 		update_status_nolock(board, priv);
808 		wake_up_interruptible(&board->wait);
809 	}
810 	return IRQ_HANDLED;
811 }
812 EXPORT_SYMBOL(tms9914_interrupt_have_status);
813 
tms9914_board_reset(struct tms9914_priv * priv)814 void tms9914_board_reset(struct tms9914_priv *priv)
815 {
816 	/* chip reset */
817 	write_byte(priv, AUX_CHIP_RESET | AUX_CS, AUXCR);
818 
819 	/* disable all interrupts */
820 	priv->imr0_bits = 0;
821 	write_byte(priv, priv->imr0_bits, IMR0);
822 	priv->imr1_bits = 0;
823 	write_byte(priv, priv->imr1_bits, IMR1);
824 	write_byte(priv, AUX_DAI | AUX_CS, AUXCR);
825 
826 	/* clear registers by reading */
827 	read_byte(priv, CPTR);
828 	read_byte(priv, ISR0);
829 	read_byte(priv, ISR1);
830 
831 	write_byte(priv, 0, SPMR);
832 
833 	/* parallel poll unconfigure */
834 	write_byte(priv, 0, PPR);
835 	// request for data holdoff
836 	tms9914_set_holdoff_mode(priv, TMS9914_HOLDOFF_ALL);
837 }
838 EXPORT_SYMBOL_GPL(tms9914_board_reset);
839 
tms9914_online(struct gpib_board * board,struct tms9914_priv * priv)840 void tms9914_online(struct gpib_board *board, struct tms9914_priv *priv)
841 {
842 	/* set GPIB address */
843 	tms9914_primary_address(board, priv, board->pad);
844 	tms9914_secondary_address(board, priv, board->sad, board->sad >= 0);
845 
846 	// enable tms9914 interrupts
847 	priv->imr0_bits |= HR_MACIE | HR_RLCIE | HR_ENDIE | HR_BOIE | HR_BIIE |
848 		HR_SPASIE;
849 	priv->imr1_bits |= HR_MAIE | HR_SRQIE | HR_UNCIE | HR_ERRIE | HR_IFCIE |
850 		HR_GETIE | HR_DCASIE;
851 	write_byte(priv, priv->imr0_bits, IMR0);
852 	write_byte(priv, priv->imr1_bits, IMR1);
853 	write_byte(priv, AUX_DAI, AUXCR);
854 
855 	// turn off reset state
856 	write_byte(priv, AUX_CHIP_RESET, AUXCR);
857 }
858 EXPORT_SYMBOL_GPL(tms9914_online);
859 
860 #ifdef CONFIG_HAS_IOPORT
861 // wrapper for inb
tms9914_ioport_read_byte(struct tms9914_priv * priv,unsigned int register_num)862 uint8_t tms9914_ioport_read_byte(struct tms9914_priv *priv, unsigned int register_num)
863 {
864 	return inb(priv->iobase + register_num * priv->offset);
865 }
866 EXPORT_SYMBOL_GPL(tms9914_ioport_read_byte);
867 
868 // wrapper for outb
tms9914_ioport_write_byte(struct tms9914_priv * priv,uint8_t data,unsigned int register_num)869 void tms9914_ioport_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
870 {
871 	outb(data, priv->iobase + register_num * priv->offset);
872 	if (register_num == AUXCR)
873 		udelay(1);
874 }
875 EXPORT_SYMBOL_GPL(tms9914_ioport_write_byte);
876 #endif
877 
878 // wrapper for readb
tms9914_iomem_read_byte(struct tms9914_priv * priv,unsigned int register_num)879 uint8_t tms9914_iomem_read_byte(struct tms9914_priv *priv, unsigned int register_num)
880 {
881 	return readb(priv->mmiobase + register_num * priv->offset);
882 }
883 EXPORT_SYMBOL_GPL(tms9914_iomem_read_byte);
884 
885 // wrapper for writeb
tms9914_iomem_write_byte(struct tms9914_priv * priv,uint8_t data,unsigned int register_num)886 void tms9914_iomem_write_byte(struct tms9914_priv *priv, uint8_t data, unsigned int register_num)
887 {
888 	writeb(data, priv->mmiobase + register_num * priv->offset);
889 	if (register_num == AUXCR)
890 		udelay(1);
891 }
892 EXPORT_SYMBOL_GPL(tms9914_iomem_write_byte);
893 
tms9914_init_module(void)894 static int __init tms9914_init_module(void)
895 {
896 	return 0;
897 }
898 
tms9914_exit_module(void)899 static void __exit tms9914_exit_module(void)
900 {
901 }
902 
903 module_init(tms9914_init_module);
904 module_exit(tms9914_exit_module);
905 
906