1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2022-2023, Advanced Micro Devices, Inc.
4  */
5 
6 #include <linux/pci.h>
7 #include <linux/of.h>
8 #include <linux/of_irq.h>
9 #include <linux/bitfield.h>
10 #include <linux/bits.h>
11 #include "pci.h"
12 
13 #define OF_PCI_ADDRESS_CELLS		3
14 #define OF_PCI_SIZE_CELLS		2
15 #define OF_PCI_MAX_INT_PIN		4
16 
17 struct of_pci_addr_pair {
18 	u32		phys_addr[OF_PCI_ADDRESS_CELLS];
19 	u32		size[OF_PCI_SIZE_CELLS];
20 };
21 
22 /*
23  * Each entry in the ranges table is a tuple containing the child address,
24  * the parent address, and the size of the region in the child address space.
25  * Thus, for PCI, in each entry parent address is an address on the primary
26  * side and the child address is the corresponding address on the secondary
27  * side.
28  */
29 struct of_pci_range_entry {
30 	u32		child_addr[OF_PCI_ADDRESS_CELLS];
31 	u32		parent_addr[OF_PCI_ADDRESS_CELLS];
32 	u32		size[OF_PCI_SIZE_CELLS];
33 };
34 
35 #define OF_PCI_ADDR_SPACE_IO		0x1
36 #define OF_PCI_ADDR_SPACE_MEM32		0x2
37 #define OF_PCI_ADDR_SPACE_MEM64		0x3
38 
39 #define OF_PCI_ADDR_FIELD_NONRELOC	BIT(31)
40 #define OF_PCI_ADDR_FIELD_SS		GENMASK(25, 24)
41 #define OF_PCI_ADDR_FIELD_PREFETCH	BIT(30)
42 #define OF_PCI_ADDR_FIELD_BUS		GENMASK(23, 16)
43 #define OF_PCI_ADDR_FIELD_DEV		GENMASK(15, 11)
44 #define OF_PCI_ADDR_FIELD_FUNC		GENMASK(10, 8)
45 #define OF_PCI_ADDR_FIELD_REG		GENMASK(7, 0)
46 
47 enum of_pci_prop_compatible {
48 	PROP_COMPAT_PCI_VVVV_DDDD,
49 	PROP_COMPAT_PCICLASS_CCSSPP,
50 	PROP_COMPAT_PCICLASS_CCSS,
51 	PROP_COMPAT_NUM,
52 };
53 
of_pci_set_address(struct pci_dev * pdev,u32 * prop,u64 addr,u32 reg_num,u32 flags,bool reloc)54 static void of_pci_set_address(struct pci_dev *pdev, u32 *prop, u64 addr,
55 			       u32 reg_num, u32 flags, bool reloc)
56 {
57 	if (pdev) {
58 		prop[0] = FIELD_PREP(OF_PCI_ADDR_FIELD_BUS, pdev->bus->number) |
59 			  FIELD_PREP(OF_PCI_ADDR_FIELD_DEV, PCI_SLOT(pdev->devfn)) |
60 			  FIELD_PREP(OF_PCI_ADDR_FIELD_FUNC, PCI_FUNC(pdev->devfn));
61 	} else
62 		prop[0] = 0;
63 
64 	prop[0] |= flags | reg_num;
65 	if (!reloc) {
66 		prop[0] |= OF_PCI_ADDR_FIELD_NONRELOC;
67 		prop[1] = upper_32_bits(addr);
68 		prop[2] = lower_32_bits(addr);
69 	}
70 }
71 
of_pci_get_addr_flags(const struct resource * res,u32 * flags)72 static int of_pci_get_addr_flags(const struct resource *res, u32 *flags)
73 {
74 	u32 ss;
75 
76 	if (res->flags & IORESOURCE_IO)
77 		ss = OF_PCI_ADDR_SPACE_IO;
78 	else if (res->flags & IORESOURCE_MEM_64)
79 		ss = OF_PCI_ADDR_SPACE_MEM64;
80 	else if (res->flags & IORESOURCE_MEM)
81 		ss = OF_PCI_ADDR_SPACE_MEM32;
82 	else
83 		return -EINVAL;
84 
85 	*flags = 0;
86 	if (res->flags & IORESOURCE_PREFETCH)
87 		*flags |= OF_PCI_ADDR_FIELD_PREFETCH;
88 
89 	*flags |= FIELD_PREP(OF_PCI_ADDR_FIELD_SS, ss);
90 
91 	return 0;
92 }
93 
of_pci_prop_bus_range(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)94 static int of_pci_prop_bus_range(struct pci_dev *pdev,
95 				 struct of_changeset *ocs,
96 				 struct device_node *np)
97 {
98 	u32 bus_range[] = { pdev->subordinate->busn_res.start,
99 			    pdev->subordinate->busn_res.end };
100 
101 	return of_changeset_add_prop_u32_array(ocs, np, "bus-range", bus_range,
102 					       ARRAY_SIZE(bus_range));
103 }
104 
of_pci_prop_ranges(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)105 static int of_pci_prop_ranges(struct pci_dev *pdev, struct of_changeset *ocs,
106 			      struct device_node *np)
107 {
108 	struct of_pci_range_entry *rp;
109 	struct resource *res;
110 	int i, j, ret;
111 	u32 flags, num;
112 	u64 val64;
113 
114 	if (pci_is_bridge(pdev)) {
115 		num = PCI_BRIDGE_RESOURCE_NUM;
116 		res = &pdev->resource[PCI_BRIDGE_RESOURCES];
117 	} else {
118 		num = PCI_STD_NUM_BARS;
119 		res = &pdev->resource[PCI_STD_RESOURCES];
120 	}
121 
122 	rp = kcalloc(num, sizeof(*rp), GFP_KERNEL);
123 	if (!rp)
124 		return -ENOMEM;
125 
126 	for (i = 0, j = 0; j < num; j++) {
127 		if (!resource_size(&res[j]))
128 			continue;
129 
130 		if (of_pci_get_addr_flags(&res[j], &flags))
131 			continue;
132 
133 		val64 = pci_bus_address(pdev, &res[j] - pdev->resource);
134 		of_pci_set_address(pdev, rp[i].parent_addr, val64, 0, flags,
135 				   false);
136 		if (pci_is_bridge(pdev)) {
137 			memcpy(rp[i].child_addr, rp[i].parent_addr,
138 			       sizeof(rp[i].child_addr));
139 		} else {
140 			/*
141 			 * For endpoint device, the lower 64-bits of child
142 			 * address is always zero.
143 			 */
144 			rp[i].child_addr[0] = j;
145 		}
146 
147 		val64 = resource_size(&res[j]);
148 		rp[i].size[0] = upper_32_bits(val64);
149 		rp[i].size[1] = lower_32_bits(val64);
150 
151 		i++;
152 	}
153 
154 	ret = of_changeset_add_prop_u32_array(ocs, np, "ranges", (u32 *)rp,
155 					      i * sizeof(*rp) / sizeof(u32));
156 	kfree(rp);
157 
158 	return ret;
159 }
160 
of_pci_prop_reg(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)161 static int of_pci_prop_reg(struct pci_dev *pdev, struct of_changeset *ocs,
162 			   struct device_node *np)
163 {
164 	struct of_pci_addr_pair reg = { 0 };
165 
166 	/* configuration space */
167 	of_pci_set_address(pdev, reg.phys_addr, 0, 0, 0, true);
168 
169 	return of_changeset_add_prop_u32_array(ocs, np, "reg", (u32 *)&reg,
170 					       sizeof(reg) / sizeof(u32));
171 }
172 
of_pci_prop_interrupts(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)173 static int of_pci_prop_interrupts(struct pci_dev *pdev,
174 				  struct of_changeset *ocs,
175 				  struct device_node *np)
176 {
177 	int ret;
178 	u8 pin;
179 
180 	ret = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
181 	if (ret != 0)
182 		return ret;
183 
184 	if (!pin)
185 		return 0;
186 
187 	return of_changeset_add_prop_u32(ocs, np, "interrupts", (u32)pin);
188 }
189 
of_pci_prop_intr_ctrl(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)190 static int of_pci_prop_intr_ctrl(struct pci_dev *pdev, struct of_changeset *ocs,
191 				 struct device_node *np)
192 {
193 	int ret;
194 	u8 pin;
195 
196 	ret = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
197 	if (ret != 0)
198 		return ret;
199 
200 	if (!pin)
201 		return 0;
202 
203 	ret = of_changeset_add_prop_u32(ocs, np, "#interrupt-cells", 1);
204 	if (ret)
205 		return ret;
206 
207 	return of_changeset_add_prop_bool(ocs, np, "interrupt-controller");
208 }
209 
of_pci_prop_intr_map(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)210 static int of_pci_prop_intr_map(struct pci_dev *pdev, struct of_changeset *ocs,
211 				struct device_node *np)
212 {
213 	u32 i, addr_sz[OF_PCI_MAX_INT_PIN] = { 0 }, map_sz = 0;
214 	struct of_phandle_args out_irq[OF_PCI_MAX_INT_PIN];
215 	__be32 laddr[OF_PCI_ADDRESS_CELLS] = { 0 };
216 	u32 int_map_mask[] = { 0xffff00, 0, 0, 7 };
217 	struct device_node *pnode;
218 	struct pci_dev *child;
219 	u32 *int_map, *mapp;
220 	int ret;
221 	u8 pin;
222 
223 	pnode = pci_device_to_OF_node(pdev->bus->self);
224 	if (!pnode)
225 		pnode = pci_bus_to_OF_node(pdev->bus);
226 
227 	if (!pnode) {
228 		pci_err(pdev, "failed to get parent device node");
229 		return -EINVAL;
230 	}
231 
232 	laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
233 	for (pin = 1; pin <= OF_PCI_MAX_INT_PIN;  pin++) {
234 		i = pin - 1;
235 		out_irq[i].np = pnode;
236 		out_irq[i].args_count = 1;
237 		out_irq[i].args[0] = pin;
238 		ret = of_irq_parse_raw(laddr, &out_irq[i]);
239 		if (ret) {
240 			out_irq[i].np = NULL;
241 			pci_dbg(pdev, "parse irq %d failed, ret %d", pin, ret);
242 			continue;
243 		}
244 		of_property_read_u32(out_irq[i].np, "#address-cells",
245 				     &addr_sz[i]);
246 	}
247 
248 	list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
249 		for (pin = 1; pin <= OF_PCI_MAX_INT_PIN; pin++) {
250 			i = pci_swizzle_interrupt_pin(child, pin) - 1;
251 			if (!out_irq[i].np)
252 				continue;
253 			map_sz += 5 + addr_sz[i] + out_irq[i].args_count;
254 		}
255 	}
256 
257 	/*
258 	 * Parsing interrupt failed for all pins. In this case, it does not
259 	 * need to generate interrupt-map property.
260 	 */
261 	if (!map_sz)
262 		return 0;
263 
264 	int_map = kcalloc(map_sz, sizeof(u32), GFP_KERNEL);
265 	if (!int_map)
266 		return -ENOMEM;
267 	mapp = int_map;
268 
269 	list_for_each_entry(child, &pdev->subordinate->devices, bus_list) {
270 		for (pin = 1; pin <= OF_PCI_MAX_INT_PIN; pin++) {
271 			i = pci_swizzle_interrupt_pin(child, pin) - 1;
272 			if (!out_irq[i].np)
273 				continue;
274 
275 			*mapp = (child->bus->number << 16) |
276 				(child->devfn << 8);
277 			mapp += OF_PCI_ADDRESS_CELLS;
278 			*mapp = pin;
279 			mapp++;
280 			*mapp = out_irq[i].np->phandle;
281 			mapp++;
282 			if (addr_sz[i]) {
283 				ret = of_property_read_u32_array(out_irq[i].np,
284 								 "reg", mapp,
285 								 addr_sz[i]);
286 				if (ret)
287 					goto failed;
288 			}
289 			mapp += addr_sz[i];
290 			memcpy(mapp, out_irq[i].args,
291 			       out_irq[i].args_count * sizeof(u32));
292 			mapp += out_irq[i].args_count;
293 		}
294 	}
295 
296 	ret = of_changeset_add_prop_u32_array(ocs, np, "interrupt-map", int_map,
297 					      map_sz);
298 	if (ret)
299 		goto failed;
300 
301 	ret = of_changeset_add_prop_u32(ocs, np, "#interrupt-cells", 1);
302 	if (ret)
303 		goto failed;
304 
305 	ret = of_changeset_add_prop_u32_array(ocs, np, "interrupt-map-mask",
306 					      int_map_mask,
307 					      ARRAY_SIZE(int_map_mask));
308 	if (ret)
309 		goto failed;
310 
311 	kfree(int_map);
312 	return 0;
313 
314 failed:
315 	kfree(int_map);
316 	return ret;
317 }
318 
of_pci_prop_compatible(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)319 static int of_pci_prop_compatible(struct pci_dev *pdev,
320 				  struct of_changeset *ocs,
321 				  struct device_node *np)
322 {
323 	const char *compat_strs[PROP_COMPAT_NUM] = { 0 };
324 	int i, ret;
325 
326 	compat_strs[PROP_COMPAT_PCI_VVVV_DDDD] =
327 		kasprintf(GFP_KERNEL, "pci%x,%x", pdev->vendor, pdev->device);
328 	compat_strs[PROP_COMPAT_PCICLASS_CCSSPP] =
329 		kasprintf(GFP_KERNEL, "pciclass,%06x", pdev->class);
330 	compat_strs[PROP_COMPAT_PCICLASS_CCSS] =
331 		kasprintf(GFP_KERNEL, "pciclass,%04x", pdev->class >> 8);
332 
333 	ret = of_changeset_add_prop_string_array(ocs, np, "compatible",
334 						 compat_strs, PROP_COMPAT_NUM);
335 	for (i = 0; i < PROP_COMPAT_NUM; i++)
336 		kfree(compat_strs[i]);
337 
338 	return ret;
339 }
340 
of_pci_add_properties(struct pci_dev * pdev,struct of_changeset * ocs,struct device_node * np)341 int of_pci_add_properties(struct pci_dev *pdev, struct of_changeset *ocs,
342 			  struct device_node *np)
343 {
344 	int ret;
345 
346 	/*
347 	 * The added properties will be released when the
348 	 * changeset is destroyed.
349 	 */
350 	if (pci_is_bridge(pdev)) {
351 		ret = of_changeset_add_prop_string(ocs, np, "device_type",
352 						   "pci");
353 		if (ret)
354 			return ret;
355 
356 		ret = of_pci_prop_bus_range(pdev, ocs, np);
357 		if (ret)
358 			return ret;
359 
360 		ret = of_pci_prop_intr_map(pdev, ocs, np);
361 		if (ret)
362 			return ret;
363 	} else {
364 		ret = of_pci_prop_intr_ctrl(pdev, ocs, np);
365 		if (ret)
366 			return ret;
367 	}
368 
369 	ret = of_pci_prop_ranges(pdev, ocs, np);
370 	if (ret)
371 		return ret;
372 
373 	ret = of_changeset_add_prop_u32(ocs, np, "#address-cells",
374 					OF_PCI_ADDRESS_CELLS);
375 	if (ret)
376 		return ret;
377 
378 	ret = of_changeset_add_prop_u32(ocs, np, "#size-cells",
379 					OF_PCI_SIZE_CELLS);
380 	if (ret)
381 		return ret;
382 
383 	ret = of_pci_prop_reg(pdev, ocs, np);
384 	if (ret)
385 		return ret;
386 
387 	ret = of_pci_prop_compatible(pdev, ocs, np);
388 	if (ret)
389 		return ret;
390 
391 	ret = of_pci_prop_interrupts(pdev, ocs, np);
392 	if (ret)
393 		return ret;
394 
395 	return 0;
396 }
397 
of_pci_is_range_resource(const struct resource * res,u32 * flags)398 static bool of_pci_is_range_resource(const struct resource *res, u32 *flags)
399 {
400 	if (!(resource_type(res) & IORESOURCE_MEM) &&
401 	    !(resource_type(res) & IORESOURCE_MEM_64))
402 		return false;
403 
404 	if (of_pci_get_addr_flags(res, flags))
405 		return false;
406 
407 	return true;
408 }
409 
of_pci_host_bridge_prop_ranges(struct pci_host_bridge * bridge,struct of_changeset * ocs,struct device_node * np)410 static int of_pci_host_bridge_prop_ranges(struct pci_host_bridge *bridge,
411 					  struct of_changeset *ocs,
412 					  struct device_node *np)
413 {
414 	struct resource_entry *window;
415 	unsigned int ranges_sz = 0;
416 	unsigned int n_range = 0;
417 	struct resource *res;
418 	int n_addr_cells;
419 	u32 *ranges;
420 	u64 val64;
421 	u32 flags;
422 	int ret;
423 
424 	n_addr_cells = of_n_addr_cells(np);
425 	if (n_addr_cells <= 0 || n_addr_cells > 2)
426 		return -EINVAL;
427 
428 	resource_list_for_each_entry(window, &bridge->windows) {
429 		res = window->res;
430 		if (!of_pci_is_range_resource(res, &flags))
431 			continue;
432 		n_range++;
433 	}
434 
435 	if (!n_range)
436 		return 0;
437 
438 	ranges = kcalloc(n_range,
439 			 (OF_PCI_ADDRESS_CELLS + OF_PCI_SIZE_CELLS +
440 			  n_addr_cells) * sizeof(*ranges),
441 			 GFP_KERNEL);
442 	if (!ranges)
443 		return -ENOMEM;
444 
445 	resource_list_for_each_entry(window, &bridge->windows) {
446 		res = window->res;
447 		if (!of_pci_is_range_resource(res, &flags))
448 			continue;
449 
450 		/* PCI bus address */
451 		val64 = res->start;
452 		of_pci_set_address(NULL, &ranges[ranges_sz],
453 				   val64 - window->offset, 0, flags, false);
454 		ranges_sz += OF_PCI_ADDRESS_CELLS;
455 
456 		/* Host bus address */
457 		if (n_addr_cells == 2)
458 			ranges[ranges_sz++] = upper_32_bits(val64);
459 		ranges[ranges_sz++] = lower_32_bits(val64);
460 
461 		/* Size */
462 		val64 = resource_size(res);
463 		ranges[ranges_sz] = upper_32_bits(val64);
464 		ranges[ranges_sz + 1] = lower_32_bits(val64);
465 		ranges_sz += OF_PCI_SIZE_CELLS;
466 	}
467 
468 	ret = of_changeset_add_prop_u32_array(ocs, np, "ranges", ranges,
469 					      ranges_sz);
470 	kfree(ranges);
471 	return ret;
472 }
473 
of_pci_add_host_bridge_properties(struct pci_host_bridge * bridge,struct of_changeset * ocs,struct device_node * np)474 int of_pci_add_host_bridge_properties(struct pci_host_bridge *bridge,
475 				      struct of_changeset *ocs,
476 				      struct device_node *np)
477 {
478 	int ret;
479 
480 	ret = of_changeset_add_prop_string(ocs, np, "device_type", "pci");
481 	if (ret)
482 		return ret;
483 
484 	ret = of_changeset_add_prop_u32(ocs, np, "#address-cells",
485 					OF_PCI_ADDRESS_CELLS);
486 	if (ret)
487 		return ret;
488 
489 	ret = of_changeset_add_prop_u32(ocs, np, "#size-cells",
490 					OF_PCI_SIZE_CELLS);
491 	if (ret)
492 		return ret;
493 
494 	ret = of_pci_host_bridge_prop_ranges(bridge, ocs, np);
495 	if (ret)
496 		return ret;
497 
498 	return 0;
499 }
500