1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * NVM Express device driver
4 * Copyright (c) 2011-2014, Intel Corporation.
5 */
6
7 #include <linux/async.h>
8 #include <linux/blkdev.h>
9 #include <linux/blk-mq.h>
10 #include <linux/blk-integrity.h>
11 #include <linux/compat.h>
12 #include <linux/delay.h>
13 #include <linux/errno.h>
14 #include <linux/hdreg.h>
15 #include <linux/kernel.h>
16 #include <linux/module.h>
17 #include <linux/backing-dev.h>
18 #include <linux/slab.h>
19 #include <linux/types.h>
20 #include <linux/pr.h>
21 #include <linux/ptrace.h>
22 #include <linux/nvme_ioctl.h>
23 #include <linux/pm_qos.h>
24 #include <linux/ratelimit.h>
25 #include <linux/unaligned.h>
26
27 #include "nvme.h"
28 #include "fabrics.h"
29 #include <linux/nvme-auth.h>
30
31 #define CREATE_TRACE_POINTS
32 #include "trace.h"
33
34 #define NVME_MINORS (1U << MINORBITS)
35
36 struct nvme_ns_info {
37 struct nvme_ns_ids ids;
38 u32 nsid;
39 __le32 anagrpid;
40 u8 pi_offset;
41 bool is_shared;
42 bool is_readonly;
43 bool is_ready;
44 bool is_removed;
45 bool is_rotational;
46 bool no_vwc;
47 };
48
49 unsigned int admin_timeout = 60;
50 module_param(admin_timeout, uint, 0644);
51 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
52 EXPORT_SYMBOL_GPL(admin_timeout);
53
54 unsigned int nvme_io_timeout = 30;
55 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
56 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
57 EXPORT_SYMBOL_GPL(nvme_io_timeout);
58
59 static unsigned char shutdown_timeout = 5;
60 module_param(shutdown_timeout, byte, 0644);
61 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
62
63 static u8 nvme_max_retries = 5;
64 module_param_named(max_retries, nvme_max_retries, byte, 0644);
65 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
66
67 static unsigned long default_ps_max_latency_us = 100000;
68 module_param(default_ps_max_latency_us, ulong, 0644);
69 MODULE_PARM_DESC(default_ps_max_latency_us,
70 "max power saving latency for new devices; use PM QOS to change per device");
71
72 static bool force_apst;
73 module_param(force_apst, bool, 0644);
74 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
75
76 static unsigned long apst_primary_timeout_ms = 100;
77 module_param(apst_primary_timeout_ms, ulong, 0644);
78 MODULE_PARM_DESC(apst_primary_timeout_ms,
79 "primary APST timeout in ms");
80
81 static unsigned long apst_secondary_timeout_ms = 2000;
82 module_param(apst_secondary_timeout_ms, ulong, 0644);
83 MODULE_PARM_DESC(apst_secondary_timeout_ms,
84 "secondary APST timeout in ms");
85
86 static unsigned long apst_primary_latency_tol_us = 15000;
87 module_param(apst_primary_latency_tol_us, ulong, 0644);
88 MODULE_PARM_DESC(apst_primary_latency_tol_us,
89 "primary APST latency tolerance in us");
90
91 static unsigned long apst_secondary_latency_tol_us = 100000;
92 module_param(apst_secondary_latency_tol_us, ulong, 0644);
93 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
94 "secondary APST latency tolerance in us");
95
96 /*
97 * Older kernels didn't enable protection information if it was at an offset.
98 * Newer kernels do, so it breaks reads on the upgrade if such formats were
99 * used in prior kernels since the metadata written did not contain a valid
100 * checksum.
101 */
102 static bool disable_pi_offsets = false;
103 module_param(disable_pi_offsets, bool, 0444);
104 MODULE_PARM_DESC(disable_pi_offsets,
105 "disable protection information if it has an offset");
106
107 /*
108 * nvme_wq - hosts nvme related works that are not reset or delete
109 * nvme_reset_wq - hosts nvme reset works
110 * nvme_delete_wq - hosts nvme delete works
111 *
112 * nvme_wq will host works such as scan, aen handling, fw activation,
113 * keep-alive, periodic reconnects etc. nvme_reset_wq
114 * runs reset works which also flush works hosted on nvme_wq for
115 * serialization purposes. nvme_delete_wq host controller deletion
116 * works which flush reset works for serialization.
117 */
118 struct workqueue_struct *nvme_wq;
119 EXPORT_SYMBOL_GPL(nvme_wq);
120
121 struct workqueue_struct *nvme_reset_wq;
122 EXPORT_SYMBOL_GPL(nvme_reset_wq);
123
124 struct workqueue_struct *nvme_delete_wq;
125 EXPORT_SYMBOL_GPL(nvme_delete_wq);
126
127 static LIST_HEAD(nvme_subsystems);
128 DEFINE_MUTEX(nvme_subsystems_lock);
129
130 static DEFINE_IDA(nvme_instance_ida);
131 static dev_t nvme_ctrl_base_chr_devt;
132 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env);
133 static const struct class nvme_class = {
134 .name = "nvme",
135 .dev_uevent = nvme_class_uevent,
136 };
137
138 static const struct class nvme_subsys_class = {
139 .name = "nvme-subsystem",
140 };
141
142 static DEFINE_IDA(nvme_ns_chr_minor_ida);
143 static dev_t nvme_ns_chr_devt;
144 static const struct class nvme_ns_chr_class = {
145 .name = "nvme-generic",
146 };
147
148 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
149 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
150 unsigned nsid);
151 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
152 struct nvme_command *cmd);
153
nvme_queue_scan(struct nvme_ctrl * ctrl)154 void nvme_queue_scan(struct nvme_ctrl *ctrl)
155 {
156 /*
157 * Only new queue scan work when admin and IO queues are both alive
158 */
159 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
160 queue_work(nvme_wq, &ctrl->scan_work);
161 }
162
163 /*
164 * Use this function to proceed with scheduling reset_work for a controller
165 * that had previously been set to the resetting state. This is intended for
166 * code paths that can't be interrupted by other reset attempts. A hot removal
167 * may prevent this from succeeding.
168 */
nvme_try_sched_reset(struct nvme_ctrl * ctrl)169 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
170 {
171 if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
172 return -EBUSY;
173 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
174 return -EBUSY;
175 return 0;
176 }
177 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
178
nvme_failfast_work(struct work_struct * work)179 static void nvme_failfast_work(struct work_struct *work)
180 {
181 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
182 struct nvme_ctrl, failfast_work);
183
184 if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
185 return;
186
187 set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
188 dev_info(ctrl->device, "failfast expired\n");
189 nvme_kick_requeue_lists(ctrl);
190 }
191
nvme_start_failfast_work(struct nvme_ctrl * ctrl)192 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
193 {
194 if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
195 return;
196
197 schedule_delayed_work(&ctrl->failfast_work,
198 ctrl->opts->fast_io_fail_tmo * HZ);
199 }
200
nvme_stop_failfast_work(struct nvme_ctrl * ctrl)201 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
202 {
203 if (!ctrl->opts)
204 return;
205
206 cancel_delayed_work_sync(&ctrl->failfast_work);
207 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
208 }
209
210
nvme_reset_ctrl(struct nvme_ctrl * ctrl)211 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
212 {
213 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
214 return -EBUSY;
215 if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
216 return -EBUSY;
217 return 0;
218 }
219 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
220
nvme_reset_ctrl_sync(struct nvme_ctrl * ctrl)221 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
222 {
223 int ret;
224
225 ret = nvme_reset_ctrl(ctrl);
226 if (!ret) {
227 flush_work(&ctrl->reset_work);
228 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
229 ret = -ENETRESET;
230 }
231
232 return ret;
233 }
234
nvme_do_delete_ctrl(struct nvme_ctrl * ctrl)235 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
236 {
237 dev_info(ctrl->device,
238 "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
239
240 flush_work(&ctrl->reset_work);
241 nvme_stop_ctrl(ctrl);
242 nvme_remove_namespaces(ctrl);
243 ctrl->ops->delete_ctrl(ctrl);
244 nvme_uninit_ctrl(ctrl);
245 }
246
nvme_delete_ctrl_work(struct work_struct * work)247 static void nvme_delete_ctrl_work(struct work_struct *work)
248 {
249 struct nvme_ctrl *ctrl =
250 container_of(work, struct nvme_ctrl, delete_work);
251
252 nvme_do_delete_ctrl(ctrl);
253 }
254
nvme_delete_ctrl(struct nvme_ctrl * ctrl)255 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
256 {
257 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
258 return -EBUSY;
259 if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
260 return -EBUSY;
261 return 0;
262 }
263 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
264
nvme_delete_ctrl_sync(struct nvme_ctrl * ctrl)265 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
266 {
267 /*
268 * Keep a reference until nvme_do_delete_ctrl() complete,
269 * since ->delete_ctrl can free the controller.
270 */
271 nvme_get_ctrl(ctrl);
272 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
273 nvme_do_delete_ctrl(ctrl);
274 nvme_put_ctrl(ctrl);
275 }
276
nvme_error_status(u16 status)277 static blk_status_t nvme_error_status(u16 status)
278 {
279 switch (status & NVME_SCT_SC_MASK) {
280 case NVME_SC_SUCCESS:
281 return BLK_STS_OK;
282 case NVME_SC_CAP_EXCEEDED:
283 return BLK_STS_NOSPC;
284 case NVME_SC_LBA_RANGE:
285 case NVME_SC_CMD_INTERRUPTED:
286 case NVME_SC_NS_NOT_READY:
287 return BLK_STS_TARGET;
288 case NVME_SC_BAD_ATTRIBUTES:
289 case NVME_SC_ONCS_NOT_SUPPORTED:
290 case NVME_SC_INVALID_OPCODE:
291 case NVME_SC_INVALID_FIELD:
292 case NVME_SC_INVALID_NS:
293 return BLK_STS_NOTSUPP;
294 case NVME_SC_WRITE_FAULT:
295 case NVME_SC_READ_ERROR:
296 case NVME_SC_UNWRITTEN_BLOCK:
297 case NVME_SC_ACCESS_DENIED:
298 case NVME_SC_READ_ONLY:
299 case NVME_SC_COMPARE_FAILED:
300 return BLK_STS_MEDIUM;
301 case NVME_SC_GUARD_CHECK:
302 case NVME_SC_APPTAG_CHECK:
303 case NVME_SC_REFTAG_CHECK:
304 case NVME_SC_INVALID_PI:
305 return BLK_STS_PROTECTION;
306 case NVME_SC_RESERVATION_CONFLICT:
307 return BLK_STS_RESV_CONFLICT;
308 case NVME_SC_HOST_PATH_ERROR:
309 return BLK_STS_TRANSPORT;
310 case NVME_SC_ZONE_TOO_MANY_ACTIVE:
311 return BLK_STS_ZONE_ACTIVE_RESOURCE;
312 case NVME_SC_ZONE_TOO_MANY_OPEN:
313 return BLK_STS_ZONE_OPEN_RESOURCE;
314 default:
315 return BLK_STS_IOERR;
316 }
317 }
318
nvme_retry_req(struct request * req)319 static void nvme_retry_req(struct request *req)
320 {
321 unsigned long delay = 0;
322 u16 crd;
323
324 /* The mask and shift result must be <= 3 */
325 crd = (nvme_req(req)->status & NVME_STATUS_CRD) >> 11;
326 if (crd)
327 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
328
329 nvme_req(req)->retries++;
330 blk_mq_requeue_request(req, false);
331 blk_mq_delay_kick_requeue_list(req->q, delay);
332 }
333
nvme_log_error(struct request * req)334 static void nvme_log_error(struct request *req)
335 {
336 struct nvme_ns *ns = req->q->queuedata;
337 struct nvme_request *nr = nvme_req(req);
338
339 if (ns) {
340 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
341 ns->disk ? ns->disk->disk_name : "?",
342 nvme_get_opcode_str(nr->cmd->common.opcode),
343 nr->cmd->common.opcode,
344 nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
345 blk_rq_bytes(req) >> ns->head->lba_shift,
346 nvme_get_error_status_str(nr->status),
347 NVME_SCT(nr->status), /* Status Code Type */
348 nr->status & NVME_SC_MASK, /* Status Code */
349 nr->status & NVME_STATUS_MORE ? "MORE " : "",
350 nr->status & NVME_STATUS_DNR ? "DNR " : "");
351 return;
352 }
353
354 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
355 dev_name(nr->ctrl->device),
356 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
357 nr->cmd->common.opcode,
358 nvme_get_error_status_str(nr->status),
359 NVME_SCT(nr->status), /* Status Code Type */
360 nr->status & NVME_SC_MASK, /* Status Code */
361 nr->status & NVME_STATUS_MORE ? "MORE " : "",
362 nr->status & NVME_STATUS_DNR ? "DNR " : "");
363 }
364
nvme_log_err_passthru(struct request * req)365 static void nvme_log_err_passthru(struct request *req)
366 {
367 struct nvme_ns *ns = req->q->queuedata;
368 struct nvme_request *nr = nvme_req(req);
369
370 pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
371 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
372 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
373 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
374 nvme_get_admin_opcode_str(nr->cmd->common.opcode),
375 nr->cmd->common.opcode,
376 nvme_get_error_status_str(nr->status),
377 NVME_SCT(nr->status), /* Status Code Type */
378 nr->status & NVME_SC_MASK, /* Status Code */
379 nr->status & NVME_STATUS_MORE ? "MORE " : "",
380 nr->status & NVME_STATUS_DNR ? "DNR " : "",
381 nr->cmd->common.cdw10,
382 nr->cmd->common.cdw11,
383 nr->cmd->common.cdw12,
384 nr->cmd->common.cdw13,
385 nr->cmd->common.cdw14,
386 nr->cmd->common.cdw14);
387 }
388
389 enum nvme_disposition {
390 COMPLETE,
391 RETRY,
392 FAILOVER,
393 AUTHENTICATE,
394 };
395
nvme_decide_disposition(struct request * req)396 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
397 {
398 if (likely(nvme_req(req)->status == 0))
399 return COMPLETE;
400
401 if (blk_noretry_request(req) ||
402 (nvme_req(req)->status & NVME_STATUS_DNR) ||
403 nvme_req(req)->retries >= nvme_max_retries)
404 return COMPLETE;
405
406 if ((nvme_req(req)->status & NVME_SCT_SC_MASK) == NVME_SC_AUTH_REQUIRED)
407 return AUTHENTICATE;
408
409 if (req->cmd_flags & REQ_NVME_MPATH) {
410 if (nvme_is_path_error(nvme_req(req)->status) ||
411 blk_queue_dying(req->q))
412 return FAILOVER;
413 } else {
414 if (blk_queue_dying(req->q))
415 return COMPLETE;
416 }
417
418 return RETRY;
419 }
420
nvme_end_req_zoned(struct request * req)421 static inline void nvme_end_req_zoned(struct request *req)
422 {
423 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
424 req_op(req) == REQ_OP_ZONE_APPEND) {
425 struct nvme_ns *ns = req->q->queuedata;
426
427 req->__sector = nvme_lba_to_sect(ns->head,
428 le64_to_cpu(nvme_req(req)->result.u64));
429 }
430 }
431
__nvme_end_req(struct request * req)432 static inline void __nvme_end_req(struct request *req)
433 {
434 if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
435 if (blk_rq_is_passthrough(req))
436 nvme_log_err_passthru(req);
437 else
438 nvme_log_error(req);
439 }
440 nvme_end_req_zoned(req);
441 nvme_trace_bio_complete(req);
442 if (req->cmd_flags & REQ_NVME_MPATH)
443 nvme_mpath_end_request(req);
444 }
445
nvme_end_req(struct request * req)446 void nvme_end_req(struct request *req)
447 {
448 blk_status_t status = nvme_error_status(nvme_req(req)->status);
449
450 __nvme_end_req(req);
451 blk_mq_end_request(req, status);
452 }
453
nvme_complete_rq(struct request * req)454 void nvme_complete_rq(struct request *req)
455 {
456 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
457
458 trace_nvme_complete_rq(req);
459 nvme_cleanup_cmd(req);
460
461 /*
462 * Completions of long-running commands should not be able to
463 * defer sending of periodic keep alives, since the controller
464 * may have completed processing such commands a long time ago
465 * (arbitrarily close to command submission time).
466 * req->deadline - req->timeout is the command submission time
467 * in jiffies.
468 */
469 if (ctrl->kas &&
470 req->deadline - req->timeout >= ctrl->ka_last_check_time)
471 ctrl->comp_seen = true;
472
473 switch (nvme_decide_disposition(req)) {
474 case COMPLETE:
475 nvme_end_req(req);
476 return;
477 case RETRY:
478 nvme_retry_req(req);
479 return;
480 case FAILOVER:
481 nvme_failover_req(req);
482 return;
483 case AUTHENTICATE:
484 #ifdef CONFIG_NVME_HOST_AUTH
485 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
486 nvme_retry_req(req);
487 #else
488 nvme_end_req(req);
489 #endif
490 return;
491 }
492 }
493 EXPORT_SYMBOL_GPL(nvme_complete_rq);
494
nvme_complete_batch_req(struct request * req)495 void nvme_complete_batch_req(struct request *req)
496 {
497 trace_nvme_complete_rq(req);
498 nvme_cleanup_cmd(req);
499 __nvme_end_req(req);
500 }
501 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
502
503 /*
504 * Called to unwind from ->queue_rq on a failed command submission so that the
505 * multipathing code gets called to potentially failover to another path.
506 * The caller needs to unwind all transport specific resource allocations and
507 * must return propagate the return value.
508 */
nvme_host_path_error(struct request * req)509 blk_status_t nvme_host_path_error(struct request *req)
510 {
511 nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
512 blk_mq_set_request_complete(req);
513 nvme_complete_rq(req);
514 return BLK_STS_OK;
515 }
516 EXPORT_SYMBOL_GPL(nvme_host_path_error);
517
nvme_cancel_request(struct request * req,void * data)518 bool nvme_cancel_request(struct request *req, void *data)
519 {
520 dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
521 "Cancelling I/O %d", req->tag);
522
523 /* don't abort one completed or idle request */
524 if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
525 return true;
526
527 nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
528 nvme_req(req)->flags |= NVME_REQ_CANCELLED;
529 blk_mq_complete_request(req);
530 return true;
531 }
532 EXPORT_SYMBOL_GPL(nvme_cancel_request);
533
nvme_cancel_tagset(struct nvme_ctrl * ctrl)534 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
535 {
536 if (ctrl->tagset) {
537 blk_mq_tagset_busy_iter(ctrl->tagset,
538 nvme_cancel_request, ctrl);
539 blk_mq_tagset_wait_completed_request(ctrl->tagset);
540 }
541 }
542 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
543
nvme_cancel_admin_tagset(struct nvme_ctrl * ctrl)544 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
545 {
546 if (ctrl->admin_tagset) {
547 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
548 nvme_cancel_request, ctrl);
549 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
550 }
551 }
552 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
553
nvme_change_ctrl_state(struct nvme_ctrl * ctrl,enum nvme_ctrl_state new_state)554 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
555 enum nvme_ctrl_state new_state)
556 {
557 enum nvme_ctrl_state old_state;
558 unsigned long flags;
559 bool changed = false;
560
561 spin_lock_irqsave(&ctrl->lock, flags);
562
563 old_state = nvme_ctrl_state(ctrl);
564 switch (new_state) {
565 case NVME_CTRL_LIVE:
566 switch (old_state) {
567 case NVME_CTRL_CONNECTING:
568 changed = true;
569 fallthrough;
570 default:
571 break;
572 }
573 break;
574 case NVME_CTRL_RESETTING:
575 switch (old_state) {
576 case NVME_CTRL_NEW:
577 case NVME_CTRL_LIVE:
578 changed = true;
579 fallthrough;
580 default:
581 break;
582 }
583 break;
584 case NVME_CTRL_CONNECTING:
585 switch (old_state) {
586 case NVME_CTRL_NEW:
587 case NVME_CTRL_RESETTING:
588 changed = true;
589 fallthrough;
590 default:
591 break;
592 }
593 break;
594 case NVME_CTRL_DELETING:
595 switch (old_state) {
596 case NVME_CTRL_LIVE:
597 case NVME_CTRL_RESETTING:
598 case NVME_CTRL_CONNECTING:
599 changed = true;
600 fallthrough;
601 default:
602 break;
603 }
604 break;
605 case NVME_CTRL_DELETING_NOIO:
606 switch (old_state) {
607 case NVME_CTRL_DELETING:
608 case NVME_CTRL_DEAD:
609 changed = true;
610 fallthrough;
611 default:
612 break;
613 }
614 break;
615 case NVME_CTRL_DEAD:
616 switch (old_state) {
617 case NVME_CTRL_DELETING:
618 changed = true;
619 fallthrough;
620 default:
621 break;
622 }
623 break;
624 default:
625 break;
626 }
627
628 if (changed) {
629 WRITE_ONCE(ctrl->state, new_state);
630 wake_up_all(&ctrl->state_wq);
631 }
632
633 spin_unlock_irqrestore(&ctrl->lock, flags);
634 if (!changed)
635 return false;
636
637 if (new_state == NVME_CTRL_LIVE) {
638 if (old_state == NVME_CTRL_CONNECTING)
639 nvme_stop_failfast_work(ctrl);
640 nvme_kick_requeue_lists(ctrl);
641 } else if (new_state == NVME_CTRL_CONNECTING &&
642 old_state == NVME_CTRL_RESETTING) {
643 nvme_start_failfast_work(ctrl);
644 }
645 return changed;
646 }
647 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
648
649 /*
650 * Waits for the controller state to be resetting, or returns false if it is
651 * not possible to ever transition to that state.
652 */
nvme_wait_reset(struct nvme_ctrl * ctrl)653 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
654 {
655 wait_event(ctrl->state_wq,
656 nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
657 nvme_state_terminal(ctrl));
658 return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
659 }
660 EXPORT_SYMBOL_GPL(nvme_wait_reset);
661
nvme_free_ns_head(struct kref * ref)662 static void nvme_free_ns_head(struct kref *ref)
663 {
664 struct nvme_ns_head *head =
665 container_of(ref, struct nvme_ns_head, ref);
666
667 nvme_mpath_remove_disk(head);
668 ida_free(&head->subsys->ns_ida, head->instance);
669 cleanup_srcu_struct(&head->srcu);
670 nvme_put_subsystem(head->subsys);
671 kfree(head);
672 }
673
nvme_tryget_ns_head(struct nvme_ns_head * head)674 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
675 {
676 return kref_get_unless_zero(&head->ref);
677 }
678
nvme_put_ns_head(struct nvme_ns_head * head)679 void nvme_put_ns_head(struct nvme_ns_head *head)
680 {
681 kref_put(&head->ref, nvme_free_ns_head);
682 }
683
nvme_free_ns(struct kref * kref)684 static void nvme_free_ns(struct kref *kref)
685 {
686 struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
687
688 put_disk(ns->disk);
689 nvme_put_ns_head(ns->head);
690 nvme_put_ctrl(ns->ctrl);
691 kfree(ns);
692 }
693
nvme_get_ns(struct nvme_ns * ns)694 bool nvme_get_ns(struct nvme_ns *ns)
695 {
696 return kref_get_unless_zero(&ns->kref);
697 }
698
nvme_put_ns(struct nvme_ns * ns)699 void nvme_put_ns(struct nvme_ns *ns)
700 {
701 kref_put(&ns->kref, nvme_free_ns);
702 }
703 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, "NVME_TARGET_PASSTHRU");
704
nvme_clear_nvme_request(struct request * req)705 static inline void nvme_clear_nvme_request(struct request *req)
706 {
707 nvme_req(req)->status = 0;
708 nvme_req(req)->retries = 0;
709 nvme_req(req)->flags = 0;
710 req->rq_flags |= RQF_DONTPREP;
711 }
712
713 /* initialize a passthrough request */
nvme_init_request(struct request * req,struct nvme_command * cmd)714 void nvme_init_request(struct request *req, struct nvme_command *cmd)
715 {
716 struct nvme_request *nr = nvme_req(req);
717 bool logging_enabled;
718
719 if (req->q->queuedata) {
720 struct nvme_ns *ns = req->q->disk->private_data;
721
722 logging_enabled = ns->head->passthru_err_log_enabled;
723 req->timeout = NVME_IO_TIMEOUT;
724 } else { /* no queuedata implies admin queue */
725 logging_enabled = nr->ctrl->passthru_err_log_enabled;
726 req->timeout = NVME_ADMIN_TIMEOUT;
727 }
728
729 if (!logging_enabled)
730 req->rq_flags |= RQF_QUIET;
731
732 /* passthru commands should let the driver set the SGL flags */
733 cmd->common.flags &= ~NVME_CMD_SGL_ALL;
734
735 req->cmd_flags |= REQ_FAILFAST_DRIVER;
736 if (req->mq_hctx->type == HCTX_TYPE_POLL)
737 req->cmd_flags |= REQ_POLLED;
738 nvme_clear_nvme_request(req);
739 memcpy(nr->cmd, cmd, sizeof(*cmd));
740 }
741 EXPORT_SYMBOL_GPL(nvme_init_request);
742
743 /*
744 * For something we're not in a state to send to the device the default action
745 * is to busy it and retry it after the controller state is recovered. However,
746 * if the controller is deleting or if anything is marked for failfast or
747 * nvme multipath it is immediately failed.
748 *
749 * Note: commands used to initialize the controller will be marked for failfast.
750 * Note: nvme cli/ioctl commands are marked for failfast.
751 */
nvme_fail_nonready_command(struct nvme_ctrl * ctrl,struct request * rq)752 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
753 struct request *rq)
754 {
755 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
756
757 if (state != NVME_CTRL_DELETING_NOIO &&
758 state != NVME_CTRL_DELETING &&
759 state != NVME_CTRL_DEAD &&
760 !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
761 !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
762 return BLK_STS_RESOURCE;
763 return nvme_host_path_error(rq);
764 }
765 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
766
__nvme_check_ready(struct nvme_ctrl * ctrl,struct request * rq,bool queue_live,enum nvme_ctrl_state state)767 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
768 bool queue_live, enum nvme_ctrl_state state)
769 {
770 struct nvme_request *req = nvme_req(rq);
771
772 /*
773 * currently we have a problem sending passthru commands
774 * on the admin_q if the controller is not LIVE because we can't
775 * make sure that they are going out after the admin connect,
776 * controller enable and/or other commands in the initialization
777 * sequence. until the controller will be LIVE, fail with
778 * BLK_STS_RESOURCE so that they will be rescheduled.
779 */
780 if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
781 return false;
782
783 if (ctrl->ops->flags & NVME_F_FABRICS) {
784 /*
785 * Only allow commands on a live queue, except for the connect
786 * command, which is require to set the queue live in the
787 * appropinquate states.
788 */
789 switch (state) {
790 case NVME_CTRL_CONNECTING:
791 if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
792 (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
793 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
794 req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
795 return true;
796 break;
797 default:
798 break;
799 case NVME_CTRL_DEAD:
800 return false;
801 }
802 }
803
804 return queue_live;
805 }
806 EXPORT_SYMBOL_GPL(__nvme_check_ready);
807
nvme_setup_flush(struct nvme_ns * ns,struct nvme_command * cmnd)808 static inline void nvme_setup_flush(struct nvme_ns *ns,
809 struct nvme_command *cmnd)
810 {
811 memset(cmnd, 0, sizeof(*cmnd));
812 cmnd->common.opcode = nvme_cmd_flush;
813 cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
814 }
815
nvme_setup_discard(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)816 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
817 struct nvme_command *cmnd)
818 {
819 unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
820 struct nvme_dsm_range *range;
821 struct bio *bio;
822
823 /*
824 * Some devices do not consider the DSM 'Number of Ranges' field when
825 * determining how much data to DMA. Always allocate memory for maximum
826 * number of segments to prevent device reading beyond end of buffer.
827 */
828 static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
829
830 range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
831 if (!range) {
832 /*
833 * If we fail allocation our range, fallback to the controller
834 * discard page. If that's also busy, it's safe to return
835 * busy, as we know we can make progress once that's freed.
836 */
837 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
838 return BLK_STS_RESOURCE;
839
840 range = page_address(ns->ctrl->discard_page);
841 }
842
843 if (queue_max_discard_segments(req->q) == 1) {
844 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
845 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
846
847 range[0].cattr = cpu_to_le32(0);
848 range[0].nlb = cpu_to_le32(nlb);
849 range[0].slba = cpu_to_le64(slba);
850 n = 1;
851 } else {
852 __rq_for_each_bio(bio, req) {
853 u64 slba = nvme_sect_to_lba(ns->head,
854 bio->bi_iter.bi_sector);
855 u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
856
857 if (n < segments) {
858 range[n].cattr = cpu_to_le32(0);
859 range[n].nlb = cpu_to_le32(nlb);
860 range[n].slba = cpu_to_le64(slba);
861 }
862 n++;
863 }
864 }
865
866 if (WARN_ON_ONCE(n != segments)) {
867 if (virt_to_page(range) == ns->ctrl->discard_page)
868 clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
869 else
870 kfree(range);
871 return BLK_STS_IOERR;
872 }
873
874 memset(cmnd, 0, sizeof(*cmnd));
875 cmnd->dsm.opcode = nvme_cmd_dsm;
876 cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
877 cmnd->dsm.nr = cpu_to_le32(segments - 1);
878 cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
879
880 bvec_set_virt(&req->special_vec, range, alloc_size);
881 req->rq_flags |= RQF_SPECIAL_PAYLOAD;
882
883 return BLK_STS_OK;
884 }
885
nvme_set_app_tag(struct request * req,struct nvme_command * cmnd)886 static void nvme_set_app_tag(struct request *req, struct nvme_command *cmnd)
887 {
888 cmnd->rw.lbat = cpu_to_le16(bio_integrity(req->bio)->app_tag);
889 cmnd->rw.lbatm = cpu_to_le16(0xffff);
890 }
891
nvme_set_ref_tag(struct nvme_ns * ns,struct nvme_command * cmnd,struct request * req)892 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
893 struct request *req)
894 {
895 u32 upper, lower;
896 u64 ref48;
897
898 /* both rw and write zeroes share the same reftag format */
899 switch (ns->head->guard_type) {
900 case NVME_NVM_NS_16B_GUARD:
901 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
902 break;
903 case NVME_NVM_NS_64B_GUARD:
904 ref48 = ext_pi_ref_tag(req);
905 lower = lower_32_bits(ref48);
906 upper = upper_32_bits(ref48);
907
908 cmnd->rw.reftag = cpu_to_le32(lower);
909 cmnd->rw.cdw3 = cpu_to_le32(upper);
910 break;
911 default:
912 break;
913 }
914 }
915
nvme_setup_write_zeroes(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd)916 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
917 struct request *req, struct nvme_command *cmnd)
918 {
919 memset(cmnd, 0, sizeof(*cmnd));
920
921 if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
922 return nvme_setup_discard(ns, req, cmnd);
923
924 cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
925 cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
926 cmnd->write_zeroes.slba =
927 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
928 cmnd->write_zeroes.length =
929 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
930
931 if (!(req->cmd_flags & REQ_NOUNMAP) &&
932 (ns->head->features & NVME_NS_DEAC))
933 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
934
935 if (nvme_ns_has_pi(ns->head)) {
936 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
937
938 switch (ns->head->pi_type) {
939 case NVME_NS_DPS_PI_TYPE1:
940 case NVME_NS_DPS_PI_TYPE2:
941 nvme_set_ref_tag(ns, cmnd, req);
942 break;
943 }
944 }
945
946 return BLK_STS_OK;
947 }
948
949 /*
950 * NVMe does not support a dedicated command to issue an atomic write. A write
951 * which does adhere to the device atomic limits will silently be executed
952 * non-atomically. The request issuer should ensure that the write is within
953 * the queue atomic writes limits, but just validate this in case it is not.
954 */
nvme_valid_atomic_write(struct request * req)955 static bool nvme_valid_atomic_write(struct request *req)
956 {
957 struct request_queue *q = req->q;
958 u32 boundary_bytes = queue_atomic_write_boundary_bytes(q);
959
960 if (blk_rq_bytes(req) > queue_atomic_write_unit_max_bytes(q))
961 return false;
962
963 if (boundary_bytes) {
964 u64 mask = boundary_bytes - 1, imask = ~mask;
965 u64 start = blk_rq_pos(req) << SECTOR_SHIFT;
966 u64 end = start + blk_rq_bytes(req) - 1;
967
968 /* If greater then must be crossing a boundary */
969 if (blk_rq_bytes(req) > boundary_bytes)
970 return false;
971
972 if ((start & imask) != (end & imask))
973 return false;
974 }
975
976 return true;
977 }
978
nvme_setup_rw(struct nvme_ns * ns,struct request * req,struct nvme_command * cmnd,enum nvme_opcode op)979 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
980 struct request *req, struct nvme_command *cmnd,
981 enum nvme_opcode op)
982 {
983 u16 control = 0;
984 u32 dsmgmt = 0;
985
986 if (req->cmd_flags & REQ_FUA)
987 control |= NVME_RW_FUA;
988 if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
989 control |= NVME_RW_LR;
990
991 if (req->cmd_flags & REQ_RAHEAD)
992 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
993
994 if (req->cmd_flags & REQ_ATOMIC && !nvme_valid_atomic_write(req))
995 return BLK_STS_INVAL;
996
997 cmnd->rw.opcode = op;
998 cmnd->rw.flags = 0;
999 cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
1000 cmnd->rw.cdw2 = 0;
1001 cmnd->rw.cdw3 = 0;
1002 cmnd->rw.metadata = 0;
1003 cmnd->rw.slba =
1004 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
1005 cmnd->rw.length =
1006 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
1007 cmnd->rw.reftag = 0;
1008 cmnd->rw.lbat = 0;
1009 cmnd->rw.lbatm = 0;
1010
1011 if (ns->head->ms) {
1012 /*
1013 * If formated with metadata, the block layer always provides a
1014 * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled. Else
1015 * we enable the PRACT bit for protection information or set the
1016 * namespace capacity to zero to prevent any I/O.
1017 */
1018 if (!blk_integrity_rq(req)) {
1019 if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
1020 return BLK_STS_NOTSUPP;
1021 control |= NVME_RW_PRINFO_PRACT;
1022 }
1023
1024 if (bio_integrity_flagged(req->bio, BIP_CHECK_GUARD))
1025 control |= NVME_RW_PRINFO_PRCHK_GUARD;
1026 if (bio_integrity_flagged(req->bio, BIP_CHECK_REFTAG)) {
1027 control |= NVME_RW_PRINFO_PRCHK_REF;
1028 if (op == nvme_cmd_zone_append)
1029 control |= NVME_RW_APPEND_PIREMAP;
1030 nvme_set_ref_tag(ns, cmnd, req);
1031 }
1032 if (bio_integrity_flagged(req->bio, BIP_CHECK_APPTAG)) {
1033 control |= NVME_RW_PRINFO_PRCHK_APP;
1034 nvme_set_app_tag(req, cmnd);
1035 }
1036 }
1037
1038 cmnd->rw.control = cpu_to_le16(control);
1039 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
1040 return 0;
1041 }
1042
nvme_cleanup_cmd(struct request * req)1043 void nvme_cleanup_cmd(struct request *req)
1044 {
1045 if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1046 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1047
1048 if (req->special_vec.bv_page == ctrl->discard_page)
1049 clear_bit_unlock(0, &ctrl->discard_page_busy);
1050 else
1051 kfree(bvec_virt(&req->special_vec));
1052 req->rq_flags &= ~RQF_SPECIAL_PAYLOAD;
1053 }
1054 }
1055 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1056
nvme_setup_cmd(struct nvme_ns * ns,struct request * req)1057 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1058 {
1059 struct nvme_command *cmd = nvme_req(req)->cmd;
1060 blk_status_t ret = BLK_STS_OK;
1061
1062 if (!(req->rq_flags & RQF_DONTPREP))
1063 nvme_clear_nvme_request(req);
1064
1065 switch (req_op(req)) {
1066 case REQ_OP_DRV_IN:
1067 case REQ_OP_DRV_OUT:
1068 /* these are setup prior to execution in nvme_init_request() */
1069 break;
1070 case REQ_OP_FLUSH:
1071 nvme_setup_flush(ns, cmd);
1072 break;
1073 case REQ_OP_ZONE_RESET_ALL:
1074 case REQ_OP_ZONE_RESET:
1075 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1076 break;
1077 case REQ_OP_ZONE_OPEN:
1078 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1079 break;
1080 case REQ_OP_ZONE_CLOSE:
1081 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1082 break;
1083 case REQ_OP_ZONE_FINISH:
1084 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1085 break;
1086 case REQ_OP_WRITE_ZEROES:
1087 ret = nvme_setup_write_zeroes(ns, req, cmd);
1088 break;
1089 case REQ_OP_DISCARD:
1090 ret = nvme_setup_discard(ns, req, cmd);
1091 break;
1092 case REQ_OP_READ:
1093 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1094 break;
1095 case REQ_OP_WRITE:
1096 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1097 break;
1098 case REQ_OP_ZONE_APPEND:
1099 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1100 break;
1101 default:
1102 WARN_ON_ONCE(1);
1103 return BLK_STS_IOERR;
1104 }
1105
1106 cmd->common.command_id = nvme_cid(req);
1107 trace_nvme_setup_cmd(req, cmd);
1108 return ret;
1109 }
1110 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1111
1112 /*
1113 * Return values:
1114 * 0: success
1115 * >0: nvme controller's cqe status response
1116 * <0: kernel error in lieu of controller response
1117 */
nvme_execute_rq(struct request * rq,bool at_head)1118 int nvme_execute_rq(struct request *rq, bool at_head)
1119 {
1120 blk_status_t status;
1121
1122 status = blk_execute_rq(rq, at_head);
1123 if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1124 return -EINTR;
1125 if (nvme_req(rq)->status)
1126 return nvme_req(rq)->status;
1127 return blk_status_to_errno(status);
1128 }
1129 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, "NVME_TARGET_PASSTHRU");
1130
1131 /*
1132 * Returns 0 on success. If the result is negative, it's a Linux error code;
1133 * if the result is positive, it's an NVM Express status code
1134 */
__nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,union nvme_result * result,void * buffer,unsigned bufflen,int qid,nvme_submit_flags_t flags)1135 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1136 union nvme_result *result, void *buffer, unsigned bufflen,
1137 int qid, nvme_submit_flags_t flags)
1138 {
1139 struct request *req;
1140 int ret;
1141 blk_mq_req_flags_t blk_flags = 0;
1142
1143 if (flags & NVME_SUBMIT_NOWAIT)
1144 blk_flags |= BLK_MQ_REQ_NOWAIT;
1145 if (flags & NVME_SUBMIT_RESERVED)
1146 blk_flags |= BLK_MQ_REQ_RESERVED;
1147 if (qid == NVME_QID_ANY)
1148 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1149 else
1150 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1151 qid - 1);
1152
1153 if (IS_ERR(req))
1154 return PTR_ERR(req);
1155 nvme_init_request(req, cmd);
1156 if (flags & NVME_SUBMIT_RETRY)
1157 req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1158
1159 if (buffer && bufflen) {
1160 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1161 if (ret)
1162 goto out;
1163 }
1164
1165 ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1166 if (result && ret >= 0)
1167 *result = nvme_req(req)->result;
1168 out:
1169 blk_mq_free_request(req);
1170 return ret;
1171 }
1172 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1173
nvme_submit_sync_cmd(struct request_queue * q,struct nvme_command * cmd,void * buffer,unsigned bufflen)1174 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1175 void *buffer, unsigned bufflen)
1176 {
1177 return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1178 NVME_QID_ANY, 0);
1179 }
1180 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1181
nvme_command_effects(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1182 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1183 {
1184 u32 effects = 0;
1185
1186 if (ns) {
1187 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1188 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1189 dev_warn_once(ctrl->device,
1190 "IO command:%02x has unusual effects:%08x\n",
1191 opcode, effects);
1192
1193 /*
1194 * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1195 * which would deadlock when done on an I/O command. Note that
1196 * We already warn about an unusual effect above.
1197 */
1198 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1199 } else {
1200 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1201
1202 /* Ignore execution restrictions if any relaxation bits are set */
1203 if (effects & NVME_CMD_EFFECTS_CSER_MASK)
1204 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1205 }
1206
1207 return effects;
1208 }
1209 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, "NVME_TARGET_PASSTHRU");
1210
nvme_passthru_start(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u8 opcode)1211 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1212 {
1213 u32 effects = nvme_command_effects(ctrl, ns, opcode);
1214
1215 /*
1216 * For simplicity, IO to all namespaces is quiesced even if the command
1217 * effects say only one namespace is affected.
1218 */
1219 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1220 mutex_lock(&ctrl->scan_lock);
1221 mutex_lock(&ctrl->subsys->lock);
1222 nvme_mpath_start_freeze(ctrl->subsys);
1223 nvme_mpath_wait_freeze(ctrl->subsys);
1224 nvme_start_freeze(ctrl);
1225 nvme_wait_freeze(ctrl);
1226 }
1227 return effects;
1228 }
1229 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, "NVME_TARGET_PASSTHRU");
1230
nvme_passthru_end(struct nvme_ctrl * ctrl,struct nvme_ns * ns,u32 effects,struct nvme_command * cmd,int status)1231 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1232 struct nvme_command *cmd, int status)
1233 {
1234 if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1235 nvme_unfreeze(ctrl);
1236 nvme_mpath_unfreeze(ctrl->subsys);
1237 mutex_unlock(&ctrl->subsys->lock);
1238 mutex_unlock(&ctrl->scan_lock);
1239 }
1240 if (effects & NVME_CMD_EFFECTS_CCC) {
1241 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1242 &ctrl->flags)) {
1243 dev_info(ctrl->device,
1244 "controller capabilities changed, reset may be required to take effect.\n");
1245 }
1246 }
1247 if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1248 nvme_queue_scan(ctrl);
1249 flush_work(&ctrl->scan_work);
1250 }
1251 if (ns)
1252 return;
1253
1254 switch (cmd->common.opcode) {
1255 case nvme_admin_set_features:
1256 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1257 case NVME_FEAT_KATO:
1258 /*
1259 * Keep alive commands interval on the host should be
1260 * updated when KATO is modified by Set Features
1261 * commands.
1262 */
1263 if (!status)
1264 nvme_update_keep_alive(ctrl, cmd);
1265 break;
1266 default:
1267 break;
1268 }
1269 break;
1270 default:
1271 break;
1272 }
1273 }
1274 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, "NVME_TARGET_PASSTHRU");
1275
1276 /*
1277 * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1278 *
1279 * The host should send Keep Alive commands at half of the Keep Alive Timeout
1280 * accounting for transport roundtrip times [..].
1281 */
nvme_keep_alive_work_period(struct nvme_ctrl * ctrl)1282 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1283 {
1284 unsigned long delay = ctrl->kato * HZ / 2;
1285
1286 /*
1287 * When using Traffic Based Keep Alive, we need to run
1288 * nvme_keep_alive_work at twice the normal frequency, as one
1289 * command completion can postpone sending a keep alive command
1290 * by up to twice the delay between runs.
1291 */
1292 if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1293 delay /= 2;
1294 return delay;
1295 }
1296
nvme_queue_keep_alive_work(struct nvme_ctrl * ctrl)1297 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1298 {
1299 unsigned long now = jiffies;
1300 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1301 unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1302
1303 if (time_after(now, ka_next_check_tm))
1304 delay = 0;
1305 else
1306 delay = ka_next_check_tm - now;
1307
1308 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1309 }
1310
nvme_keep_alive_end_io(struct request * rq,blk_status_t status)1311 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1312 blk_status_t status)
1313 {
1314 struct nvme_ctrl *ctrl = rq->end_io_data;
1315 unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1316 unsigned long delay = nvme_keep_alive_work_period(ctrl);
1317 enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
1318
1319 /*
1320 * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1321 * at the desired frequency.
1322 */
1323 if (rtt <= delay) {
1324 delay -= rtt;
1325 } else {
1326 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1327 jiffies_to_msecs(rtt));
1328 delay = 0;
1329 }
1330
1331 blk_mq_free_request(rq);
1332
1333 if (status) {
1334 dev_err(ctrl->device,
1335 "failed nvme_keep_alive_end_io error=%d\n",
1336 status);
1337 return RQ_END_IO_NONE;
1338 }
1339
1340 ctrl->ka_last_check_time = jiffies;
1341 ctrl->comp_seen = false;
1342 if (state == NVME_CTRL_LIVE || state == NVME_CTRL_CONNECTING)
1343 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1344 return RQ_END_IO_NONE;
1345 }
1346
nvme_keep_alive_work(struct work_struct * work)1347 static void nvme_keep_alive_work(struct work_struct *work)
1348 {
1349 struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1350 struct nvme_ctrl, ka_work);
1351 bool comp_seen = ctrl->comp_seen;
1352 struct request *rq;
1353
1354 ctrl->ka_last_check_time = jiffies;
1355
1356 if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1357 dev_dbg(ctrl->device,
1358 "reschedule traffic based keep-alive timer\n");
1359 ctrl->comp_seen = false;
1360 nvme_queue_keep_alive_work(ctrl);
1361 return;
1362 }
1363
1364 rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1365 BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1366 if (IS_ERR(rq)) {
1367 /* allocation failure, reset the controller */
1368 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1369 nvme_reset_ctrl(ctrl);
1370 return;
1371 }
1372 nvme_init_request(rq, &ctrl->ka_cmd);
1373
1374 rq->timeout = ctrl->kato * HZ;
1375 rq->end_io = nvme_keep_alive_end_io;
1376 rq->end_io_data = ctrl;
1377 blk_execute_rq_nowait(rq, false);
1378 }
1379
nvme_start_keep_alive(struct nvme_ctrl * ctrl)1380 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1381 {
1382 if (unlikely(ctrl->kato == 0))
1383 return;
1384
1385 nvme_queue_keep_alive_work(ctrl);
1386 }
1387
nvme_stop_keep_alive(struct nvme_ctrl * ctrl)1388 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1389 {
1390 if (unlikely(ctrl->kato == 0))
1391 return;
1392
1393 cancel_delayed_work_sync(&ctrl->ka_work);
1394 }
1395 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1396
nvme_update_keep_alive(struct nvme_ctrl * ctrl,struct nvme_command * cmd)1397 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1398 struct nvme_command *cmd)
1399 {
1400 unsigned int new_kato =
1401 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1402
1403 dev_info(ctrl->device,
1404 "keep alive interval updated from %u ms to %u ms\n",
1405 ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1406
1407 nvme_stop_keep_alive(ctrl);
1408 ctrl->kato = new_kato;
1409 nvme_start_keep_alive(ctrl);
1410 }
1411
nvme_id_cns_ok(struct nvme_ctrl * ctrl,u8 cns)1412 static bool nvme_id_cns_ok(struct nvme_ctrl *ctrl, u8 cns)
1413 {
1414 /*
1415 * The CNS field occupies a full byte starting with NVMe 1.2
1416 */
1417 if (ctrl->vs >= NVME_VS(1, 2, 0))
1418 return true;
1419
1420 /*
1421 * NVMe 1.1 expanded the CNS value to two bits, which means values
1422 * larger than that could get truncated and treated as an incorrect
1423 * value.
1424 *
1425 * Qemu implemented 1.0 behavior for controllers claiming 1.1
1426 * compliance, so they need to be quirked here.
1427 */
1428 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1429 !(ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS))
1430 return cns <= 3;
1431
1432 /*
1433 * NVMe 1.0 used a single bit for the CNS value.
1434 */
1435 return cns <= 1;
1436 }
1437
nvme_identify_ctrl(struct nvme_ctrl * dev,struct nvme_id_ctrl ** id)1438 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1439 {
1440 struct nvme_command c = { };
1441 int error;
1442
1443 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1444 c.identify.opcode = nvme_admin_identify;
1445 c.identify.cns = NVME_ID_CNS_CTRL;
1446
1447 *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1448 if (!*id)
1449 return -ENOMEM;
1450
1451 error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1452 sizeof(struct nvme_id_ctrl));
1453 if (error) {
1454 kfree(*id);
1455 *id = NULL;
1456 }
1457 return error;
1458 }
1459
nvme_process_ns_desc(struct nvme_ctrl * ctrl,struct nvme_ns_ids * ids,struct nvme_ns_id_desc * cur,bool * csi_seen)1460 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1461 struct nvme_ns_id_desc *cur, bool *csi_seen)
1462 {
1463 const char *warn_str = "ctrl returned bogus length:";
1464 void *data = cur;
1465
1466 switch (cur->nidt) {
1467 case NVME_NIDT_EUI64:
1468 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1469 dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1470 warn_str, cur->nidl);
1471 return -1;
1472 }
1473 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1474 return NVME_NIDT_EUI64_LEN;
1475 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1476 return NVME_NIDT_EUI64_LEN;
1477 case NVME_NIDT_NGUID:
1478 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1479 dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1480 warn_str, cur->nidl);
1481 return -1;
1482 }
1483 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1484 return NVME_NIDT_NGUID_LEN;
1485 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1486 return NVME_NIDT_NGUID_LEN;
1487 case NVME_NIDT_UUID:
1488 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1489 dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1490 warn_str, cur->nidl);
1491 return -1;
1492 }
1493 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1494 return NVME_NIDT_UUID_LEN;
1495 uuid_copy(&ids->uuid, data + sizeof(*cur));
1496 return NVME_NIDT_UUID_LEN;
1497 case NVME_NIDT_CSI:
1498 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1499 dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1500 warn_str, cur->nidl);
1501 return -1;
1502 }
1503 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1504 *csi_seen = true;
1505 return NVME_NIDT_CSI_LEN;
1506 default:
1507 /* Skip unknown types */
1508 return cur->nidl;
1509 }
1510 }
1511
nvme_identify_ns_descs(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1512 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1513 struct nvme_ns_info *info)
1514 {
1515 struct nvme_command c = { };
1516 bool csi_seen = false;
1517 int status, pos, len;
1518 void *data;
1519
1520 if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1521 return 0;
1522 if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1523 return 0;
1524
1525 c.identify.opcode = nvme_admin_identify;
1526 c.identify.nsid = cpu_to_le32(info->nsid);
1527 c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1528
1529 data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1530 if (!data)
1531 return -ENOMEM;
1532
1533 status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1534 NVME_IDENTIFY_DATA_SIZE);
1535 if (status) {
1536 dev_warn(ctrl->device,
1537 "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1538 info->nsid, status);
1539 goto free_data;
1540 }
1541
1542 for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1543 struct nvme_ns_id_desc *cur = data + pos;
1544
1545 if (cur->nidl == 0)
1546 break;
1547
1548 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1549 if (len < 0)
1550 break;
1551
1552 len += sizeof(*cur);
1553 }
1554
1555 if (nvme_multi_css(ctrl) && !csi_seen) {
1556 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1557 info->nsid);
1558 status = -EINVAL;
1559 }
1560
1561 free_data:
1562 kfree(data);
1563 return status;
1564 }
1565
nvme_identify_ns(struct nvme_ctrl * ctrl,unsigned nsid,struct nvme_id_ns ** id)1566 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1567 struct nvme_id_ns **id)
1568 {
1569 struct nvme_command c = { };
1570 int error;
1571
1572 /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1573 c.identify.opcode = nvme_admin_identify;
1574 c.identify.nsid = cpu_to_le32(nsid);
1575 c.identify.cns = NVME_ID_CNS_NS;
1576
1577 *id = kmalloc(sizeof(**id), GFP_KERNEL);
1578 if (!*id)
1579 return -ENOMEM;
1580
1581 error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1582 if (error) {
1583 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1584 kfree(*id);
1585 *id = NULL;
1586 }
1587 return error;
1588 }
1589
nvme_ns_info_from_identify(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1590 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1591 struct nvme_ns_info *info)
1592 {
1593 struct nvme_ns_ids *ids = &info->ids;
1594 struct nvme_id_ns *id;
1595 int ret;
1596
1597 ret = nvme_identify_ns(ctrl, info->nsid, &id);
1598 if (ret)
1599 return ret;
1600
1601 if (id->ncap == 0) {
1602 /* namespace not allocated or attached */
1603 info->is_removed = true;
1604 ret = -ENODEV;
1605 goto error;
1606 }
1607
1608 info->anagrpid = id->anagrpid;
1609 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1610 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1611 info->is_ready = true;
1612 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1613 dev_info(ctrl->device,
1614 "Ignoring bogus Namespace Identifiers\n");
1615 } else {
1616 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1617 !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1618 memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1619 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1620 !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1621 memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1622 }
1623
1624 error:
1625 kfree(id);
1626 return ret;
1627 }
1628
nvme_ns_info_from_id_cs_indep(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)1629 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1630 struct nvme_ns_info *info)
1631 {
1632 struct nvme_id_ns_cs_indep *id;
1633 struct nvme_command c = {
1634 .identify.opcode = nvme_admin_identify,
1635 .identify.nsid = cpu_to_le32(info->nsid),
1636 .identify.cns = NVME_ID_CNS_NS_CS_INDEP,
1637 };
1638 int ret;
1639
1640 id = kmalloc(sizeof(*id), GFP_KERNEL);
1641 if (!id)
1642 return -ENOMEM;
1643
1644 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1645 if (!ret) {
1646 info->anagrpid = id->anagrpid;
1647 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1648 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1649 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1650 info->is_rotational = id->nsfeat & NVME_NS_ROTATIONAL;
1651 info->no_vwc = id->nsfeat & NVME_NS_VWC_NOT_PRESENT;
1652 }
1653 kfree(id);
1654 return ret;
1655 }
1656
nvme_features(struct nvme_ctrl * dev,u8 op,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1657 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1658 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1659 {
1660 union nvme_result res = { 0 };
1661 struct nvme_command c = { };
1662 int ret;
1663
1664 c.features.opcode = op;
1665 c.features.fid = cpu_to_le32(fid);
1666 c.features.dword11 = cpu_to_le32(dword11);
1667
1668 ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1669 buffer, buflen, NVME_QID_ANY, 0);
1670 if (ret >= 0 && result)
1671 *result = le32_to_cpu(res.u32);
1672 return ret;
1673 }
1674
nvme_set_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1675 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1676 unsigned int dword11, void *buffer, size_t buflen,
1677 u32 *result)
1678 {
1679 return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1680 buflen, result);
1681 }
1682 EXPORT_SYMBOL_GPL(nvme_set_features);
1683
nvme_get_features(struct nvme_ctrl * dev,unsigned int fid,unsigned int dword11,void * buffer,size_t buflen,u32 * result)1684 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1685 unsigned int dword11, void *buffer, size_t buflen,
1686 u32 *result)
1687 {
1688 return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1689 buflen, result);
1690 }
1691 EXPORT_SYMBOL_GPL(nvme_get_features);
1692
nvme_set_queue_count(struct nvme_ctrl * ctrl,int * count)1693 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1694 {
1695 u32 q_count = (*count - 1) | ((*count - 1) << 16);
1696 u32 result;
1697 int status, nr_io_queues;
1698
1699 status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1700 &result);
1701
1702 /*
1703 * It's either a kernel error or the host observed a connection
1704 * lost. In either case it's not possible communicate with the
1705 * controller and thus enter the error code path.
1706 */
1707 if (status < 0 || status == NVME_SC_HOST_PATH_ERROR)
1708 return status;
1709
1710 /*
1711 * Degraded controllers might return an error when setting the queue
1712 * count. We still want to be able to bring them online and offer
1713 * access to the admin queue, as that might be only way to fix them up.
1714 */
1715 if (status > 0) {
1716 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1717 *count = 0;
1718 } else {
1719 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1720 *count = min(*count, nr_io_queues);
1721 }
1722
1723 return 0;
1724 }
1725 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1726
1727 #define NVME_AEN_SUPPORTED \
1728 (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1729 NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1730
nvme_enable_aen(struct nvme_ctrl * ctrl)1731 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1732 {
1733 u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1734 int status;
1735
1736 if (!supported_aens)
1737 return;
1738
1739 status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1740 NULL, 0, &result);
1741 if (status)
1742 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1743 supported_aens);
1744
1745 queue_work(nvme_wq, &ctrl->async_event_work);
1746 }
1747
nvme_ns_open(struct nvme_ns * ns)1748 static int nvme_ns_open(struct nvme_ns *ns)
1749 {
1750
1751 /* should never be called due to GENHD_FL_HIDDEN */
1752 if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1753 goto fail;
1754 if (!nvme_get_ns(ns))
1755 goto fail;
1756 if (!try_module_get(ns->ctrl->ops->module))
1757 goto fail_put_ns;
1758
1759 return 0;
1760
1761 fail_put_ns:
1762 nvme_put_ns(ns);
1763 fail:
1764 return -ENXIO;
1765 }
1766
nvme_ns_release(struct nvme_ns * ns)1767 static void nvme_ns_release(struct nvme_ns *ns)
1768 {
1769
1770 module_put(ns->ctrl->ops->module);
1771 nvme_put_ns(ns);
1772 }
1773
nvme_open(struct gendisk * disk,blk_mode_t mode)1774 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1775 {
1776 return nvme_ns_open(disk->private_data);
1777 }
1778
nvme_release(struct gendisk * disk)1779 static void nvme_release(struct gendisk *disk)
1780 {
1781 nvme_ns_release(disk->private_data);
1782 }
1783
nvme_getgeo(struct block_device * bdev,struct hd_geometry * geo)1784 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1785 {
1786 /* some standard values */
1787 geo->heads = 1 << 6;
1788 geo->sectors = 1 << 5;
1789 geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1790 return 0;
1791 }
1792
nvme_init_integrity(struct nvme_ns_head * head,struct queue_limits * lim,struct nvme_ns_info * info)1793 static bool nvme_init_integrity(struct nvme_ns_head *head,
1794 struct queue_limits *lim, struct nvme_ns_info *info)
1795 {
1796 struct blk_integrity *bi = &lim->integrity;
1797
1798 memset(bi, 0, sizeof(*bi));
1799
1800 if (!head->ms)
1801 return true;
1802
1803 /*
1804 * PI can always be supported as we can ask the controller to simply
1805 * insert/strip it, which is not possible for other kinds of metadata.
1806 */
1807 if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1808 !(head->features & NVME_NS_METADATA_SUPPORTED))
1809 return nvme_ns_has_pi(head);
1810
1811 switch (head->pi_type) {
1812 case NVME_NS_DPS_PI_TYPE3:
1813 switch (head->guard_type) {
1814 case NVME_NVM_NS_16B_GUARD:
1815 bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1816 bi->tag_size = sizeof(u16) + sizeof(u32);
1817 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1818 break;
1819 case NVME_NVM_NS_64B_GUARD:
1820 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1821 bi->tag_size = sizeof(u16) + 6;
1822 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1823 break;
1824 default:
1825 break;
1826 }
1827 break;
1828 case NVME_NS_DPS_PI_TYPE1:
1829 case NVME_NS_DPS_PI_TYPE2:
1830 switch (head->guard_type) {
1831 case NVME_NVM_NS_16B_GUARD:
1832 bi->csum_type = BLK_INTEGRITY_CSUM_CRC;
1833 bi->tag_size = sizeof(u16);
1834 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1835 BLK_INTEGRITY_REF_TAG;
1836 break;
1837 case NVME_NVM_NS_64B_GUARD:
1838 bi->csum_type = BLK_INTEGRITY_CSUM_CRC64;
1839 bi->tag_size = sizeof(u16);
1840 bi->flags |= BLK_INTEGRITY_DEVICE_CAPABLE |
1841 BLK_INTEGRITY_REF_TAG;
1842 break;
1843 default:
1844 break;
1845 }
1846 break;
1847 default:
1848 break;
1849 }
1850
1851 bi->tuple_size = head->ms;
1852 bi->pi_offset = info->pi_offset;
1853 return true;
1854 }
1855
nvme_config_discard(struct nvme_ns * ns,struct queue_limits * lim)1856 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim)
1857 {
1858 struct nvme_ctrl *ctrl = ns->ctrl;
1859
1860 if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX))
1861 lim->max_hw_discard_sectors =
1862 nvme_lba_to_sect(ns->head, ctrl->dmrsl);
1863 else if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
1864 lim->max_hw_discard_sectors = UINT_MAX;
1865 else
1866 lim->max_hw_discard_sectors = 0;
1867
1868 lim->discard_granularity = lim->logical_block_size;
1869
1870 if (ctrl->dmrl)
1871 lim->max_discard_segments = ctrl->dmrl;
1872 else
1873 lim->max_discard_segments = NVME_DSM_MAX_RANGES;
1874 }
1875
nvme_ns_ids_equal(struct nvme_ns_ids * a,struct nvme_ns_ids * b)1876 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1877 {
1878 return uuid_equal(&a->uuid, &b->uuid) &&
1879 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1880 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1881 a->csi == b->csi;
1882 }
1883
nvme_identify_ns_nvm(struct nvme_ctrl * ctrl,unsigned int nsid,struct nvme_id_ns_nvm ** nvmp)1884 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1885 struct nvme_id_ns_nvm **nvmp)
1886 {
1887 struct nvme_command c = {
1888 .identify.opcode = nvme_admin_identify,
1889 .identify.nsid = cpu_to_le32(nsid),
1890 .identify.cns = NVME_ID_CNS_CS_NS,
1891 .identify.csi = NVME_CSI_NVM,
1892 };
1893 struct nvme_id_ns_nvm *nvm;
1894 int ret;
1895
1896 nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1897 if (!nvm)
1898 return -ENOMEM;
1899
1900 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1901 if (ret)
1902 kfree(nvm);
1903 else
1904 *nvmp = nvm;
1905 return ret;
1906 }
1907
nvme_configure_pi_elbas(struct nvme_ns_head * head,struct nvme_id_ns * id,struct nvme_id_ns_nvm * nvm)1908 static void nvme_configure_pi_elbas(struct nvme_ns_head *head,
1909 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm)
1910 {
1911 u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]);
1912 u8 guard_type;
1913
1914 /* no support for storage tag formats right now */
1915 if (nvme_elbaf_sts(elbaf))
1916 return;
1917
1918 guard_type = nvme_elbaf_guard_type(elbaf);
1919 if ((nvm->pic & NVME_ID_NS_NVM_QPIFS) &&
1920 guard_type == NVME_NVM_NS_QTYPE_GUARD)
1921 guard_type = nvme_elbaf_qualified_guard_type(elbaf);
1922
1923 head->guard_type = guard_type;
1924 switch (head->guard_type) {
1925 case NVME_NVM_NS_64B_GUARD:
1926 head->pi_size = sizeof(struct crc64_pi_tuple);
1927 break;
1928 case NVME_NVM_NS_16B_GUARD:
1929 head->pi_size = sizeof(struct t10_pi_tuple);
1930 break;
1931 default:
1932 break;
1933 }
1934 }
1935
nvme_configure_metadata(struct nvme_ctrl * ctrl,struct nvme_ns_head * head,struct nvme_id_ns * id,struct nvme_id_ns_nvm * nvm,struct nvme_ns_info * info)1936 static void nvme_configure_metadata(struct nvme_ctrl *ctrl,
1937 struct nvme_ns_head *head, struct nvme_id_ns *id,
1938 struct nvme_id_ns_nvm *nvm, struct nvme_ns_info *info)
1939 {
1940 head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1941 head->pi_type = 0;
1942 head->pi_size = 0;
1943 head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms);
1944 if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1945 return;
1946
1947 if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1948 nvme_configure_pi_elbas(head, id, nvm);
1949 } else {
1950 head->pi_size = sizeof(struct t10_pi_tuple);
1951 head->guard_type = NVME_NVM_NS_16B_GUARD;
1952 }
1953
1954 if (head->pi_size && head->ms >= head->pi_size)
1955 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1956 if (!(id->dps & NVME_NS_DPS_PI_FIRST)) {
1957 if (disable_pi_offsets)
1958 head->pi_type = 0;
1959 else
1960 info->pi_offset = head->ms - head->pi_size;
1961 }
1962
1963 if (ctrl->ops->flags & NVME_F_FABRICS) {
1964 /*
1965 * The NVMe over Fabrics specification only supports metadata as
1966 * part of the extended data LBA. We rely on HCA/HBA support to
1967 * remap the separate metadata buffer from the block layer.
1968 */
1969 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1970 return;
1971
1972 head->features |= NVME_NS_EXT_LBAS;
1973
1974 /*
1975 * The current fabrics transport drivers support namespace
1976 * metadata formats only if nvme_ns_has_pi() returns true.
1977 * Suppress support for all other formats so the namespace will
1978 * have a 0 capacity and not be usable through the block stack.
1979 *
1980 * Note, this check will need to be modified if any drivers
1981 * gain the ability to use other metadata formats.
1982 */
1983 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1984 head->features |= NVME_NS_METADATA_SUPPORTED;
1985 } else {
1986 /*
1987 * For PCIe controllers, we can't easily remap the separate
1988 * metadata buffer from the block layer and thus require a
1989 * separate metadata buffer for block layer metadata/PI support.
1990 * We allow extended LBAs for the passthrough interface, though.
1991 */
1992 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1993 head->features |= NVME_NS_EXT_LBAS;
1994 else
1995 head->features |= NVME_NS_METADATA_SUPPORTED;
1996 }
1997 }
1998
1999
nvme_update_atomic_write_disk_info(struct nvme_ns * ns,struct nvme_id_ns * id,struct queue_limits * lim,u32 bs,u32 atomic_bs)2000 static void nvme_update_atomic_write_disk_info(struct nvme_ns *ns,
2001 struct nvme_id_ns *id, struct queue_limits *lim,
2002 u32 bs, u32 atomic_bs)
2003 {
2004 unsigned int boundary = 0;
2005
2006 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf) {
2007 if (le16_to_cpu(id->nabspf))
2008 boundary = (le16_to_cpu(id->nabspf) + 1) * bs;
2009 }
2010 lim->atomic_write_hw_max = atomic_bs;
2011 lim->atomic_write_hw_boundary = boundary;
2012 lim->atomic_write_hw_unit_min = bs;
2013 lim->atomic_write_hw_unit_max = rounddown_pow_of_two(atomic_bs);
2014 lim->features |= BLK_FEAT_ATOMIC_WRITES;
2015 }
2016
nvme_max_drv_segments(struct nvme_ctrl * ctrl)2017 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
2018 {
2019 return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
2020 }
2021
nvme_set_ctrl_limits(struct nvme_ctrl * ctrl,struct queue_limits * lim)2022 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl,
2023 struct queue_limits *lim)
2024 {
2025 lim->max_hw_sectors = ctrl->max_hw_sectors;
2026 lim->max_segments = min_t(u32, USHRT_MAX,
2027 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments));
2028 lim->max_integrity_segments = ctrl->max_integrity_segments;
2029 lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1;
2030 lim->max_segment_size = UINT_MAX;
2031 lim->dma_alignment = 3;
2032 }
2033
nvme_update_disk_info(struct nvme_ns * ns,struct nvme_id_ns * id,struct queue_limits * lim)2034 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id,
2035 struct queue_limits *lim)
2036 {
2037 struct nvme_ns_head *head = ns->head;
2038 u32 bs = 1U << head->lba_shift;
2039 u32 atomic_bs, phys_bs, io_opt = 0;
2040 bool valid = true;
2041
2042 /*
2043 * The block layer can't support LBA sizes larger than the page size
2044 * or smaller than a sector size yet, so catch this early and don't
2045 * allow block I/O.
2046 */
2047 if (blk_validate_block_size(bs)) {
2048 bs = (1 << 9);
2049 valid = false;
2050 }
2051
2052 atomic_bs = phys_bs = bs;
2053 if (id->nabo == 0) {
2054 /*
2055 * Bit 1 indicates whether NAWUPF is defined for this namespace
2056 * and whether it should be used instead of AWUPF. If NAWUPF ==
2057 * 0 then AWUPF must be used instead.
2058 */
2059 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
2060 atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
2061 else
2062 atomic_bs = (1 + ns->ctrl->awupf) * bs;
2063
2064 /*
2065 * Set subsystem atomic bs.
2066 */
2067 if (ns->ctrl->subsys->atomic_bs) {
2068 if (atomic_bs != ns->ctrl->subsys->atomic_bs) {
2069 dev_err_ratelimited(ns->ctrl->device,
2070 "%s: Inconsistent Atomic Write Size, Namespace will not be added: Subsystem=%d bytes, Controller/Namespace=%d bytes\n",
2071 ns->disk ? ns->disk->disk_name : "?",
2072 ns->ctrl->subsys->atomic_bs,
2073 atomic_bs);
2074 }
2075 } else
2076 ns->ctrl->subsys->atomic_bs = atomic_bs;
2077
2078 nvme_update_atomic_write_disk_info(ns, id, lim, bs, atomic_bs);
2079 }
2080
2081 if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
2082 /* NPWG = Namespace Preferred Write Granularity */
2083 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
2084 /* NOWS = Namespace Optimal Write Size */
2085 if (id->nows)
2086 io_opt = bs * (1 + le16_to_cpu(id->nows));
2087 }
2088
2089 /*
2090 * Linux filesystems assume writing a single physical block is
2091 * an atomic operation. Hence limit the physical block size to the
2092 * value of the Atomic Write Unit Power Fail parameter.
2093 */
2094 lim->logical_block_size = bs;
2095 lim->physical_block_size = min(phys_bs, atomic_bs);
2096 lim->io_min = phys_bs;
2097 lim->io_opt = io_opt;
2098 if ((ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES) &&
2099 (ns->ctrl->oncs & NVME_CTRL_ONCS_DSM))
2100 lim->max_write_zeroes_sectors = UINT_MAX;
2101 else
2102 lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors;
2103 return valid;
2104 }
2105
nvme_ns_is_readonly(struct nvme_ns * ns,struct nvme_ns_info * info)2106 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2107 {
2108 return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2109 }
2110
nvme_first_scan(struct gendisk * disk)2111 static inline bool nvme_first_scan(struct gendisk *disk)
2112 {
2113 /* nvme_alloc_ns() scans the disk prior to adding it */
2114 return !disk_live(disk);
2115 }
2116
nvme_set_chunk_sectors(struct nvme_ns * ns,struct nvme_id_ns * id,struct queue_limits * lim)2117 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id,
2118 struct queue_limits *lim)
2119 {
2120 struct nvme_ctrl *ctrl = ns->ctrl;
2121 u32 iob;
2122
2123 if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2124 is_power_of_2(ctrl->max_hw_sectors))
2125 iob = ctrl->max_hw_sectors;
2126 else
2127 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2128
2129 if (!iob)
2130 return;
2131
2132 if (!is_power_of_2(iob)) {
2133 if (nvme_first_scan(ns->disk))
2134 pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2135 ns->disk->disk_name, iob);
2136 return;
2137 }
2138
2139 if (blk_queue_is_zoned(ns->disk->queue)) {
2140 if (nvme_first_scan(ns->disk))
2141 pr_warn("%s: ignoring zoned namespace IO boundary\n",
2142 ns->disk->disk_name);
2143 return;
2144 }
2145
2146 lim->chunk_sectors = iob;
2147 }
2148
nvme_update_ns_info_generic(struct nvme_ns * ns,struct nvme_ns_info * info)2149 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2150 struct nvme_ns_info *info)
2151 {
2152 struct queue_limits lim;
2153 unsigned int memflags;
2154 int ret;
2155
2156 lim = queue_limits_start_update(ns->disk->queue);
2157 nvme_set_ctrl_limits(ns->ctrl, &lim);
2158
2159 memflags = blk_mq_freeze_queue(ns->disk->queue);
2160 ret = queue_limits_commit_update(ns->disk->queue, &lim);
2161 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2162 blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2163
2164 /* Hide the block-interface for these devices */
2165 if (!ret)
2166 ret = -ENODEV;
2167 return ret;
2168 }
2169
nvme_update_ns_info_block(struct nvme_ns * ns,struct nvme_ns_info * info)2170 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2171 struct nvme_ns_info *info)
2172 {
2173 struct queue_limits lim;
2174 struct nvme_id_ns_nvm *nvm = NULL;
2175 struct nvme_zone_info zi = {};
2176 struct nvme_id_ns *id;
2177 unsigned int memflags;
2178 sector_t capacity;
2179 unsigned lbaf;
2180 int ret;
2181
2182 ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2183 if (ret)
2184 return ret;
2185
2186 if (id->ncap == 0) {
2187 /* namespace not allocated or attached */
2188 info->is_removed = true;
2189 ret = -ENXIO;
2190 goto out;
2191 }
2192 lbaf = nvme_lbaf_index(id->flbas);
2193
2194 if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) {
2195 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm);
2196 if (ret < 0)
2197 goto out;
2198 }
2199
2200 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2201 ns->head->ids.csi == NVME_CSI_ZNS) {
2202 ret = nvme_query_zone_info(ns, lbaf, &zi);
2203 if (ret < 0)
2204 goto out;
2205 }
2206
2207 lim = queue_limits_start_update(ns->disk->queue);
2208
2209 memflags = blk_mq_freeze_queue(ns->disk->queue);
2210 ns->head->lba_shift = id->lbaf[lbaf].ds;
2211 ns->head->nuse = le64_to_cpu(id->nuse);
2212 capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze));
2213 nvme_set_ctrl_limits(ns->ctrl, &lim);
2214 nvme_configure_metadata(ns->ctrl, ns->head, id, nvm, info);
2215 nvme_set_chunk_sectors(ns, id, &lim);
2216 if (!nvme_update_disk_info(ns, id, &lim))
2217 capacity = 0;
2218
2219 /*
2220 * Validate the max atomic write size fits within the subsystem's
2221 * atomic write capabilities.
2222 */
2223 if (lim.atomic_write_hw_max > ns->ctrl->subsys->atomic_bs) {
2224 blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2225 ret = -ENXIO;
2226 goto out;
2227 }
2228
2229 nvme_config_discard(ns, &lim);
2230 if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2231 ns->head->ids.csi == NVME_CSI_ZNS)
2232 nvme_update_zone_info(ns, &lim, &zi);
2233
2234 if ((ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT) && !info->no_vwc)
2235 lim.features |= BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA;
2236 else
2237 lim.features &= ~(BLK_FEAT_WRITE_CACHE | BLK_FEAT_FUA);
2238
2239 if (info->is_rotational)
2240 lim.features |= BLK_FEAT_ROTATIONAL;
2241
2242 /*
2243 * Register a metadata profile for PI, or the plain non-integrity NVMe
2244 * metadata masquerading as Type 0 if supported, otherwise reject block
2245 * I/O to namespaces with metadata except when the namespace supports
2246 * PI, as it can strip/insert in that case.
2247 */
2248 if (!nvme_init_integrity(ns->head, &lim, info))
2249 capacity = 0;
2250
2251 ret = queue_limits_commit_update(ns->disk->queue, &lim);
2252 if (ret) {
2253 blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2254 goto out;
2255 }
2256
2257 set_capacity_and_notify(ns->disk, capacity);
2258
2259 /*
2260 * Only set the DEAC bit if the device guarantees that reads from
2261 * deallocated data return zeroes. While the DEAC bit does not
2262 * require that, it must be a no-op if reads from deallocated data
2263 * do not return zeroes.
2264 */
2265 if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2266 ns->head->features |= NVME_NS_DEAC;
2267 set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2268 set_bit(NVME_NS_READY, &ns->flags);
2269 blk_mq_unfreeze_queue(ns->disk->queue, memflags);
2270
2271 if (blk_queue_is_zoned(ns->queue)) {
2272 ret = blk_revalidate_disk_zones(ns->disk);
2273 if (ret && !nvme_first_scan(ns->disk))
2274 goto out;
2275 }
2276
2277 ret = 0;
2278 out:
2279 kfree(nvm);
2280 kfree(id);
2281 return ret;
2282 }
2283
nvme_update_ns_info(struct nvme_ns * ns,struct nvme_ns_info * info)2284 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2285 {
2286 bool unsupported = false;
2287 int ret;
2288
2289 switch (info->ids.csi) {
2290 case NVME_CSI_ZNS:
2291 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2292 dev_info(ns->ctrl->device,
2293 "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2294 info->nsid);
2295 ret = nvme_update_ns_info_generic(ns, info);
2296 break;
2297 }
2298 ret = nvme_update_ns_info_block(ns, info);
2299 break;
2300 case NVME_CSI_NVM:
2301 ret = nvme_update_ns_info_block(ns, info);
2302 break;
2303 default:
2304 dev_info(ns->ctrl->device,
2305 "block device for nsid %u not supported (csi %u)\n",
2306 info->nsid, info->ids.csi);
2307 ret = nvme_update_ns_info_generic(ns, info);
2308 break;
2309 }
2310
2311 /*
2312 * If probing fails due an unsupported feature, hide the block device,
2313 * but still allow other access.
2314 */
2315 if (ret == -ENODEV) {
2316 ns->disk->flags |= GENHD_FL_HIDDEN;
2317 set_bit(NVME_NS_READY, &ns->flags);
2318 unsupported = true;
2319 ret = 0;
2320 }
2321
2322 if (!ret && nvme_ns_head_multipath(ns->head)) {
2323 struct queue_limits *ns_lim = &ns->disk->queue->limits;
2324 struct queue_limits lim;
2325 unsigned int memflags;
2326
2327 lim = queue_limits_start_update(ns->head->disk->queue);
2328 memflags = blk_mq_freeze_queue(ns->head->disk->queue);
2329 /*
2330 * queue_limits mixes values that are the hardware limitations
2331 * for bio splitting with what is the device configuration.
2332 *
2333 * For NVMe the device configuration can change after e.g. a
2334 * Format command, and we really want to pick up the new format
2335 * value here. But we must still stack the queue limits to the
2336 * least common denominator for multipathing to split the bios
2337 * properly.
2338 *
2339 * To work around this, we explicitly set the device
2340 * configuration to those that we just queried, but only stack
2341 * the splitting limits in to make sure we still obey possibly
2342 * lower limitations of other controllers.
2343 */
2344 lim.logical_block_size = ns_lim->logical_block_size;
2345 lim.physical_block_size = ns_lim->physical_block_size;
2346 lim.io_min = ns_lim->io_min;
2347 lim.io_opt = ns_lim->io_opt;
2348 queue_limits_stack_bdev(&lim, ns->disk->part0, 0,
2349 ns->head->disk->disk_name);
2350 if (unsupported)
2351 ns->head->disk->flags |= GENHD_FL_HIDDEN;
2352 else
2353 nvme_init_integrity(ns->head, &lim, info);
2354 ret = queue_limits_commit_update(ns->head->disk->queue, &lim);
2355
2356 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2357 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2358 nvme_mpath_revalidate_paths(ns);
2359
2360 blk_mq_unfreeze_queue(ns->head->disk->queue, memflags);
2361 }
2362
2363 return ret;
2364 }
2365
nvme_ns_get_unique_id(struct nvme_ns * ns,u8 id[16],enum blk_unique_id type)2366 int nvme_ns_get_unique_id(struct nvme_ns *ns, u8 id[16],
2367 enum blk_unique_id type)
2368 {
2369 struct nvme_ns_ids *ids = &ns->head->ids;
2370
2371 if (type != BLK_UID_EUI64)
2372 return -EINVAL;
2373
2374 if (memchr_inv(ids->nguid, 0, sizeof(ids->nguid))) {
2375 memcpy(id, &ids->nguid, sizeof(ids->nguid));
2376 return sizeof(ids->nguid);
2377 }
2378 if (memchr_inv(ids->eui64, 0, sizeof(ids->eui64))) {
2379 memcpy(id, &ids->eui64, sizeof(ids->eui64));
2380 return sizeof(ids->eui64);
2381 }
2382
2383 return -EINVAL;
2384 }
2385
nvme_get_unique_id(struct gendisk * disk,u8 id[16],enum blk_unique_id type)2386 static int nvme_get_unique_id(struct gendisk *disk, u8 id[16],
2387 enum blk_unique_id type)
2388 {
2389 return nvme_ns_get_unique_id(disk->private_data, id, type);
2390 }
2391
2392 #ifdef CONFIG_BLK_SED_OPAL
nvme_sec_submit(void * data,u16 spsp,u8 secp,void * buffer,size_t len,bool send)2393 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2394 bool send)
2395 {
2396 struct nvme_ctrl *ctrl = data;
2397 struct nvme_command cmd = { };
2398
2399 if (send)
2400 cmd.common.opcode = nvme_admin_security_send;
2401 else
2402 cmd.common.opcode = nvme_admin_security_recv;
2403 cmd.common.nsid = 0;
2404 cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2405 cmd.common.cdw11 = cpu_to_le32(len);
2406
2407 return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2408 NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2409 }
2410
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2411 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2412 {
2413 if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2414 if (!ctrl->opal_dev)
2415 ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2416 else if (was_suspended)
2417 opal_unlock_from_suspend(ctrl->opal_dev);
2418 } else {
2419 free_opal_dev(ctrl->opal_dev);
2420 ctrl->opal_dev = NULL;
2421 }
2422 }
2423 #else
nvme_configure_opal(struct nvme_ctrl * ctrl,bool was_suspended)2424 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2425 {
2426 }
2427 #endif /* CONFIG_BLK_SED_OPAL */
2428
2429 #ifdef CONFIG_BLK_DEV_ZONED
nvme_report_zones(struct gendisk * disk,sector_t sector,unsigned int nr_zones,report_zones_cb cb,void * data)2430 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2431 unsigned int nr_zones, report_zones_cb cb, void *data)
2432 {
2433 return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2434 data);
2435 }
2436 #else
2437 #define nvme_report_zones NULL
2438 #endif /* CONFIG_BLK_DEV_ZONED */
2439
2440 const struct block_device_operations nvme_bdev_ops = {
2441 .owner = THIS_MODULE,
2442 .ioctl = nvme_ioctl,
2443 .compat_ioctl = blkdev_compat_ptr_ioctl,
2444 .open = nvme_open,
2445 .release = nvme_release,
2446 .getgeo = nvme_getgeo,
2447 .get_unique_id = nvme_get_unique_id,
2448 .report_zones = nvme_report_zones,
2449 .pr_ops = &nvme_pr_ops,
2450 };
2451
nvme_wait_ready(struct nvme_ctrl * ctrl,u32 mask,u32 val,u32 timeout,const char * op)2452 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2453 u32 timeout, const char *op)
2454 {
2455 unsigned long timeout_jiffies = jiffies + timeout * HZ;
2456 u32 csts;
2457 int ret;
2458
2459 while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2460 if (csts == ~0)
2461 return -ENODEV;
2462 if ((csts & mask) == val)
2463 break;
2464
2465 usleep_range(1000, 2000);
2466 if (fatal_signal_pending(current))
2467 return -EINTR;
2468 if (time_after(jiffies, timeout_jiffies)) {
2469 dev_err(ctrl->device,
2470 "Device not ready; aborting %s, CSTS=0x%x\n",
2471 op, csts);
2472 return -ENODEV;
2473 }
2474 }
2475
2476 return ret;
2477 }
2478
nvme_disable_ctrl(struct nvme_ctrl * ctrl,bool shutdown)2479 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2480 {
2481 int ret;
2482
2483 ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2484 if (shutdown)
2485 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2486 else
2487 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2488
2489 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2490 if (ret)
2491 return ret;
2492
2493 if (shutdown) {
2494 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2495 NVME_CSTS_SHST_CMPLT,
2496 ctrl->shutdown_timeout, "shutdown");
2497 }
2498 if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2499 msleep(NVME_QUIRK_DELAY_AMOUNT);
2500 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2501 (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2502 }
2503 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2504
nvme_enable_ctrl(struct nvme_ctrl * ctrl)2505 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2506 {
2507 unsigned dev_page_min;
2508 u32 timeout;
2509 int ret;
2510
2511 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2512 if (ret) {
2513 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2514 return ret;
2515 }
2516 dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2517
2518 if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2519 dev_err(ctrl->device,
2520 "Minimum device page size %u too large for host (%u)\n",
2521 1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2522 return -ENODEV;
2523 }
2524
2525 if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2526 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2527 else
2528 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2529
2530 /*
2531 * Setting CRIME results in CSTS.RDY before the media is ready. This
2532 * makes it possible for media related commands to return the error
2533 * NVME_SC_ADMIN_COMMAND_MEDIA_NOT_READY. Until the driver is
2534 * restructured to handle retries, disable CC.CRIME.
2535 */
2536 ctrl->ctrl_config &= ~NVME_CC_CRIME;
2537
2538 ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2539 ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2540 ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2541 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2542 if (ret)
2543 return ret;
2544
2545 /* CAP value may change after initial CC write */
2546 ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2547 if (ret)
2548 return ret;
2549
2550 timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2551 if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2552 u32 crto, ready_timeout;
2553
2554 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2555 if (ret) {
2556 dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2557 ret);
2558 return ret;
2559 }
2560
2561 /*
2562 * CRTO should always be greater or equal to CAP.TO, but some
2563 * devices are known to get this wrong. Use the larger of the
2564 * two values.
2565 */
2566 ready_timeout = NVME_CRTO_CRWMT(crto);
2567
2568 if (ready_timeout < timeout)
2569 dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2570 crto, ctrl->cap);
2571 else
2572 timeout = ready_timeout;
2573 }
2574
2575 ctrl->ctrl_config |= NVME_CC_ENABLE;
2576 ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2577 if (ret)
2578 return ret;
2579 return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2580 (timeout + 1) / 2, "initialisation");
2581 }
2582 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2583
nvme_configure_timestamp(struct nvme_ctrl * ctrl)2584 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2585 {
2586 __le64 ts;
2587 int ret;
2588
2589 if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2590 return 0;
2591
2592 ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2593 ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2594 NULL);
2595 if (ret)
2596 dev_warn_once(ctrl->device,
2597 "could not set timestamp (%d)\n", ret);
2598 return ret;
2599 }
2600
nvme_configure_host_options(struct nvme_ctrl * ctrl)2601 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2602 {
2603 struct nvme_feat_host_behavior *host;
2604 u8 acre = 0, lbafee = 0;
2605 int ret;
2606
2607 /* Don't bother enabling the feature if retry delay is not reported */
2608 if (ctrl->crdt[0])
2609 acre = NVME_ENABLE_ACRE;
2610 if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2611 lbafee = NVME_ENABLE_LBAFEE;
2612
2613 if (!acre && !lbafee)
2614 return 0;
2615
2616 host = kzalloc(sizeof(*host), GFP_KERNEL);
2617 if (!host)
2618 return 0;
2619
2620 host->acre = acre;
2621 host->lbafee = lbafee;
2622 ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2623 host, sizeof(*host), NULL);
2624 kfree(host);
2625 return ret;
2626 }
2627
2628 /*
2629 * The function checks whether the given total (exlat + enlat) latency of
2630 * a power state allows the latter to be used as an APST transition target.
2631 * It does so by comparing the latency to the primary and secondary latency
2632 * tolerances defined by module params. If there's a match, the corresponding
2633 * timeout value is returned and the matching tolerance index (1 or 2) is
2634 * reported.
2635 */
nvme_apst_get_transition_time(u64 total_latency,u64 * transition_time,unsigned * last_index)2636 static bool nvme_apst_get_transition_time(u64 total_latency,
2637 u64 *transition_time, unsigned *last_index)
2638 {
2639 if (total_latency <= apst_primary_latency_tol_us) {
2640 if (*last_index == 1)
2641 return false;
2642 *last_index = 1;
2643 *transition_time = apst_primary_timeout_ms;
2644 return true;
2645 }
2646 if (apst_secondary_timeout_ms &&
2647 total_latency <= apst_secondary_latency_tol_us) {
2648 if (*last_index <= 2)
2649 return false;
2650 *last_index = 2;
2651 *transition_time = apst_secondary_timeout_ms;
2652 return true;
2653 }
2654 return false;
2655 }
2656
2657 /*
2658 * APST (Autonomous Power State Transition) lets us program a table of power
2659 * state transitions that the controller will perform automatically.
2660 *
2661 * Depending on module params, one of the two supported techniques will be used:
2662 *
2663 * - If the parameters provide explicit timeouts and tolerances, they will be
2664 * used to build a table with up to 2 non-operational states to transition to.
2665 * The default parameter values were selected based on the values used by
2666 * Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2667 * regeneration of the APST table in the event of switching between external
2668 * and battery power, the timeouts and tolerances reflect a compromise
2669 * between values used by Microsoft for AC and battery scenarios.
2670 * - If not, we'll configure the table with a simple heuristic: we are willing
2671 * to spend at most 2% of the time transitioning between power states.
2672 * Therefore, when running in any given state, we will enter the next
2673 * lower-power non-operational state after waiting 50 * (enlat + exlat)
2674 * microseconds, as long as that state's exit latency is under the requested
2675 * maximum latency.
2676 *
2677 * We will not autonomously enter any non-operational state for which the total
2678 * latency exceeds ps_max_latency_us.
2679 *
2680 * Users can set ps_max_latency_us to zero to turn off APST.
2681 */
nvme_configure_apst(struct nvme_ctrl * ctrl)2682 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2683 {
2684 struct nvme_feat_auto_pst *table;
2685 unsigned apste = 0;
2686 u64 max_lat_us = 0;
2687 __le64 target = 0;
2688 int max_ps = -1;
2689 int state;
2690 int ret;
2691 unsigned last_lt_index = UINT_MAX;
2692
2693 /*
2694 * If APST isn't supported or if we haven't been initialized yet,
2695 * then don't do anything.
2696 */
2697 if (!ctrl->apsta)
2698 return 0;
2699
2700 if (ctrl->npss > 31) {
2701 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2702 return 0;
2703 }
2704
2705 table = kzalloc(sizeof(*table), GFP_KERNEL);
2706 if (!table)
2707 return 0;
2708
2709 if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2710 /* Turn off APST. */
2711 dev_dbg(ctrl->device, "APST disabled\n");
2712 goto done;
2713 }
2714
2715 /*
2716 * Walk through all states from lowest- to highest-power.
2717 * According to the spec, lower-numbered states use more power. NPSS,
2718 * despite the name, is the index of the lowest-power state, not the
2719 * number of states.
2720 */
2721 for (state = (int)ctrl->npss; state >= 0; state--) {
2722 u64 total_latency_us, exit_latency_us, transition_ms;
2723
2724 if (target)
2725 table->entries[state] = target;
2726
2727 /*
2728 * Don't allow transitions to the deepest state if it's quirked
2729 * off.
2730 */
2731 if (state == ctrl->npss &&
2732 (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2733 continue;
2734
2735 /*
2736 * Is this state a useful non-operational state for higher-power
2737 * states to autonomously transition to?
2738 */
2739 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2740 continue;
2741
2742 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2743 if (exit_latency_us > ctrl->ps_max_latency_us)
2744 continue;
2745
2746 total_latency_us = exit_latency_us +
2747 le32_to_cpu(ctrl->psd[state].entry_lat);
2748
2749 /*
2750 * This state is good. It can be used as the APST idle target
2751 * for higher power states.
2752 */
2753 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2754 if (!nvme_apst_get_transition_time(total_latency_us,
2755 &transition_ms, &last_lt_index))
2756 continue;
2757 } else {
2758 transition_ms = total_latency_us + 19;
2759 do_div(transition_ms, 20);
2760 if (transition_ms > (1 << 24) - 1)
2761 transition_ms = (1 << 24) - 1;
2762 }
2763
2764 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2765 if (max_ps == -1)
2766 max_ps = state;
2767 if (total_latency_us > max_lat_us)
2768 max_lat_us = total_latency_us;
2769 }
2770
2771 if (max_ps == -1)
2772 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2773 else
2774 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2775 max_ps, max_lat_us, (int)sizeof(*table), table);
2776 apste = 1;
2777
2778 done:
2779 ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2780 table, sizeof(*table), NULL);
2781 if (ret)
2782 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2783 kfree(table);
2784 return ret;
2785 }
2786
nvme_set_latency_tolerance(struct device * dev,s32 val)2787 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2788 {
2789 struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2790 u64 latency;
2791
2792 switch (val) {
2793 case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2794 case PM_QOS_LATENCY_ANY:
2795 latency = U64_MAX;
2796 break;
2797
2798 default:
2799 latency = val;
2800 }
2801
2802 if (ctrl->ps_max_latency_us != latency) {
2803 ctrl->ps_max_latency_us = latency;
2804 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2805 nvme_configure_apst(ctrl);
2806 }
2807 }
2808
2809 struct nvme_core_quirk_entry {
2810 /*
2811 * NVMe model and firmware strings are padded with spaces. For
2812 * simplicity, strings in the quirk table are padded with NULLs
2813 * instead.
2814 */
2815 u16 vid;
2816 const char *mn;
2817 const char *fr;
2818 unsigned long quirks;
2819 };
2820
2821 static const struct nvme_core_quirk_entry core_quirks[] = {
2822 {
2823 /*
2824 * This Toshiba device seems to die using any APST states. See:
2825 * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2826 */
2827 .vid = 0x1179,
2828 .mn = "THNSF5256GPUK TOSHIBA",
2829 .quirks = NVME_QUIRK_NO_APST,
2830 },
2831 {
2832 /*
2833 * This LiteON CL1-3D*-Q11 firmware version has a race
2834 * condition associated with actions related to suspend to idle
2835 * LiteON has resolved the problem in future firmware
2836 */
2837 .vid = 0x14a4,
2838 .fr = "22301111",
2839 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2840 },
2841 {
2842 /*
2843 * This Kioxia CD6-V Series / HPE PE8030 device times out and
2844 * aborts I/O during any load, but more easily reproducible
2845 * with discards (fstrim).
2846 *
2847 * The device is left in a state where it is also not possible
2848 * to use "nvme set-feature" to disable APST, but booting with
2849 * nvme_core.default_ps_max_latency=0 works.
2850 */
2851 .vid = 0x1e0f,
2852 .mn = "KCD6XVUL6T40",
2853 .quirks = NVME_QUIRK_NO_APST,
2854 },
2855 {
2856 /*
2857 * The external Samsung X5 SSD fails initialization without a
2858 * delay before checking if it is ready and has a whole set of
2859 * other problems. To make this even more interesting, it
2860 * shares the PCI ID with internal Samsung 970 Evo Plus that
2861 * does not need or want these quirks.
2862 */
2863 .vid = 0x144d,
2864 .mn = "Samsung Portable SSD X5",
2865 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2866 NVME_QUIRK_NO_DEEPEST_PS |
2867 NVME_QUIRK_IGNORE_DEV_SUBNQN,
2868 }
2869 };
2870
2871 /* match is null-terminated but idstr is space-padded. */
string_matches(const char * idstr,const char * match,size_t len)2872 static bool string_matches(const char *idstr, const char *match, size_t len)
2873 {
2874 size_t matchlen;
2875
2876 if (!match)
2877 return true;
2878
2879 matchlen = strlen(match);
2880 WARN_ON_ONCE(matchlen > len);
2881
2882 if (memcmp(idstr, match, matchlen))
2883 return false;
2884
2885 for (; matchlen < len; matchlen++)
2886 if (idstr[matchlen] != ' ')
2887 return false;
2888
2889 return true;
2890 }
2891
quirk_matches(const struct nvme_id_ctrl * id,const struct nvme_core_quirk_entry * q)2892 static bool quirk_matches(const struct nvme_id_ctrl *id,
2893 const struct nvme_core_quirk_entry *q)
2894 {
2895 return q->vid == le16_to_cpu(id->vid) &&
2896 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2897 string_matches(id->fr, q->fr, sizeof(id->fr));
2898 }
2899
nvme_init_subnqn(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2900 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2901 struct nvme_id_ctrl *id)
2902 {
2903 size_t nqnlen;
2904 int off;
2905
2906 if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2907 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2908 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2909 strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2910 return;
2911 }
2912
2913 if (ctrl->vs >= NVME_VS(1, 2, 1))
2914 dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2915 }
2916
2917 /*
2918 * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2919 * Base Specification 2.0. It is slightly different from the format
2920 * specified there due to historic reasons, and we can't change it now.
2921 */
2922 off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2923 "nqn.2014.08.org.nvmexpress:%04x%04x",
2924 le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2925 memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2926 off += sizeof(id->sn);
2927 memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2928 off += sizeof(id->mn);
2929 memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2930 }
2931
nvme_release_subsystem(struct device * dev)2932 static void nvme_release_subsystem(struct device *dev)
2933 {
2934 struct nvme_subsystem *subsys =
2935 container_of(dev, struct nvme_subsystem, dev);
2936
2937 if (subsys->instance >= 0)
2938 ida_free(&nvme_instance_ida, subsys->instance);
2939 kfree(subsys);
2940 }
2941
nvme_destroy_subsystem(struct kref * ref)2942 static void nvme_destroy_subsystem(struct kref *ref)
2943 {
2944 struct nvme_subsystem *subsys =
2945 container_of(ref, struct nvme_subsystem, ref);
2946
2947 mutex_lock(&nvme_subsystems_lock);
2948 list_del(&subsys->entry);
2949 mutex_unlock(&nvme_subsystems_lock);
2950
2951 ida_destroy(&subsys->ns_ida);
2952 device_del(&subsys->dev);
2953 put_device(&subsys->dev);
2954 }
2955
nvme_put_subsystem(struct nvme_subsystem * subsys)2956 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2957 {
2958 kref_put(&subsys->ref, nvme_destroy_subsystem);
2959 }
2960
__nvme_find_get_subsystem(const char * subsysnqn)2961 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2962 {
2963 struct nvme_subsystem *subsys;
2964
2965 lockdep_assert_held(&nvme_subsystems_lock);
2966
2967 /*
2968 * Fail matches for discovery subsystems. This results
2969 * in each discovery controller bound to a unique subsystem.
2970 * This avoids issues with validating controller values
2971 * that can only be true when there is a single unique subsystem.
2972 * There may be multiple and completely independent entities
2973 * that provide discovery controllers.
2974 */
2975 if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2976 return NULL;
2977
2978 list_for_each_entry(subsys, &nvme_subsystems, entry) {
2979 if (strcmp(subsys->subnqn, subsysnqn))
2980 continue;
2981 if (!kref_get_unless_zero(&subsys->ref))
2982 continue;
2983 return subsys;
2984 }
2985
2986 return NULL;
2987 }
2988
nvme_discovery_ctrl(struct nvme_ctrl * ctrl)2989 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2990 {
2991 return ctrl->opts && ctrl->opts->discovery_nqn;
2992 }
2993
nvme_validate_cntlid(struct nvme_subsystem * subsys,struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)2994 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2995 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2996 {
2997 struct nvme_ctrl *tmp;
2998
2999 lockdep_assert_held(&nvme_subsystems_lock);
3000
3001 list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
3002 if (nvme_state_terminal(tmp))
3003 continue;
3004
3005 if (tmp->cntlid == ctrl->cntlid) {
3006 dev_err(ctrl->device,
3007 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
3008 ctrl->cntlid, dev_name(tmp->device),
3009 subsys->subnqn);
3010 return false;
3011 }
3012
3013 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
3014 nvme_discovery_ctrl(ctrl))
3015 continue;
3016
3017 dev_err(ctrl->device,
3018 "Subsystem does not support multiple controllers\n");
3019 return false;
3020 }
3021
3022 return true;
3023 }
3024
nvme_init_subsystem(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)3025 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3026 {
3027 struct nvme_subsystem *subsys, *found;
3028 int ret;
3029
3030 subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
3031 if (!subsys)
3032 return -ENOMEM;
3033
3034 subsys->instance = -1;
3035 mutex_init(&subsys->lock);
3036 kref_init(&subsys->ref);
3037 INIT_LIST_HEAD(&subsys->ctrls);
3038 INIT_LIST_HEAD(&subsys->nsheads);
3039 nvme_init_subnqn(subsys, ctrl, id);
3040 memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
3041 memcpy(subsys->model, id->mn, sizeof(subsys->model));
3042 subsys->vendor_id = le16_to_cpu(id->vid);
3043 subsys->cmic = id->cmic;
3044
3045 /* Versions prior to 1.4 don't necessarily report a valid type */
3046 if (id->cntrltype == NVME_CTRL_DISC ||
3047 !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
3048 subsys->subtype = NVME_NQN_DISC;
3049 else
3050 subsys->subtype = NVME_NQN_NVME;
3051
3052 if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
3053 dev_err(ctrl->device,
3054 "Subsystem %s is not a discovery controller",
3055 subsys->subnqn);
3056 kfree(subsys);
3057 return -EINVAL;
3058 }
3059 nvme_mpath_default_iopolicy(subsys);
3060
3061 subsys->dev.class = &nvme_subsys_class;
3062 subsys->dev.release = nvme_release_subsystem;
3063 subsys->dev.groups = nvme_subsys_attrs_groups;
3064 dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
3065 device_initialize(&subsys->dev);
3066
3067 mutex_lock(&nvme_subsystems_lock);
3068 found = __nvme_find_get_subsystem(subsys->subnqn);
3069 if (found) {
3070 put_device(&subsys->dev);
3071 subsys = found;
3072
3073 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
3074 ret = -EINVAL;
3075 goto out_put_subsystem;
3076 }
3077 } else {
3078 ret = device_add(&subsys->dev);
3079 if (ret) {
3080 dev_err(ctrl->device,
3081 "failed to register subsystem device.\n");
3082 put_device(&subsys->dev);
3083 goto out_unlock;
3084 }
3085 ida_init(&subsys->ns_ida);
3086 list_add_tail(&subsys->entry, &nvme_subsystems);
3087 }
3088
3089 ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
3090 dev_name(ctrl->device));
3091 if (ret) {
3092 dev_err(ctrl->device,
3093 "failed to create sysfs link from subsystem.\n");
3094 goto out_put_subsystem;
3095 }
3096
3097 if (!found)
3098 subsys->instance = ctrl->instance;
3099 ctrl->subsys = subsys;
3100 list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
3101 mutex_unlock(&nvme_subsystems_lock);
3102 return 0;
3103
3104 out_put_subsystem:
3105 nvme_put_subsystem(subsys);
3106 out_unlock:
3107 mutex_unlock(&nvme_subsystems_lock);
3108 return ret;
3109 }
3110
nvme_get_log(struct nvme_ctrl * ctrl,u32 nsid,u8 log_page,u8 lsp,u8 csi,void * log,size_t size,u64 offset)3111 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
3112 void *log, size_t size, u64 offset)
3113 {
3114 struct nvme_command c = { };
3115 u32 dwlen = nvme_bytes_to_numd(size);
3116
3117 c.get_log_page.opcode = nvme_admin_get_log_page;
3118 c.get_log_page.nsid = cpu_to_le32(nsid);
3119 c.get_log_page.lid = log_page;
3120 c.get_log_page.lsp = lsp;
3121 c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
3122 c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
3123 c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
3124 c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
3125 c.get_log_page.csi = csi;
3126
3127 return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
3128 }
3129
nvme_get_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)3130 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
3131 struct nvme_effects_log **log)
3132 {
3133 struct nvme_effects_log *old, *cel = xa_load(&ctrl->cels, csi);
3134 int ret;
3135
3136 if (cel)
3137 goto out;
3138
3139 cel = kzalloc(sizeof(*cel), GFP_KERNEL);
3140 if (!cel)
3141 return -ENOMEM;
3142
3143 ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
3144 cel, sizeof(*cel), 0);
3145 if (ret) {
3146 kfree(cel);
3147 return ret;
3148 }
3149
3150 old = xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
3151 if (xa_is_err(old)) {
3152 kfree(cel);
3153 return xa_err(old);
3154 }
3155 out:
3156 *log = cel;
3157 return 0;
3158 }
3159
nvme_mps_to_sectors(struct nvme_ctrl * ctrl,u32 units)3160 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
3161 {
3162 u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
3163
3164 if (check_shl_overflow(1U, units + page_shift - 9, &val))
3165 return UINT_MAX;
3166 return val;
3167 }
3168
nvme_init_non_mdts_limits(struct nvme_ctrl * ctrl)3169 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3170 {
3171 struct nvme_command c = { };
3172 struct nvme_id_ctrl_nvm *id;
3173 int ret;
3174
3175 /*
3176 * Even though NVMe spec explicitly states that MDTS is not applicable
3177 * to the write-zeroes, we are cautious and limit the size to the
3178 * controllers max_hw_sectors value, which is based on the MDTS field
3179 * and possibly other limiting factors.
3180 */
3181 if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3182 !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3183 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3184 else
3185 ctrl->max_zeroes_sectors = 0;
3186
3187 if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3188 !nvme_id_cns_ok(ctrl, NVME_ID_CNS_CS_CTRL) ||
3189 test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3190 return 0;
3191
3192 id = kzalloc(sizeof(*id), GFP_KERNEL);
3193 if (!id)
3194 return -ENOMEM;
3195
3196 c.identify.opcode = nvme_admin_identify;
3197 c.identify.cns = NVME_ID_CNS_CS_CTRL;
3198 c.identify.csi = NVME_CSI_NVM;
3199
3200 ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3201 if (ret)
3202 goto free_data;
3203
3204 ctrl->dmrl = id->dmrl;
3205 ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3206 if (id->wzsl)
3207 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3208
3209 free_data:
3210 if (ret > 0)
3211 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3212 kfree(id);
3213 return ret;
3214 }
3215
nvme_init_effects_log(struct nvme_ctrl * ctrl,u8 csi,struct nvme_effects_log ** log)3216 static int nvme_init_effects_log(struct nvme_ctrl *ctrl,
3217 u8 csi, struct nvme_effects_log **log)
3218 {
3219 struct nvme_effects_log *effects, *old;
3220
3221 effects = kzalloc(sizeof(*effects), GFP_KERNEL);
3222 if (!effects)
3223 return -ENOMEM;
3224
3225 old = xa_store(&ctrl->cels, csi, effects, GFP_KERNEL);
3226 if (xa_is_err(old)) {
3227 kfree(effects);
3228 return xa_err(old);
3229 }
3230
3231 *log = effects;
3232 return 0;
3233 }
3234
nvme_init_known_nvm_effects(struct nvme_ctrl * ctrl)3235 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3236 {
3237 struct nvme_effects_log *log = ctrl->effects;
3238
3239 log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3240 NVME_CMD_EFFECTS_NCC |
3241 NVME_CMD_EFFECTS_CSE_MASK);
3242 log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3243 NVME_CMD_EFFECTS_CSE_MASK);
3244
3245 /*
3246 * The spec says the result of a security receive command depends on
3247 * the previous security send command. As such, many vendors log this
3248 * command as one to submitted only when no other commands to the same
3249 * namespace are outstanding. The intention is to tell the host to
3250 * prevent mixing security send and receive.
3251 *
3252 * This driver can only enforce such exclusive access against IO
3253 * queues, though. We are not readily able to enforce such a rule for
3254 * two commands to the admin queue, which is the only queue that
3255 * matters for this command.
3256 *
3257 * Rather than blindly freezing the IO queues for this effect that
3258 * doesn't even apply to IO, mask it off.
3259 */
3260 log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3261
3262 log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3263 log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3264 log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3265 }
3266
nvme_init_effects(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)3267 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3268 {
3269 int ret = 0;
3270
3271 if (ctrl->effects)
3272 return 0;
3273
3274 if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3275 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3276 if (ret < 0)
3277 return ret;
3278 }
3279
3280 if (!ctrl->effects) {
3281 ret = nvme_init_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3282 if (ret < 0)
3283 return ret;
3284 }
3285
3286 nvme_init_known_nvm_effects(ctrl);
3287 return 0;
3288 }
3289
nvme_check_ctrl_fabric_info(struct nvme_ctrl * ctrl,struct nvme_id_ctrl * id)3290 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3291 {
3292 /*
3293 * In fabrics we need to verify the cntlid matches the
3294 * admin connect
3295 */
3296 if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3297 dev_err(ctrl->device,
3298 "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3299 ctrl->cntlid, le16_to_cpu(id->cntlid));
3300 return -EINVAL;
3301 }
3302
3303 if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3304 dev_err(ctrl->device,
3305 "keep-alive support is mandatory for fabrics\n");
3306 return -EINVAL;
3307 }
3308
3309 if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3310 dev_err(ctrl->device,
3311 "I/O queue command capsule supported size %d < 4\n",
3312 ctrl->ioccsz);
3313 return -EINVAL;
3314 }
3315
3316 if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3317 dev_err(ctrl->device,
3318 "I/O queue response capsule supported size %d < 1\n",
3319 ctrl->iorcsz);
3320 return -EINVAL;
3321 }
3322
3323 if (!ctrl->maxcmd) {
3324 dev_warn(ctrl->device,
3325 "Firmware bug: maximum outstanding commands is 0\n");
3326 ctrl->maxcmd = ctrl->sqsize + 1;
3327 }
3328
3329 return 0;
3330 }
3331
nvme_init_identify(struct nvme_ctrl * ctrl)3332 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3333 {
3334 struct queue_limits lim;
3335 struct nvme_id_ctrl *id;
3336 u32 max_hw_sectors;
3337 bool prev_apst_enabled;
3338 int ret;
3339
3340 ret = nvme_identify_ctrl(ctrl, &id);
3341 if (ret) {
3342 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3343 return -EIO;
3344 }
3345
3346 if (!(ctrl->ops->flags & NVME_F_FABRICS))
3347 ctrl->cntlid = le16_to_cpu(id->cntlid);
3348
3349 if (!ctrl->identified) {
3350 unsigned int i;
3351
3352 /*
3353 * Check for quirks. Quirk can depend on firmware version,
3354 * so, in principle, the set of quirks present can change
3355 * across a reset. As a possible future enhancement, we
3356 * could re-scan for quirks every time we reinitialize
3357 * the device, but we'd have to make sure that the driver
3358 * behaves intelligently if the quirks change.
3359 */
3360 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3361 if (quirk_matches(id, &core_quirks[i]))
3362 ctrl->quirks |= core_quirks[i].quirks;
3363 }
3364
3365 ret = nvme_init_subsystem(ctrl, id);
3366 if (ret)
3367 goto out_free;
3368
3369 ret = nvme_init_effects(ctrl, id);
3370 if (ret)
3371 goto out_free;
3372 }
3373 memcpy(ctrl->subsys->firmware_rev, id->fr,
3374 sizeof(ctrl->subsys->firmware_rev));
3375
3376 if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3377 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3378 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3379 }
3380
3381 ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3382 ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3383 ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3384
3385 ctrl->oacs = le16_to_cpu(id->oacs);
3386 ctrl->oncs = le16_to_cpu(id->oncs);
3387 ctrl->mtfa = le16_to_cpu(id->mtfa);
3388 ctrl->oaes = le32_to_cpu(id->oaes);
3389 ctrl->wctemp = le16_to_cpu(id->wctemp);
3390 ctrl->cctemp = le16_to_cpu(id->cctemp);
3391
3392 atomic_set(&ctrl->abort_limit, id->acl + 1);
3393 ctrl->vwc = id->vwc;
3394 if (id->mdts)
3395 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3396 else
3397 max_hw_sectors = UINT_MAX;
3398 ctrl->max_hw_sectors =
3399 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3400
3401 lim = queue_limits_start_update(ctrl->admin_q);
3402 nvme_set_ctrl_limits(ctrl, &lim);
3403 ret = queue_limits_commit_update(ctrl->admin_q, &lim);
3404 if (ret)
3405 goto out_free;
3406
3407 ctrl->sgls = le32_to_cpu(id->sgls);
3408 ctrl->kas = le16_to_cpu(id->kas);
3409 ctrl->max_namespaces = le32_to_cpu(id->mnan);
3410 ctrl->ctratt = le32_to_cpu(id->ctratt);
3411
3412 ctrl->cntrltype = id->cntrltype;
3413 ctrl->dctype = id->dctype;
3414
3415 if (id->rtd3e) {
3416 /* us -> s */
3417 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3418
3419 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3420 shutdown_timeout, 60);
3421
3422 if (ctrl->shutdown_timeout != shutdown_timeout)
3423 dev_info(ctrl->device,
3424 "D3 entry latency set to %u seconds\n",
3425 ctrl->shutdown_timeout);
3426 } else
3427 ctrl->shutdown_timeout = shutdown_timeout;
3428
3429 ctrl->npss = id->npss;
3430 ctrl->apsta = id->apsta;
3431 prev_apst_enabled = ctrl->apst_enabled;
3432 if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3433 if (force_apst && id->apsta) {
3434 dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3435 ctrl->apst_enabled = true;
3436 } else {
3437 ctrl->apst_enabled = false;
3438 }
3439 } else {
3440 ctrl->apst_enabled = id->apsta;
3441 }
3442 memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3443
3444 if (ctrl->ops->flags & NVME_F_FABRICS) {
3445 ctrl->icdoff = le16_to_cpu(id->icdoff);
3446 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3447 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3448 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3449
3450 ret = nvme_check_ctrl_fabric_info(ctrl, id);
3451 if (ret)
3452 goto out_free;
3453 } else {
3454 ctrl->hmpre = le32_to_cpu(id->hmpre);
3455 ctrl->hmmin = le32_to_cpu(id->hmmin);
3456 ctrl->hmminds = le32_to_cpu(id->hmminds);
3457 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3458 }
3459
3460 ret = nvme_mpath_init_identify(ctrl, id);
3461 if (ret < 0)
3462 goto out_free;
3463
3464 if (ctrl->apst_enabled && !prev_apst_enabled)
3465 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3466 else if (!ctrl->apst_enabled && prev_apst_enabled)
3467 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3468 ctrl->awupf = le16_to_cpu(id->awupf);
3469 out_free:
3470 kfree(id);
3471 return ret;
3472 }
3473
3474 /*
3475 * Initialize the cached copies of the Identify data and various controller
3476 * register in our nvme_ctrl structure. This should be called as soon as
3477 * the admin queue is fully up and running.
3478 */
nvme_init_ctrl_finish(struct nvme_ctrl * ctrl,bool was_suspended)3479 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3480 {
3481 int ret;
3482
3483 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3484 if (ret) {
3485 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3486 return ret;
3487 }
3488
3489 ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3490
3491 if (ctrl->vs >= NVME_VS(1, 1, 0))
3492 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3493
3494 ret = nvme_init_identify(ctrl);
3495 if (ret)
3496 return ret;
3497
3498 ret = nvme_configure_apst(ctrl);
3499 if (ret < 0)
3500 return ret;
3501
3502 ret = nvme_configure_timestamp(ctrl);
3503 if (ret < 0)
3504 return ret;
3505
3506 ret = nvme_configure_host_options(ctrl);
3507 if (ret < 0)
3508 return ret;
3509
3510 nvme_configure_opal(ctrl, was_suspended);
3511
3512 if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3513 /*
3514 * Do not return errors unless we are in a controller reset,
3515 * the controller works perfectly fine without hwmon.
3516 */
3517 ret = nvme_hwmon_init(ctrl);
3518 if (ret == -EINTR)
3519 return ret;
3520 }
3521
3522 clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3523 ctrl->identified = true;
3524
3525 nvme_start_keep_alive(ctrl);
3526
3527 return 0;
3528 }
3529 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3530
nvme_dev_open(struct inode * inode,struct file * file)3531 static int nvme_dev_open(struct inode *inode, struct file *file)
3532 {
3533 struct nvme_ctrl *ctrl =
3534 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3535
3536 switch (nvme_ctrl_state(ctrl)) {
3537 case NVME_CTRL_LIVE:
3538 break;
3539 default:
3540 return -EWOULDBLOCK;
3541 }
3542
3543 nvme_get_ctrl(ctrl);
3544 if (!try_module_get(ctrl->ops->module)) {
3545 nvme_put_ctrl(ctrl);
3546 return -EINVAL;
3547 }
3548
3549 file->private_data = ctrl;
3550 return 0;
3551 }
3552
nvme_dev_release(struct inode * inode,struct file * file)3553 static int nvme_dev_release(struct inode *inode, struct file *file)
3554 {
3555 struct nvme_ctrl *ctrl =
3556 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3557
3558 module_put(ctrl->ops->module);
3559 nvme_put_ctrl(ctrl);
3560 return 0;
3561 }
3562
3563 static const struct file_operations nvme_dev_fops = {
3564 .owner = THIS_MODULE,
3565 .open = nvme_dev_open,
3566 .release = nvme_dev_release,
3567 .unlocked_ioctl = nvme_dev_ioctl,
3568 .compat_ioctl = compat_ptr_ioctl,
3569 .uring_cmd = nvme_dev_uring_cmd,
3570 };
3571
nvme_find_ns_head(struct nvme_ctrl * ctrl,unsigned nsid)3572 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3573 unsigned nsid)
3574 {
3575 struct nvme_ns_head *h;
3576
3577 lockdep_assert_held(&ctrl->subsys->lock);
3578
3579 list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3580 /*
3581 * Private namespaces can share NSIDs under some conditions.
3582 * In that case we can't use the same ns_head for namespaces
3583 * with the same NSID.
3584 */
3585 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3586 continue;
3587 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3588 return h;
3589 }
3590
3591 return NULL;
3592 }
3593
nvme_subsys_check_duplicate_ids(struct nvme_subsystem * subsys,struct nvme_ns_ids * ids)3594 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3595 struct nvme_ns_ids *ids)
3596 {
3597 bool has_uuid = !uuid_is_null(&ids->uuid);
3598 bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3599 bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3600 struct nvme_ns_head *h;
3601
3602 lockdep_assert_held(&subsys->lock);
3603
3604 list_for_each_entry(h, &subsys->nsheads, entry) {
3605 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3606 return -EINVAL;
3607 if (has_nguid &&
3608 memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3609 return -EINVAL;
3610 if (has_eui64 &&
3611 memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3612 return -EINVAL;
3613 }
3614
3615 return 0;
3616 }
3617
nvme_cdev_rel(struct device * dev)3618 static void nvme_cdev_rel(struct device *dev)
3619 {
3620 ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3621 }
3622
nvme_cdev_del(struct cdev * cdev,struct device * cdev_device)3623 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3624 {
3625 cdev_device_del(cdev, cdev_device);
3626 put_device(cdev_device);
3627 }
3628
nvme_cdev_add(struct cdev * cdev,struct device * cdev_device,const struct file_operations * fops,struct module * owner)3629 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3630 const struct file_operations *fops, struct module *owner)
3631 {
3632 int minor, ret;
3633
3634 minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3635 if (minor < 0)
3636 return minor;
3637 cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3638 cdev_device->class = &nvme_ns_chr_class;
3639 cdev_device->release = nvme_cdev_rel;
3640 device_initialize(cdev_device);
3641 cdev_init(cdev, fops);
3642 cdev->owner = owner;
3643 ret = cdev_device_add(cdev, cdev_device);
3644 if (ret)
3645 put_device(cdev_device);
3646
3647 return ret;
3648 }
3649
nvme_ns_chr_open(struct inode * inode,struct file * file)3650 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3651 {
3652 return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3653 }
3654
nvme_ns_chr_release(struct inode * inode,struct file * file)3655 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3656 {
3657 nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3658 return 0;
3659 }
3660
3661 static const struct file_operations nvme_ns_chr_fops = {
3662 .owner = THIS_MODULE,
3663 .open = nvme_ns_chr_open,
3664 .release = nvme_ns_chr_release,
3665 .unlocked_ioctl = nvme_ns_chr_ioctl,
3666 .compat_ioctl = compat_ptr_ioctl,
3667 .uring_cmd = nvme_ns_chr_uring_cmd,
3668 .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3669 };
3670
nvme_add_ns_cdev(struct nvme_ns * ns)3671 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3672 {
3673 int ret;
3674
3675 ns->cdev_device.parent = ns->ctrl->device;
3676 ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3677 ns->ctrl->instance, ns->head->instance);
3678 if (ret)
3679 return ret;
3680
3681 return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3682 ns->ctrl->ops->module);
3683 }
3684
nvme_alloc_ns_head(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3685 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3686 struct nvme_ns_info *info)
3687 {
3688 struct nvme_ns_head *head;
3689 size_t size = sizeof(*head);
3690 int ret = -ENOMEM;
3691
3692 #ifdef CONFIG_NVME_MULTIPATH
3693 size += num_possible_nodes() * sizeof(struct nvme_ns *);
3694 #endif
3695
3696 head = kzalloc(size, GFP_KERNEL);
3697 if (!head)
3698 goto out;
3699 ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3700 if (ret < 0)
3701 goto out_free_head;
3702 head->instance = ret;
3703 INIT_LIST_HEAD(&head->list);
3704 ret = init_srcu_struct(&head->srcu);
3705 if (ret)
3706 goto out_ida_remove;
3707 head->subsys = ctrl->subsys;
3708 head->ns_id = info->nsid;
3709 head->ids = info->ids;
3710 head->shared = info->is_shared;
3711 head->rotational = info->is_rotational;
3712 ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3713 ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3714 kref_init(&head->ref);
3715
3716 if (head->ids.csi) {
3717 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3718 if (ret)
3719 goto out_cleanup_srcu;
3720 } else
3721 head->effects = ctrl->effects;
3722
3723 ret = nvme_mpath_alloc_disk(ctrl, head);
3724 if (ret)
3725 goto out_cleanup_srcu;
3726
3727 list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3728
3729 kref_get(&ctrl->subsys->ref);
3730
3731 return head;
3732 out_cleanup_srcu:
3733 cleanup_srcu_struct(&head->srcu);
3734 out_ida_remove:
3735 ida_free(&ctrl->subsys->ns_ida, head->instance);
3736 out_free_head:
3737 kfree(head);
3738 out:
3739 if (ret > 0)
3740 ret = blk_status_to_errno(nvme_error_status(ret));
3741 return ERR_PTR(ret);
3742 }
3743
nvme_global_check_duplicate_ids(struct nvme_subsystem * this,struct nvme_ns_ids * ids)3744 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3745 struct nvme_ns_ids *ids)
3746 {
3747 struct nvme_subsystem *s;
3748 int ret = 0;
3749
3750 /*
3751 * Note that this check is racy as we try to avoid holding the global
3752 * lock over the whole ns_head creation. But it is only intended as
3753 * a sanity check anyway.
3754 */
3755 mutex_lock(&nvme_subsystems_lock);
3756 list_for_each_entry(s, &nvme_subsystems, entry) {
3757 if (s == this)
3758 continue;
3759 mutex_lock(&s->lock);
3760 ret = nvme_subsys_check_duplicate_ids(s, ids);
3761 mutex_unlock(&s->lock);
3762 if (ret)
3763 break;
3764 }
3765 mutex_unlock(&nvme_subsystems_lock);
3766
3767 return ret;
3768 }
3769
nvme_init_ns_head(struct nvme_ns * ns,struct nvme_ns_info * info)3770 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3771 {
3772 struct nvme_ctrl *ctrl = ns->ctrl;
3773 struct nvme_ns_head *head = NULL;
3774 int ret;
3775
3776 ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3777 if (ret) {
3778 /*
3779 * We've found two different namespaces on two different
3780 * subsystems that report the same ID. This is pretty nasty
3781 * for anything that actually requires unique device
3782 * identification. In the kernel we need this for multipathing,
3783 * and in user space the /dev/disk/by-id/ links rely on it.
3784 *
3785 * If the device also claims to be multi-path capable back off
3786 * here now and refuse the probe the second device as this is a
3787 * recipe for data corruption. If not this is probably a
3788 * cheap consumer device if on the PCIe bus, so let the user
3789 * proceed and use the shiny toy, but warn that with changing
3790 * probing order (which due to our async probing could just be
3791 * device taking longer to startup) the other device could show
3792 * up at any time.
3793 */
3794 nvme_print_device_info(ctrl);
3795 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3796 ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3797 info->is_shared)) {
3798 dev_err(ctrl->device,
3799 "ignoring nsid %d because of duplicate IDs\n",
3800 info->nsid);
3801 return ret;
3802 }
3803
3804 dev_err(ctrl->device,
3805 "clearing duplicate IDs for nsid %d\n", info->nsid);
3806 dev_err(ctrl->device,
3807 "use of /dev/disk/by-id/ may cause data corruption\n");
3808 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3809 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3810 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3811 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3812 }
3813
3814 mutex_lock(&ctrl->subsys->lock);
3815 head = nvme_find_ns_head(ctrl, info->nsid);
3816 if (!head) {
3817 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3818 if (ret) {
3819 dev_err(ctrl->device,
3820 "duplicate IDs in subsystem for nsid %d\n",
3821 info->nsid);
3822 goto out_unlock;
3823 }
3824 head = nvme_alloc_ns_head(ctrl, info);
3825 if (IS_ERR(head)) {
3826 ret = PTR_ERR(head);
3827 goto out_unlock;
3828 }
3829 } else {
3830 ret = -EINVAL;
3831 if (!info->is_shared || !head->shared) {
3832 dev_err(ctrl->device,
3833 "Duplicate unshared namespace %d\n",
3834 info->nsid);
3835 goto out_put_ns_head;
3836 }
3837 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3838 dev_err(ctrl->device,
3839 "IDs don't match for shared namespace %d\n",
3840 info->nsid);
3841 goto out_put_ns_head;
3842 }
3843
3844 if (!multipath) {
3845 dev_warn(ctrl->device,
3846 "Found shared namespace %d, but multipathing not supported.\n",
3847 info->nsid);
3848 dev_warn_once(ctrl->device,
3849 "Shared namespace support requires core_nvme.multipath=Y.\n");
3850 }
3851 }
3852
3853 list_add_tail_rcu(&ns->siblings, &head->list);
3854 ns->head = head;
3855 mutex_unlock(&ctrl->subsys->lock);
3856 return 0;
3857
3858 out_put_ns_head:
3859 nvme_put_ns_head(head);
3860 out_unlock:
3861 mutex_unlock(&ctrl->subsys->lock);
3862 return ret;
3863 }
3864
nvme_find_get_ns(struct nvme_ctrl * ctrl,unsigned nsid)3865 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3866 {
3867 struct nvme_ns *ns, *ret = NULL;
3868 int srcu_idx;
3869
3870 srcu_idx = srcu_read_lock(&ctrl->srcu);
3871 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
3872 srcu_read_lock_held(&ctrl->srcu)) {
3873 if (ns->head->ns_id == nsid) {
3874 if (!nvme_get_ns(ns))
3875 continue;
3876 ret = ns;
3877 break;
3878 }
3879 if (ns->head->ns_id > nsid)
3880 break;
3881 }
3882 srcu_read_unlock(&ctrl->srcu, srcu_idx);
3883 return ret;
3884 }
3885 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, "NVME_TARGET_PASSTHRU");
3886
3887 /*
3888 * Add the namespace to the controller list while keeping the list ordered.
3889 */
nvme_ns_add_to_ctrl_list(struct nvme_ns * ns)3890 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3891 {
3892 struct nvme_ns *tmp;
3893
3894 list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3895 if (tmp->head->ns_id < ns->head->ns_id) {
3896 list_add_rcu(&ns->list, &tmp->list);
3897 return;
3898 }
3899 }
3900 list_add(&ns->list, &ns->ctrl->namespaces);
3901 }
3902
nvme_alloc_ns(struct nvme_ctrl * ctrl,struct nvme_ns_info * info)3903 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3904 {
3905 struct queue_limits lim = { };
3906 struct nvme_ns *ns;
3907 struct gendisk *disk;
3908 int node = ctrl->numa_node;
3909
3910 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3911 if (!ns)
3912 return;
3913
3914 if (ctrl->opts && ctrl->opts->data_digest)
3915 lim.features |= BLK_FEAT_STABLE_WRITES;
3916 if (ctrl->ops->supports_pci_p2pdma &&
3917 ctrl->ops->supports_pci_p2pdma(ctrl))
3918 lim.features |= BLK_FEAT_PCI_P2PDMA;
3919
3920 disk = blk_mq_alloc_disk(ctrl->tagset, &lim, ns);
3921 if (IS_ERR(disk))
3922 goto out_free_ns;
3923 disk->fops = &nvme_bdev_ops;
3924 disk->private_data = ns;
3925
3926 ns->disk = disk;
3927 ns->queue = disk->queue;
3928 ns->ctrl = ctrl;
3929 kref_init(&ns->kref);
3930
3931 if (nvme_init_ns_head(ns, info))
3932 goto out_cleanup_disk;
3933
3934 /*
3935 * If multipathing is enabled, the device name for all disks and not
3936 * just those that represent shared namespaces needs to be based on the
3937 * subsystem instance. Using the controller instance for private
3938 * namespaces could lead to naming collisions between shared and private
3939 * namespaces if they don't use a common numbering scheme.
3940 *
3941 * If multipathing is not enabled, disk names must use the controller
3942 * instance as shared namespaces will show up as multiple block
3943 * devices.
3944 */
3945 if (nvme_ns_head_multipath(ns->head)) {
3946 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3947 ctrl->instance, ns->head->instance);
3948 disk->flags |= GENHD_FL_HIDDEN;
3949 } else if (multipath) {
3950 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3951 ns->head->instance);
3952 } else {
3953 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3954 ns->head->instance);
3955 }
3956
3957 if (nvme_update_ns_info(ns, info))
3958 goto out_unlink_ns;
3959
3960 mutex_lock(&ctrl->namespaces_lock);
3961 /*
3962 * Ensure that no namespaces are added to the ctrl list after the queues
3963 * are frozen, thereby avoiding a deadlock between scan and reset.
3964 */
3965 if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3966 mutex_unlock(&ctrl->namespaces_lock);
3967 goto out_unlink_ns;
3968 }
3969 nvme_ns_add_to_ctrl_list(ns);
3970 mutex_unlock(&ctrl->namespaces_lock);
3971 synchronize_srcu(&ctrl->srcu);
3972 nvme_get_ctrl(ctrl);
3973
3974 if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3975 goto out_cleanup_ns_from_list;
3976
3977 if (!nvme_ns_head_multipath(ns->head))
3978 nvme_add_ns_cdev(ns);
3979
3980 nvme_mpath_add_disk(ns, info->anagrpid);
3981 nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3982
3983 /*
3984 * Set ns->disk->device->driver_data to ns so we can access
3985 * ns->head->passthru_err_log_enabled in
3986 * nvme_io_passthru_err_log_enabled_[store | show]().
3987 */
3988 dev_set_drvdata(disk_to_dev(ns->disk), ns);
3989
3990 return;
3991
3992 out_cleanup_ns_from_list:
3993 nvme_put_ctrl(ctrl);
3994 mutex_lock(&ctrl->namespaces_lock);
3995 list_del_rcu(&ns->list);
3996 mutex_unlock(&ctrl->namespaces_lock);
3997 synchronize_srcu(&ctrl->srcu);
3998 out_unlink_ns:
3999 mutex_lock(&ctrl->subsys->lock);
4000 list_del_rcu(&ns->siblings);
4001 if (list_empty(&ns->head->list))
4002 list_del_init(&ns->head->entry);
4003 mutex_unlock(&ctrl->subsys->lock);
4004 nvme_put_ns_head(ns->head);
4005 out_cleanup_disk:
4006 put_disk(disk);
4007 out_free_ns:
4008 kfree(ns);
4009 }
4010
nvme_ns_remove(struct nvme_ns * ns)4011 static void nvme_ns_remove(struct nvme_ns *ns)
4012 {
4013 bool last_path = false;
4014
4015 if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
4016 return;
4017
4018 clear_bit(NVME_NS_READY, &ns->flags);
4019 set_capacity(ns->disk, 0);
4020 nvme_fault_inject_fini(&ns->fault_inject);
4021
4022 /*
4023 * Ensure that !NVME_NS_READY is seen by other threads to prevent
4024 * this ns going back into current_path.
4025 */
4026 synchronize_srcu(&ns->head->srcu);
4027
4028 /* wait for concurrent submissions */
4029 if (nvme_mpath_clear_current_path(ns))
4030 synchronize_srcu(&ns->head->srcu);
4031
4032 mutex_lock(&ns->ctrl->subsys->lock);
4033 list_del_rcu(&ns->siblings);
4034 if (list_empty(&ns->head->list)) {
4035 list_del_init(&ns->head->entry);
4036 last_path = true;
4037 }
4038 mutex_unlock(&ns->ctrl->subsys->lock);
4039
4040 /* guarantee not available in head->list */
4041 synchronize_srcu(&ns->head->srcu);
4042
4043 if (!nvme_ns_head_multipath(ns->head))
4044 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
4045
4046 nvme_mpath_remove_sysfs_link(ns);
4047
4048 del_gendisk(ns->disk);
4049
4050 mutex_lock(&ns->ctrl->namespaces_lock);
4051 list_del_rcu(&ns->list);
4052 mutex_unlock(&ns->ctrl->namespaces_lock);
4053 synchronize_srcu(&ns->ctrl->srcu);
4054
4055 if (last_path)
4056 nvme_mpath_shutdown_disk(ns->head);
4057 nvme_put_ns(ns);
4058 }
4059
nvme_ns_remove_by_nsid(struct nvme_ctrl * ctrl,u32 nsid)4060 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
4061 {
4062 struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
4063
4064 if (ns) {
4065 nvme_ns_remove(ns);
4066 nvme_put_ns(ns);
4067 }
4068 }
4069
nvme_validate_ns(struct nvme_ns * ns,struct nvme_ns_info * info)4070 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
4071 {
4072 int ret = NVME_SC_INVALID_NS | NVME_STATUS_DNR;
4073
4074 if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
4075 dev_err(ns->ctrl->device,
4076 "identifiers changed for nsid %d\n", ns->head->ns_id);
4077 goto out;
4078 }
4079
4080 ret = nvme_update_ns_info(ns, info);
4081 out:
4082 /*
4083 * Only remove the namespace if we got a fatal error back from the
4084 * device, otherwise ignore the error and just move on.
4085 *
4086 * TODO: we should probably schedule a delayed retry here.
4087 */
4088 if (ret > 0 && (ret & NVME_STATUS_DNR))
4089 nvme_ns_remove(ns);
4090 }
4091
nvme_scan_ns(struct nvme_ctrl * ctrl,unsigned nsid)4092 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
4093 {
4094 struct nvme_ns_info info = { .nsid = nsid };
4095 struct nvme_ns *ns;
4096 int ret = 1;
4097
4098 if (nvme_identify_ns_descs(ctrl, &info))
4099 return;
4100
4101 if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
4102 dev_warn(ctrl->device,
4103 "command set not reported for nsid: %d\n", nsid);
4104 return;
4105 }
4106
4107 /*
4108 * If available try to use the Command Set Idependent Identify Namespace
4109 * data structure to find all the generic information that is needed to
4110 * set up a namespace. If not fall back to the legacy version.
4111 */
4112 if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
4113 (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS) ||
4114 ctrl->vs >= NVME_VS(2, 0, 0))
4115 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
4116 if (ret > 0)
4117 ret = nvme_ns_info_from_identify(ctrl, &info);
4118
4119 if (info.is_removed)
4120 nvme_ns_remove_by_nsid(ctrl, nsid);
4121
4122 /*
4123 * Ignore the namespace if it is not ready. We will get an AEN once it
4124 * becomes ready and restart the scan.
4125 */
4126 if (ret || !info.is_ready)
4127 return;
4128
4129 ns = nvme_find_get_ns(ctrl, nsid);
4130 if (ns) {
4131 nvme_validate_ns(ns, &info);
4132 nvme_put_ns(ns);
4133 } else {
4134 nvme_alloc_ns(ctrl, &info);
4135 }
4136 }
4137
4138 /**
4139 * struct async_scan_info - keeps track of controller & NSIDs to scan
4140 * @ctrl: Controller on which namespaces are being scanned
4141 * @next_nsid: Index of next NSID to scan in ns_list
4142 * @ns_list: Pointer to list of NSIDs to scan
4143 *
4144 * Note: There is a single async_scan_info structure shared by all instances
4145 * of nvme_scan_ns_async() scanning a given controller, so the atomic
4146 * operations on next_nsid are critical to ensure each instance scans a unique
4147 * NSID.
4148 */
4149 struct async_scan_info {
4150 struct nvme_ctrl *ctrl;
4151 atomic_t next_nsid;
4152 __le32 *ns_list;
4153 };
4154
nvme_scan_ns_async(void * data,async_cookie_t cookie)4155 static void nvme_scan_ns_async(void *data, async_cookie_t cookie)
4156 {
4157 struct async_scan_info *scan_info = data;
4158 int idx;
4159 u32 nsid;
4160
4161 idx = (u32)atomic_fetch_inc(&scan_info->next_nsid);
4162 nsid = le32_to_cpu(scan_info->ns_list[idx]);
4163
4164 nvme_scan_ns(scan_info->ctrl, nsid);
4165 }
4166
nvme_remove_invalid_namespaces(struct nvme_ctrl * ctrl,unsigned nsid)4167 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
4168 unsigned nsid)
4169 {
4170 struct nvme_ns *ns, *next;
4171 LIST_HEAD(rm_list);
4172
4173 mutex_lock(&ctrl->namespaces_lock);
4174 list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
4175 if (ns->head->ns_id > nsid) {
4176 list_del_rcu(&ns->list);
4177 synchronize_srcu(&ctrl->srcu);
4178 list_add_tail_rcu(&ns->list, &rm_list);
4179 }
4180 }
4181 mutex_unlock(&ctrl->namespaces_lock);
4182
4183 list_for_each_entry_safe(ns, next, &rm_list, list)
4184 nvme_ns_remove(ns);
4185 }
4186
nvme_scan_ns_list(struct nvme_ctrl * ctrl)4187 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
4188 {
4189 const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
4190 __le32 *ns_list;
4191 u32 prev = 0;
4192 int ret = 0, i;
4193 ASYNC_DOMAIN(domain);
4194 struct async_scan_info scan_info;
4195
4196 ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
4197 if (!ns_list)
4198 return -ENOMEM;
4199
4200 scan_info.ctrl = ctrl;
4201 scan_info.ns_list = ns_list;
4202 for (;;) {
4203 struct nvme_command cmd = {
4204 .identify.opcode = nvme_admin_identify,
4205 .identify.cns = NVME_ID_CNS_NS_ACTIVE_LIST,
4206 .identify.nsid = cpu_to_le32(prev),
4207 };
4208
4209 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
4210 NVME_IDENTIFY_DATA_SIZE);
4211 if (ret) {
4212 dev_warn(ctrl->device,
4213 "Identify NS List failed (status=0x%x)\n", ret);
4214 goto free;
4215 }
4216
4217 atomic_set(&scan_info.next_nsid, 0);
4218 for (i = 0; i < nr_entries; i++) {
4219 u32 nsid = le32_to_cpu(ns_list[i]);
4220
4221 if (!nsid) /* end of the list? */
4222 goto out;
4223 async_schedule_domain(nvme_scan_ns_async, &scan_info,
4224 &domain);
4225 while (++prev < nsid)
4226 nvme_ns_remove_by_nsid(ctrl, prev);
4227 }
4228 async_synchronize_full_domain(&domain);
4229 }
4230 out:
4231 nvme_remove_invalid_namespaces(ctrl, prev);
4232 free:
4233 async_synchronize_full_domain(&domain);
4234 kfree(ns_list);
4235 return ret;
4236 }
4237
nvme_scan_ns_sequential(struct nvme_ctrl * ctrl)4238 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4239 {
4240 struct nvme_id_ctrl *id;
4241 u32 nn, i;
4242
4243 if (nvme_identify_ctrl(ctrl, &id))
4244 return;
4245 nn = le32_to_cpu(id->nn);
4246 kfree(id);
4247
4248 for (i = 1; i <= nn; i++)
4249 nvme_scan_ns(ctrl, i);
4250
4251 nvme_remove_invalid_namespaces(ctrl, nn);
4252 }
4253
nvme_clear_changed_ns_log(struct nvme_ctrl * ctrl)4254 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4255 {
4256 size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4257 __le32 *log;
4258 int error;
4259
4260 log = kzalloc(log_size, GFP_KERNEL);
4261 if (!log)
4262 return;
4263
4264 /*
4265 * We need to read the log to clear the AEN, but we don't want to rely
4266 * on it for the changed namespace information as userspace could have
4267 * raced with us in reading the log page, which could cause us to miss
4268 * updates.
4269 */
4270 error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4271 NVME_CSI_NVM, log, log_size, 0);
4272 if (error)
4273 dev_warn(ctrl->device,
4274 "reading changed ns log failed: %d\n", error);
4275
4276 kfree(log);
4277 }
4278
nvme_scan_work(struct work_struct * work)4279 static void nvme_scan_work(struct work_struct *work)
4280 {
4281 struct nvme_ctrl *ctrl =
4282 container_of(work, struct nvme_ctrl, scan_work);
4283 int ret;
4284
4285 /* No tagset on a live ctrl means IO queues could not created */
4286 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4287 return;
4288
4289 /*
4290 * Identify controller limits can change at controller reset due to
4291 * new firmware download, even though it is not common we cannot ignore
4292 * such scenario. Controller's non-mdts limits are reported in the unit
4293 * of logical blocks that is dependent on the format of attached
4294 * namespace. Hence re-read the limits at the time of ns allocation.
4295 */
4296 ret = nvme_init_non_mdts_limits(ctrl);
4297 if (ret < 0) {
4298 dev_warn(ctrl->device,
4299 "reading non-mdts-limits failed: %d\n", ret);
4300 return;
4301 }
4302
4303 if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4304 dev_info(ctrl->device, "rescanning namespaces.\n");
4305 nvme_clear_changed_ns_log(ctrl);
4306 }
4307
4308 mutex_lock(&ctrl->scan_lock);
4309 if (!nvme_id_cns_ok(ctrl, NVME_ID_CNS_NS_ACTIVE_LIST)) {
4310 nvme_scan_ns_sequential(ctrl);
4311 } else {
4312 /*
4313 * Fall back to sequential scan if DNR is set to handle broken
4314 * devices which should support Identify NS List (as per the VS
4315 * they report) but don't actually support it.
4316 */
4317 ret = nvme_scan_ns_list(ctrl);
4318 if (ret > 0 && ret & NVME_STATUS_DNR)
4319 nvme_scan_ns_sequential(ctrl);
4320 }
4321 mutex_unlock(&ctrl->scan_lock);
4322
4323 /* Requeue if we have missed AENs */
4324 if (test_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events))
4325 nvme_queue_scan(ctrl);
4326 #ifdef CONFIG_NVME_MULTIPATH
4327 else if (ctrl->ana_log_buf)
4328 /* Re-read the ANA log page to not miss updates */
4329 queue_work(nvme_wq, &ctrl->ana_work);
4330 #endif
4331 }
4332
4333 /*
4334 * This function iterates the namespace list unlocked to allow recovery from
4335 * controller failure. It is up to the caller to ensure the namespace list is
4336 * not modified by scan work while this function is executing.
4337 */
nvme_remove_namespaces(struct nvme_ctrl * ctrl)4338 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4339 {
4340 struct nvme_ns *ns, *next;
4341 LIST_HEAD(ns_list);
4342
4343 /*
4344 * make sure to requeue I/O to all namespaces as these
4345 * might result from the scan itself and must complete
4346 * for the scan_work to make progress
4347 */
4348 nvme_mpath_clear_ctrl_paths(ctrl);
4349
4350 /*
4351 * Unquiesce io queues so any pending IO won't hang, especially
4352 * those submitted from scan work
4353 */
4354 nvme_unquiesce_io_queues(ctrl);
4355
4356 /* prevent racing with ns scanning */
4357 flush_work(&ctrl->scan_work);
4358
4359 /*
4360 * The dead states indicates the controller was not gracefully
4361 * disconnected. In that case, we won't be able to flush any data while
4362 * removing the namespaces' disks; fail all the queues now to avoid
4363 * potentially having to clean up the failed sync later.
4364 */
4365 if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4366 nvme_mark_namespaces_dead(ctrl);
4367
4368 /* this is a no-op when called from the controller reset handler */
4369 nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4370
4371 mutex_lock(&ctrl->namespaces_lock);
4372 list_splice_init_rcu(&ctrl->namespaces, &ns_list, synchronize_rcu);
4373 mutex_unlock(&ctrl->namespaces_lock);
4374 synchronize_srcu(&ctrl->srcu);
4375
4376 list_for_each_entry_safe(ns, next, &ns_list, list)
4377 nvme_ns_remove(ns);
4378 }
4379 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4380
nvme_class_uevent(const struct device * dev,struct kobj_uevent_env * env)4381 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4382 {
4383 const struct nvme_ctrl *ctrl =
4384 container_of(dev, struct nvme_ctrl, ctrl_device);
4385 struct nvmf_ctrl_options *opts = ctrl->opts;
4386 int ret;
4387
4388 ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4389 if (ret)
4390 return ret;
4391
4392 if (opts) {
4393 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4394 if (ret)
4395 return ret;
4396
4397 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4398 opts->trsvcid ?: "none");
4399 if (ret)
4400 return ret;
4401
4402 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4403 opts->host_traddr ?: "none");
4404 if (ret)
4405 return ret;
4406
4407 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4408 opts->host_iface ?: "none");
4409 }
4410 return ret;
4411 }
4412
nvme_change_uevent(struct nvme_ctrl * ctrl,char * envdata)4413 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4414 {
4415 char *envp[2] = { envdata, NULL };
4416
4417 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4418 }
4419
nvme_aen_uevent(struct nvme_ctrl * ctrl)4420 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4421 {
4422 char *envp[2] = { NULL, NULL };
4423 u32 aen_result = ctrl->aen_result;
4424
4425 ctrl->aen_result = 0;
4426 if (!aen_result)
4427 return;
4428
4429 envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4430 if (!envp[0])
4431 return;
4432 kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4433 kfree(envp[0]);
4434 }
4435
nvme_async_event_work(struct work_struct * work)4436 static void nvme_async_event_work(struct work_struct *work)
4437 {
4438 struct nvme_ctrl *ctrl =
4439 container_of(work, struct nvme_ctrl, async_event_work);
4440
4441 nvme_aen_uevent(ctrl);
4442
4443 /*
4444 * The transport drivers must guarantee AER submission here is safe by
4445 * flushing ctrl async_event_work after changing the controller state
4446 * from LIVE and before freeing the admin queue.
4447 */
4448 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4449 ctrl->ops->submit_async_event(ctrl);
4450 }
4451
nvme_ctrl_pp_status(struct nvme_ctrl * ctrl)4452 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4453 {
4454
4455 u32 csts;
4456
4457 if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4458 return false;
4459
4460 if (csts == ~0)
4461 return false;
4462
4463 return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4464 }
4465
nvme_get_fw_slot_info(struct nvme_ctrl * ctrl)4466 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4467 {
4468 struct nvme_fw_slot_info_log *log;
4469 u8 next_fw_slot, cur_fw_slot;
4470
4471 log = kmalloc(sizeof(*log), GFP_KERNEL);
4472 if (!log)
4473 return;
4474
4475 if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4476 log, sizeof(*log), 0)) {
4477 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4478 goto out_free_log;
4479 }
4480
4481 cur_fw_slot = log->afi & 0x7;
4482 next_fw_slot = (log->afi & 0x70) >> 4;
4483 if (!cur_fw_slot || (next_fw_slot && (cur_fw_slot != next_fw_slot))) {
4484 dev_info(ctrl->device,
4485 "Firmware is activated after next Controller Level Reset\n");
4486 goto out_free_log;
4487 }
4488
4489 memcpy(ctrl->subsys->firmware_rev, &log->frs[cur_fw_slot - 1],
4490 sizeof(ctrl->subsys->firmware_rev));
4491
4492 out_free_log:
4493 kfree(log);
4494 }
4495
nvme_fw_act_work(struct work_struct * work)4496 static void nvme_fw_act_work(struct work_struct *work)
4497 {
4498 struct nvme_ctrl *ctrl = container_of(work,
4499 struct nvme_ctrl, fw_act_work);
4500 unsigned long fw_act_timeout;
4501
4502 nvme_auth_stop(ctrl);
4503
4504 if (ctrl->mtfa)
4505 fw_act_timeout = jiffies + msecs_to_jiffies(ctrl->mtfa * 100);
4506 else
4507 fw_act_timeout = jiffies + secs_to_jiffies(admin_timeout);
4508
4509 nvme_quiesce_io_queues(ctrl);
4510 while (nvme_ctrl_pp_status(ctrl)) {
4511 if (time_after(jiffies, fw_act_timeout)) {
4512 dev_warn(ctrl->device,
4513 "Fw activation timeout, reset controller\n");
4514 nvme_try_sched_reset(ctrl);
4515 return;
4516 }
4517 msleep(100);
4518 }
4519
4520 if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_CONNECTING) ||
4521 !nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4522 return;
4523
4524 nvme_unquiesce_io_queues(ctrl);
4525 /* read FW slot information to clear the AER */
4526 nvme_get_fw_slot_info(ctrl);
4527
4528 queue_work(nvme_wq, &ctrl->async_event_work);
4529 }
4530
nvme_aer_type(u32 result)4531 static u32 nvme_aer_type(u32 result)
4532 {
4533 return result & 0x7;
4534 }
4535
nvme_aer_subtype(u32 result)4536 static u32 nvme_aer_subtype(u32 result)
4537 {
4538 return (result & 0xff00) >> 8;
4539 }
4540
nvme_handle_aen_notice(struct nvme_ctrl * ctrl,u32 result)4541 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4542 {
4543 u32 aer_notice_type = nvme_aer_subtype(result);
4544 bool requeue = true;
4545
4546 switch (aer_notice_type) {
4547 case NVME_AER_NOTICE_NS_CHANGED:
4548 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4549 nvme_queue_scan(ctrl);
4550 break;
4551 case NVME_AER_NOTICE_FW_ACT_STARTING:
4552 /*
4553 * We are (ab)using the RESETTING state to prevent subsequent
4554 * recovery actions from interfering with the controller's
4555 * firmware activation.
4556 */
4557 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4558 requeue = false;
4559 queue_work(nvme_wq, &ctrl->fw_act_work);
4560 }
4561 break;
4562 #ifdef CONFIG_NVME_MULTIPATH
4563 case NVME_AER_NOTICE_ANA:
4564 if (!ctrl->ana_log_buf)
4565 break;
4566 queue_work(nvme_wq, &ctrl->ana_work);
4567 break;
4568 #endif
4569 case NVME_AER_NOTICE_DISC_CHANGED:
4570 ctrl->aen_result = result;
4571 break;
4572 default:
4573 dev_warn(ctrl->device, "async event result %08x\n", result);
4574 }
4575 return requeue;
4576 }
4577
nvme_handle_aer_persistent_error(struct nvme_ctrl * ctrl)4578 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4579 {
4580 dev_warn(ctrl->device,
4581 "resetting controller due to persistent internal error\n");
4582 nvme_reset_ctrl(ctrl);
4583 }
4584
nvme_complete_async_event(struct nvme_ctrl * ctrl,__le16 status,volatile union nvme_result * res)4585 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4586 volatile union nvme_result *res)
4587 {
4588 u32 result = le32_to_cpu(res->u32);
4589 u32 aer_type = nvme_aer_type(result);
4590 u32 aer_subtype = nvme_aer_subtype(result);
4591 bool requeue = true;
4592
4593 if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4594 return;
4595
4596 trace_nvme_async_event(ctrl, result);
4597 switch (aer_type) {
4598 case NVME_AER_NOTICE:
4599 requeue = nvme_handle_aen_notice(ctrl, result);
4600 break;
4601 case NVME_AER_ERROR:
4602 /*
4603 * For a persistent internal error, don't run async_event_work
4604 * to submit a new AER. The controller reset will do it.
4605 */
4606 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4607 nvme_handle_aer_persistent_error(ctrl);
4608 return;
4609 }
4610 fallthrough;
4611 case NVME_AER_SMART:
4612 case NVME_AER_CSS:
4613 case NVME_AER_VS:
4614 ctrl->aen_result = result;
4615 break;
4616 default:
4617 break;
4618 }
4619
4620 if (requeue)
4621 queue_work(nvme_wq, &ctrl->async_event_work);
4622 }
4623 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4624
nvme_alloc_admin_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int cmd_size)4625 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4626 const struct blk_mq_ops *ops, unsigned int cmd_size)
4627 {
4628 struct queue_limits lim = {};
4629 int ret;
4630
4631 memset(set, 0, sizeof(*set));
4632 set->ops = ops;
4633 set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4634 if (ctrl->ops->flags & NVME_F_FABRICS)
4635 /* Reserved for fabric connect and keep alive */
4636 set->reserved_tags = 2;
4637 set->numa_node = ctrl->numa_node;
4638 if (ctrl->ops->flags & NVME_F_BLOCKING)
4639 set->flags |= BLK_MQ_F_BLOCKING;
4640 set->cmd_size = cmd_size;
4641 set->driver_data = ctrl;
4642 set->nr_hw_queues = 1;
4643 set->timeout = NVME_ADMIN_TIMEOUT;
4644 ret = blk_mq_alloc_tag_set(set);
4645 if (ret)
4646 return ret;
4647
4648 ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL);
4649 if (IS_ERR(ctrl->admin_q)) {
4650 ret = PTR_ERR(ctrl->admin_q);
4651 goto out_free_tagset;
4652 }
4653
4654 if (ctrl->ops->flags & NVME_F_FABRICS) {
4655 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
4656 if (IS_ERR(ctrl->fabrics_q)) {
4657 ret = PTR_ERR(ctrl->fabrics_q);
4658 goto out_cleanup_admin_q;
4659 }
4660 }
4661
4662 ctrl->admin_tagset = set;
4663 return 0;
4664
4665 out_cleanup_admin_q:
4666 blk_mq_destroy_queue(ctrl->admin_q);
4667 blk_put_queue(ctrl->admin_q);
4668 out_free_tagset:
4669 blk_mq_free_tag_set(set);
4670 ctrl->admin_q = NULL;
4671 ctrl->fabrics_q = NULL;
4672 return ret;
4673 }
4674 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4675
nvme_remove_admin_tag_set(struct nvme_ctrl * ctrl)4676 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4677 {
4678 /*
4679 * As we're about to destroy the queue and free tagset
4680 * we can not have keep-alive work running.
4681 */
4682 nvme_stop_keep_alive(ctrl);
4683 blk_mq_destroy_queue(ctrl->admin_q);
4684 blk_put_queue(ctrl->admin_q);
4685 if (ctrl->ops->flags & NVME_F_FABRICS) {
4686 blk_mq_destroy_queue(ctrl->fabrics_q);
4687 blk_put_queue(ctrl->fabrics_q);
4688 }
4689 blk_mq_free_tag_set(ctrl->admin_tagset);
4690 }
4691 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4692
nvme_alloc_io_tag_set(struct nvme_ctrl * ctrl,struct blk_mq_tag_set * set,const struct blk_mq_ops * ops,unsigned int nr_maps,unsigned int cmd_size)4693 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4694 const struct blk_mq_ops *ops, unsigned int nr_maps,
4695 unsigned int cmd_size)
4696 {
4697 int ret;
4698
4699 memset(set, 0, sizeof(*set));
4700 set->ops = ops;
4701 set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4702 /*
4703 * Some Apple controllers requires tags to be unique across admin and
4704 * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4705 */
4706 if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4707 set->reserved_tags = NVME_AQ_DEPTH;
4708 else if (ctrl->ops->flags & NVME_F_FABRICS)
4709 /* Reserved for fabric connect */
4710 set->reserved_tags = 1;
4711 set->numa_node = ctrl->numa_node;
4712 if (ctrl->ops->flags & NVME_F_BLOCKING)
4713 set->flags |= BLK_MQ_F_BLOCKING;
4714 set->cmd_size = cmd_size;
4715 set->driver_data = ctrl;
4716 set->nr_hw_queues = ctrl->queue_count - 1;
4717 set->timeout = NVME_IO_TIMEOUT;
4718 set->nr_maps = nr_maps;
4719 ret = blk_mq_alloc_tag_set(set);
4720 if (ret)
4721 return ret;
4722
4723 if (ctrl->ops->flags & NVME_F_FABRICS) {
4724 struct queue_limits lim = {
4725 .features = BLK_FEAT_SKIP_TAGSET_QUIESCE,
4726 };
4727
4728 ctrl->connect_q = blk_mq_alloc_queue(set, &lim, NULL);
4729 if (IS_ERR(ctrl->connect_q)) {
4730 ret = PTR_ERR(ctrl->connect_q);
4731 goto out_free_tag_set;
4732 }
4733 }
4734
4735 ctrl->tagset = set;
4736 return 0;
4737
4738 out_free_tag_set:
4739 blk_mq_free_tag_set(set);
4740 ctrl->connect_q = NULL;
4741 return ret;
4742 }
4743 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4744
nvme_remove_io_tag_set(struct nvme_ctrl * ctrl)4745 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4746 {
4747 if (ctrl->ops->flags & NVME_F_FABRICS) {
4748 blk_mq_destroy_queue(ctrl->connect_q);
4749 blk_put_queue(ctrl->connect_q);
4750 }
4751 blk_mq_free_tag_set(ctrl->tagset);
4752 }
4753 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4754
nvme_stop_ctrl(struct nvme_ctrl * ctrl)4755 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4756 {
4757 nvme_mpath_stop(ctrl);
4758 nvme_auth_stop(ctrl);
4759 nvme_stop_failfast_work(ctrl);
4760 flush_work(&ctrl->async_event_work);
4761 cancel_work_sync(&ctrl->fw_act_work);
4762 if (ctrl->ops->stop_ctrl)
4763 ctrl->ops->stop_ctrl(ctrl);
4764 }
4765 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4766
nvme_start_ctrl(struct nvme_ctrl * ctrl)4767 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4768 {
4769 nvme_enable_aen(ctrl);
4770
4771 /*
4772 * persistent discovery controllers need to send indication to userspace
4773 * to re-read the discovery log page to learn about possible changes
4774 * that were missed. We identify persistent discovery controllers by
4775 * checking that they started once before, hence are reconnecting back.
4776 */
4777 if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4778 nvme_discovery_ctrl(ctrl))
4779 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4780
4781 if (ctrl->queue_count > 1) {
4782 nvme_queue_scan(ctrl);
4783 nvme_unquiesce_io_queues(ctrl);
4784 nvme_mpath_update(ctrl);
4785 }
4786
4787 nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4788 set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4789 }
4790 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4791
nvme_uninit_ctrl(struct nvme_ctrl * ctrl)4792 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4793 {
4794 nvme_stop_keep_alive(ctrl);
4795 nvme_hwmon_exit(ctrl);
4796 nvme_fault_inject_fini(&ctrl->fault_inject);
4797 dev_pm_qos_hide_latency_tolerance(ctrl->device);
4798 cdev_device_del(&ctrl->cdev, ctrl->device);
4799 nvme_put_ctrl(ctrl);
4800 }
4801 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4802
nvme_free_cels(struct nvme_ctrl * ctrl)4803 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4804 {
4805 struct nvme_effects_log *cel;
4806 unsigned long i;
4807
4808 xa_for_each(&ctrl->cels, i, cel) {
4809 xa_erase(&ctrl->cels, i);
4810 kfree(cel);
4811 }
4812
4813 xa_destroy(&ctrl->cels);
4814 }
4815
nvme_free_ctrl(struct device * dev)4816 static void nvme_free_ctrl(struct device *dev)
4817 {
4818 struct nvme_ctrl *ctrl =
4819 container_of(dev, struct nvme_ctrl, ctrl_device);
4820 struct nvme_subsystem *subsys = ctrl->subsys;
4821
4822 if (!subsys || ctrl->instance != subsys->instance)
4823 ida_free(&nvme_instance_ida, ctrl->instance);
4824 nvme_free_cels(ctrl);
4825 nvme_mpath_uninit(ctrl);
4826 cleanup_srcu_struct(&ctrl->srcu);
4827 nvme_auth_stop(ctrl);
4828 nvme_auth_free(ctrl);
4829 __free_page(ctrl->discard_page);
4830 free_opal_dev(ctrl->opal_dev);
4831
4832 if (subsys) {
4833 mutex_lock(&nvme_subsystems_lock);
4834 list_del(&ctrl->subsys_entry);
4835 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4836 mutex_unlock(&nvme_subsystems_lock);
4837 }
4838
4839 ctrl->ops->free_ctrl(ctrl);
4840
4841 if (subsys)
4842 nvme_put_subsystem(subsys);
4843 }
4844
4845 /*
4846 * Initialize a NVMe controller structures. This needs to be called during
4847 * earliest initialization so that we have the initialized structured around
4848 * during probing.
4849 *
4850 * On success, the caller must use the nvme_put_ctrl() to release this when
4851 * needed, which also invokes the ops->free_ctrl() callback.
4852 */
nvme_init_ctrl(struct nvme_ctrl * ctrl,struct device * dev,const struct nvme_ctrl_ops * ops,unsigned long quirks)4853 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4854 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4855 {
4856 int ret;
4857
4858 WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4859 ctrl->passthru_err_log_enabled = false;
4860 clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4861 spin_lock_init(&ctrl->lock);
4862 mutex_init(&ctrl->namespaces_lock);
4863
4864 ret = init_srcu_struct(&ctrl->srcu);
4865 if (ret)
4866 return ret;
4867
4868 mutex_init(&ctrl->scan_lock);
4869 INIT_LIST_HEAD(&ctrl->namespaces);
4870 xa_init(&ctrl->cels);
4871 ctrl->dev = dev;
4872 ctrl->ops = ops;
4873 ctrl->quirks = quirks;
4874 ctrl->numa_node = NUMA_NO_NODE;
4875 INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4876 INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4877 INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4878 INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4879 init_waitqueue_head(&ctrl->state_wq);
4880
4881 INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4882 INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4883 memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4884 ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4885 ctrl->ka_last_check_time = jiffies;
4886
4887 BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4888 PAGE_SIZE);
4889 ctrl->discard_page = alloc_page(GFP_KERNEL);
4890 if (!ctrl->discard_page) {
4891 ret = -ENOMEM;
4892 goto out;
4893 }
4894
4895 ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4896 if (ret < 0)
4897 goto out;
4898 ctrl->instance = ret;
4899
4900 ret = nvme_auth_init_ctrl(ctrl);
4901 if (ret)
4902 goto out_release_instance;
4903
4904 nvme_mpath_init_ctrl(ctrl);
4905
4906 device_initialize(&ctrl->ctrl_device);
4907 ctrl->device = &ctrl->ctrl_device;
4908 ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4909 ctrl->instance);
4910 ctrl->device->class = &nvme_class;
4911 ctrl->device->parent = ctrl->dev;
4912 if (ops->dev_attr_groups)
4913 ctrl->device->groups = ops->dev_attr_groups;
4914 else
4915 ctrl->device->groups = nvme_dev_attr_groups;
4916 ctrl->device->release = nvme_free_ctrl;
4917 dev_set_drvdata(ctrl->device, ctrl);
4918
4919 return ret;
4920
4921 out_release_instance:
4922 ida_free(&nvme_instance_ida, ctrl->instance);
4923 out:
4924 if (ctrl->discard_page)
4925 __free_page(ctrl->discard_page);
4926 cleanup_srcu_struct(&ctrl->srcu);
4927 return ret;
4928 }
4929 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4930
4931 /*
4932 * On success, returns with an elevated controller reference and caller must
4933 * use nvme_uninit_ctrl() to properly free resources associated with the ctrl.
4934 */
nvme_add_ctrl(struct nvme_ctrl * ctrl)4935 int nvme_add_ctrl(struct nvme_ctrl *ctrl)
4936 {
4937 int ret;
4938
4939 ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4940 if (ret)
4941 return ret;
4942
4943 cdev_init(&ctrl->cdev, &nvme_dev_fops);
4944 ctrl->cdev.owner = ctrl->ops->module;
4945 ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4946 if (ret)
4947 return ret;
4948
4949 /*
4950 * Initialize latency tolerance controls. The sysfs files won't
4951 * be visible to userspace unless the device actually supports APST.
4952 */
4953 ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4954 dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4955 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4956
4957 nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4958 nvme_get_ctrl(ctrl);
4959
4960 return 0;
4961 }
4962 EXPORT_SYMBOL_GPL(nvme_add_ctrl);
4963
4964 /* let I/O to all namespaces fail in preparation for surprise removal */
nvme_mark_namespaces_dead(struct nvme_ctrl * ctrl)4965 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4966 {
4967 struct nvme_ns *ns;
4968 int srcu_idx;
4969
4970 srcu_idx = srcu_read_lock(&ctrl->srcu);
4971 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4972 srcu_read_lock_held(&ctrl->srcu))
4973 blk_mark_disk_dead(ns->disk);
4974 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4975 }
4976 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4977
nvme_unfreeze(struct nvme_ctrl * ctrl)4978 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4979 {
4980 struct nvme_ns *ns;
4981 int srcu_idx;
4982
4983 srcu_idx = srcu_read_lock(&ctrl->srcu);
4984 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4985 srcu_read_lock_held(&ctrl->srcu))
4986 blk_mq_unfreeze_queue_non_owner(ns->queue);
4987 srcu_read_unlock(&ctrl->srcu, srcu_idx);
4988 clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4989 }
4990 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4991
nvme_wait_freeze_timeout(struct nvme_ctrl * ctrl,long timeout)4992 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4993 {
4994 struct nvme_ns *ns;
4995 int srcu_idx;
4996
4997 srcu_idx = srcu_read_lock(&ctrl->srcu);
4998 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
4999 srcu_read_lock_held(&ctrl->srcu)) {
5000 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
5001 if (timeout <= 0)
5002 break;
5003 }
5004 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5005 return timeout;
5006 }
5007 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
5008
nvme_wait_freeze(struct nvme_ctrl * ctrl)5009 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
5010 {
5011 struct nvme_ns *ns;
5012 int srcu_idx;
5013
5014 srcu_idx = srcu_read_lock(&ctrl->srcu);
5015 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5016 srcu_read_lock_held(&ctrl->srcu))
5017 blk_mq_freeze_queue_wait(ns->queue);
5018 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5019 }
5020 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
5021
nvme_start_freeze(struct nvme_ctrl * ctrl)5022 void nvme_start_freeze(struct nvme_ctrl *ctrl)
5023 {
5024 struct nvme_ns *ns;
5025 int srcu_idx;
5026
5027 set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
5028 srcu_idx = srcu_read_lock(&ctrl->srcu);
5029 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5030 srcu_read_lock_held(&ctrl->srcu))
5031 /*
5032 * Typical non_owner use case is from pci driver, in which
5033 * start_freeze is called from timeout work function, but
5034 * unfreeze is done in reset work context
5035 */
5036 blk_freeze_queue_start_non_owner(ns->queue);
5037 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5038 }
5039 EXPORT_SYMBOL_GPL(nvme_start_freeze);
5040
nvme_quiesce_io_queues(struct nvme_ctrl * ctrl)5041 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
5042 {
5043 if (!ctrl->tagset)
5044 return;
5045 if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5046 blk_mq_quiesce_tagset(ctrl->tagset);
5047 else
5048 blk_mq_wait_quiesce_done(ctrl->tagset);
5049 }
5050 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
5051
nvme_unquiesce_io_queues(struct nvme_ctrl * ctrl)5052 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
5053 {
5054 if (!ctrl->tagset)
5055 return;
5056 if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
5057 blk_mq_unquiesce_tagset(ctrl->tagset);
5058 }
5059 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
5060
nvme_quiesce_admin_queue(struct nvme_ctrl * ctrl)5061 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
5062 {
5063 if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5064 blk_mq_quiesce_queue(ctrl->admin_q);
5065 else
5066 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
5067 }
5068 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
5069
nvme_unquiesce_admin_queue(struct nvme_ctrl * ctrl)5070 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
5071 {
5072 if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
5073 blk_mq_unquiesce_queue(ctrl->admin_q);
5074 }
5075 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
5076
nvme_sync_io_queues(struct nvme_ctrl * ctrl)5077 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
5078 {
5079 struct nvme_ns *ns;
5080 int srcu_idx;
5081
5082 srcu_idx = srcu_read_lock(&ctrl->srcu);
5083 list_for_each_entry_srcu(ns, &ctrl->namespaces, list,
5084 srcu_read_lock_held(&ctrl->srcu))
5085 blk_sync_queue(ns->queue);
5086 srcu_read_unlock(&ctrl->srcu, srcu_idx);
5087 }
5088 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
5089
nvme_sync_queues(struct nvme_ctrl * ctrl)5090 void nvme_sync_queues(struct nvme_ctrl *ctrl)
5091 {
5092 nvme_sync_io_queues(ctrl);
5093 if (ctrl->admin_q)
5094 blk_sync_queue(ctrl->admin_q);
5095 }
5096 EXPORT_SYMBOL_GPL(nvme_sync_queues);
5097
nvme_ctrl_from_file(struct file * file)5098 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
5099 {
5100 if (file->f_op != &nvme_dev_fops)
5101 return NULL;
5102 return file->private_data;
5103 }
5104 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, "NVME_TARGET_PASSTHRU");
5105
5106 /*
5107 * Check we didn't inadvertently grow the command structure sizes:
5108 */
_nvme_check_size(void)5109 static inline void _nvme_check_size(void)
5110 {
5111 BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
5112 BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
5113 BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
5114 BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
5115 BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
5116 BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
5117 BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
5118 BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
5119 BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
5120 BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
5121 BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
5122 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
5123 BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
5124 BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
5125 NVME_IDENTIFY_DATA_SIZE);
5126 BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
5127 BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
5128 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
5129 BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
5130 BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
5131 BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
5132 BUILD_BUG_ON(sizeof(struct nvme_endurance_group_log) != 512);
5133 BUILD_BUG_ON(sizeof(struct nvme_rotational_media_log) != 512);
5134 BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
5135 BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
5136 BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
5137 }
5138
5139
nvme_core_init(void)5140 static int __init nvme_core_init(void)
5141 {
5142 unsigned int wq_flags = WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS;
5143 int result = -ENOMEM;
5144
5145 _nvme_check_size();
5146
5147 nvme_wq = alloc_workqueue("nvme-wq", wq_flags, 0);
5148 if (!nvme_wq)
5149 goto out;
5150
5151 nvme_reset_wq = alloc_workqueue("nvme-reset-wq", wq_flags, 0);
5152 if (!nvme_reset_wq)
5153 goto destroy_wq;
5154
5155 nvme_delete_wq = alloc_workqueue("nvme-delete-wq", wq_flags, 0);
5156 if (!nvme_delete_wq)
5157 goto destroy_reset_wq;
5158
5159 result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
5160 NVME_MINORS, "nvme");
5161 if (result < 0)
5162 goto destroy_delete_wq;
5163
5164 result = class_register(&nvme_class);
5165 if (result)
5166 goto unregister_chrdev;
5167
5168 result = class_register(&nvme_subsys_class);
5169 if (result)
5170 goto destroy_class;
5171
5172 result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
5173 "nvme-generic");
5174 if (result < 0)
5175 goto destroy_subsys_class;
5176
5177 result = class_register(&nvme_ns_chr_class);
5178 if (result)
5179 goto unregister_generic_ns;
5180
5181 result = nvme_init_auth();
5182 if (result)
5183 goto destroy_ns_chr;
5184 return 0;
5185
5186 destroy_ns_chr:
5187 class_unregister(&nvme_ns_chr_class);
5188 unregister_generic_ns:
5189 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5190 destroy_subsys_class:
5191 class_unregister(&nvme_subsys_class);
5192 destroy_class:
5193 class_unregister(&nvme_class);
5194 unregister_chrdev:
5195 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5196 destroy_delete_wq:
5197 destroy_workqueue(nvme_delete_wq);
5198 destroy_reset_wq:
5199 destroy_workqueue(nvme_reset_wq);
5200 destroy_wq:
5201 destroy_workqueue(nvme_wq);
5202 out:
5203 return result;
5204 }
5205
nvme_core_exit(void)5206 static void __exit nvme_core_exit(void)
5207 {
5208 nvme_exit_auth();
5209 class_unregister(&nvme_ns_chr_class);
5210 class_unregister(&nvme_subsys_class);
5211 class_unregister(&nvme_class);
5212 unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
5213 unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
5214 destroy_workqueue(nvme_delete_wq);
5215 destroy_workqueue(nvme_reset_wq);
5216 destroy_workqueue(nvme_wq);
5217 ida_destroy(&nvme_ns_chr_minor_ida);
5218 ida_destroy(&nvme_instance_ida);
5219 }
5220
5221 MODULE_LICENSE("GPL");
5222 MODULE_VERSION("1.0");
5223 MODULE_DESCRIPTION("NVMe host core framework");
5224 module_init(nvme_core_init);
5225 module_exit(nvme_core_exit);
5226