1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2019-2020 Realtek Corporation
3 */
4
5 #include <linux/devcoredump.h>
6
7 #include "cam.h"
8 #include "chan.h"
9 #include "debug.h"
10 #include "fw.h"
11 #include "mac.h"
12 #include "ps.h"
13 #include "reg.h"
14 #include "ser.h"
15 #include "util.h"
16
17 #define SER_RECFG_TIMEOUT 1000
18
19 enum ser_evt {
20 SER_EV_NONE,
21 SER_EV_STATE_IN,
22 SER_EV_STATE_OUT,
23 SER_EV_L1_RESET_PREPARE, /* pre-M0 */
24 SER_EV_L1_RESET, /* M1 */
25 SER_EV_DO_RECOVERY, /* M3 */
26 SER_EV_MAC_RESET_DONE, /* M5 */
27 SER_EV_L2_RESET,
28 SER_EV_L2_RECFG_DONE,
29 SER_EV_L2_RECFG_TIMEOUT,
30 SER_EV_M1_TIMEOUT,
31 SER_EV_M3_TIMEOUT,
32 SER_EV_FW_M5_TIMEOUT,
33 SER_EV_L0_RESET,
34 SER_EV_MAXX
35 };
36
37 enum ser_state {
38 SER_IDLE_ST,
39 SER_L1_RESET_PRE_ST,
40 SER_RESET_TRX_ST,
41 SER_DO_HCI_ST,
42 SER_L2_RESET_ST,
43 SER_ST_MAX_ST
44 };
45
46 struct ser_msg {
47 struct list_head list;
48 u8 event;
49 };
50
51 struct state_ent {
52 u8 state;
53 char *name;
54 void (*st_func)(struct rtw89_ser *ser, u8 event);
55 };
56
57 struct event_ent {
58 u8 event;
59 char *name;
60 };
61
ser_ev_name(struct rtw89_ser * ser,u8 event)62 static char *ser_ev_name(struct rtw89_ser *ser, u8 event)
63 {
64 if (event < SER_EV_MAXX)
65 return ser->ev_tbl[event].name;
66
67 return "err_ev_name";
68 }
69
ser_st_name(struct rtw89_ser * ser)70 static char *ser_st_name(struct rtw89_ser *ser)
71 {
72 if (ser->state < SER_ST_MAX_ST)
73 return ser->st_tbl[ser->state].name;
74
75 return "err_st_name";
76 }
77
78 #define RTW89_DEF_SER_CD_TYPE(_name, _type, _size) \
79 struct ser_cd_ ## _name { \
80 u32 type; \
81 u32 type_size; \
82 u64 padding; \
83 u8 data[_size]; \
84 } __packed; \
85 static void ser_cd_ ## _name ## _init(struct ser_cd_ ## _name *p) \
86 { \
87 p->type = _type; \
88 p->type_size = sizeof(p->data); \
89 p->padding = 0x0123456789abcdef; \
90 }
91
92 enum rtw89_ser_cd_type {
93 RTW89_SER_CD_FW_RSVD_PLE = 0,
94 RTW89_SER_CD_FW_BACKTRACE = 1,
95 };
96
97 RTW89_DEF_SER_CD_TYPE(fw_rsvd_ple,
98 RTW89_SER_CD_FW_RSVD_PLE,
99 RTW89_FW_RSVD_PLE_SIZE);
100
101 RTW89_DEF_SER_CD_TYPE(fw_backtrace,
102 RTW89_SER_CD_FW_BACKTRACE,
103 RTW89_FW_BACKTRACE_MAX_SIZE);
104
105 struct rtw89_ser_cd_buffer {
106 struct ser_cd_fw_rsvd_ple fwple;
107 struct ser_cd_fw_backtrace fwbt;
108 } __packed;
109
rtw89_ser_cd_prep(struct rtw89_dev * rtwdev)110 static struct rtw89_ser_cd_buffer *rtw89_ser_cd_prep(struct rtw89_dev *rtwdev)
111 {
112 struct rtw89_ser_cd_buffer *buf;
113
114 buf = vzalloc(sizeof(*buf));
115 if (!buf)
116 return NULL;
117
118 ser_cd_fw_rsvd_ple_init(&buf->fwple);
119 ser_cd_fw_backtrace_init(&buf->fwbt);
120
121 return buf;
122 }
123
rtw89_ser_cd_send(struct rtw89_dev * rtwdev,struct rtw89_ser_cd_buffer * buf)124 static void rtw89_ser_cd_send(struct rtw89_dev *rtwdev,
125 struct rtw89_ser_cd_buffer *buf)
126 {
127 rtw89_debug(rtwdev, RTW89_DBG_SER, "SER sends core dump\n");
128
129 /* After calling dev_coredump, buf's lifetime is supposed to be
130 * handled by the device coredump framework. Note that a new dump
131 * will be discarded if a previous one hasn't been released by
132 * framework yet.
133 */
134 dev_coredumpv(rtwdev->dev, buf, sizeof(*buf), GFP_KERNEL);
135 }
136
rtw89_ser_cd_free(struct rtw89_dev * rtwdev,struct rtw89_ser_cd_buffer * buf,bool free_self)137 static void rtw89_ser_cd_free(struct rtw89_dev *rtwdev,
138 struct rtw89_ser_cd_buffer *buf, bool free_self)
139 {
140 if (!free_self)
141 return;
142
143 rtw89_debug(rtwdev, RTW89_DBG_SER, "SER frees core dump by self\n");
144
145 /* When some problems happen during filling data of core dump,
146 * we won't send it to device coredump framework. Instead, we
147 * free buf by ourselves.
148 */
149 vfree(buf);
150 }
151
ser_state_run(struct rtw89_ser * ser,u8 evt)152 static void ser_state_run(struct rtw89_ser *ser, u8 evt)
153 {
154 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
155
156 rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s receive %s\n",
157 ser_st_name(ser), ser_ev_name(ser, evt));
158
159 wiphy_lock(rtwdev->hw->wiphy);
160 rtw89_leave_lps(rtwdev);
161 wiphy_unlock(rtwdev->hw->wiphy);
162
163 ser->st_tbl[ser->state].st_func(ser, evt);
164 }
165
ser_state_goto(struct rtw89_ser * ser,u8 new_state)166 static void ser_state_goto(struct rtw89_ser *ser, u8 new_state)
167 {
168 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
169
170 if (ser->state == new_state || new_state >= SER_ST_MAX_ST)
171 return;
172 ser_state_run(ser, SER_EV_STATE_OUT);
173
174 rtw89_debug(rtwdev, RTW89_DBG_SER, "ser: %s goto -> %s\n",
175 ser_st_name(ser), ser->st_tbl[new_state].name);
176
177 ser->state = new_state;
178 ser_state_run(ser, SER_EV_STATE_IN);
179 }
180
__rtw89_ser_dequeue_msg(struct rtw89_ser * ser)181 static struct ser_msg *__rtw89_ser_dequeue_msg(struct rtw89_ser *ser)
182 {
183 struct ser_msg *msg;
184
185 spin_lock_irq(&ser->msg_q_lock);
186 msg = list_first_entry_or_null(&ser->msg_q, struct ser_msg, list);
187 if (msg)
188 list_del(&msg->list);
189 spin_unlock_irq(&ser->msg_q_lock);
190
191 return msg;
192 }
193
rtw89_ser_hdl_work(struct work_struct * work)194 static void rtw89_ser_hdl_work(struct work_struct *work)
195 {
196 struct ser_msg *msg;
197 struct rtw89_ser *ser = container_of(work, struct rtw89_ser,
198 ser_hdl_work);
199
200 while ((msg = __rtw89_ser_dequeue_msg(ser))) {
201 ser_state_run(ser, msg->event);
202 kfree(msg);
203 }
204 }
205
ser_send_msg(struct rtw89_ser * ser,u8 event)206 static int ser_send_msg(struct rtw89_ser *ser, u8 event)
207 {
208 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
209 struct ser_msg *msg = NULL;
210
211 if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags))
212 return -EIO;
213
214 msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
215 if (!msg)
216 return -ENOMEM;
217
218 msg->event = event;
219
220 spin_lock_irq(&ser->msg_q_lock);
221 list_add(&msg->list, &ser->msg_q);
222 spin_unlock_irq(&ser->msg_q_lock);
223
224 ieee80211_queue_work(rtwdev->hw, &ser->ser_hdl_work);
225 return 0;
226 }
227
rtw89_ser_alarm_work(struct work_struct * work)228 static void rtw89_ser_alarm_work(struct work_struct *work)
229 {
230 struct rtw89_ser *ser = container_of(work, struct rtw89_ser,
231 ser_alarm_work.work);
232
233 ser_send_msg(ser, ser->alarm_event);
234 ser->alarm_event = SER_EV_NONE;
235 }
236
ser_set_alarm(struct rtw89_ser * ser,u32 ms,u8 event)237 static void ser_set_alarm(struct rtw89_ser *ser, u32 ms, u8 event)
238 {
239 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
240
241 if (test_bit(RTW89_SER_DRV_STOP_RUN, ser->flags))
242 return;
243
244 ser->alarm_event = event;
245 ieee80211_queue_delayed_work(rtwdev->hw, &ser->ser_alarm_work,
246 msecs_to_jiffies(ms));
247 }
248
ser_del_alarm(struct rtw89_ser * ser)249 static void ser_del_alarm(struct rtw89_ser *ser)
250 {
251 cancel_delayed_work(&ser->ser_alarm_work);
252 ser->alarm_event = SER_EV_NONE;
253 }
254
255 /* driver function */
drv_stop_tx(struct rtw89_ser * ser)256 static void drv_stop_tx(struct rtw89_ser *ser)
257 {
258 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
259
260 ieee80211_stop_queues(rtwdev->hw);
261 set_bit(RTW89_SER_DRV_STOP_TX, ser->flags);
262 }
263
drv_stop_rx(struct rtw89_ser * ser)264 static void drv_stop_rx(struct rtw89_ser *ser)
265 {
266 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
267
268 clear_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
269 set_bit(RTW89_SER_DRV_STOP_RX, ser->flags);
270 }
271
drv_trx_reset(struct rtw89_ser * ser)272 static void drv_trx_reset(struct rtw89_ser *ser)
273 {
274 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
275
276 rtw89_hci_reset(rtwdev);
277 }
278
drv_resume_tx(struct rtw89_ser * ser)279 static void drv_resume_tx(struct rtw89_ser *ser)
280 {
281 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
282
283 if (!test_bit(RTW89_SER_DRV_STOP_TX, ser->flags))
284 return;
285
286 ieee80211_wake_queues(rtwdev->hw);
287 clear_bit(RTW89_SER_DRV_STOP_TX, ser->flags);
288 }
289
drv_resume_rx(struct rtw89_ser * ser)290 static void drv_resume_rx(struct rtw89_ser *ser)
291 {
292 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
293
294 if (!test_bit(RTW89_SER_DRV_STOP_RX, ser->flags))
295 return;
296
297 set_bit(RTW89_FLAG_RUNNING, rtwdev->flags);
298 clear_bit(RTW89_SER_DRV_STOP_RX, ser->flags);
299 }
300
ser_reset_vif(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)301 static void ser_reset_vif(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
302 {
303 struct rtw89_vif_link *rtwvif_link;
304 unsigned int link_id;
305
306 rtwvif->tdls_peer = 0;
307
308 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id) {
309 rtw89_core_release_bit_map(rtwdev->hw_port, rtwvif_link->port);
310 rtwvif_link->net_type = RTW89_NET_TYPE_NO_LINK;
311 rtwvif_link->trigger = false;
312 }
313 }
314
ser_sta_deinit_cam_iter(void * data,struct ieee80211_sta * sta)315 static void ser_sta_deinit_cam_iter(void *data, struct ieee80211_sta *sta)
316 {
317 struct rtw89_vif *target_rtwvif = (struct rtw89_vif *)data;
318 struct rtw89_sta *rtwsta = sta_to_rtwsta(sta);
319 struct rtw89_vif *rtwvif = rtwsta->rtwvif;
320 struct rtw89_dev *rtwdev = rtwvif->rtwdev;
321 struct rtw89_vif_link *rtwvif_link;
322 struct rtw89_sta_link *rtwsta_link;
323 unsigned int link_id;
324
325 if (rtwvif != target_rtwvif)
326 return;
327
328 rtw89_sta_for_each_link(rtwsta, rtwsta_link, link_id) {
329 rtwvif_link = rtwsta_link->rtwvif_link;
330
331 if (rtwvif_link->net_type == RTW89_NET_TYPE_AP_MODE || sta->tdls)
332 rtw89_cam_deinit_addr_cam(rtwdev, &rtwsta_link->addr_cam);
333 if (sta->tdls)
334 rtw89_cam_deinit_bssid_cam(rtwdev, &rtwsta_link->bssid_cam);
335
336 INIT_LIST_HEAD(&rtwsta_link->ba_cam_list);
337 }
338 }
339
ser_deinit_cam(struct rtw89_dev * rtwdev,struct rtw89_vif * rtwvif)340 static void ser_deinit_cam(struct rtw89_dev *rtwdev, struct rtw89_vif *rtwvif)
341 {
342 struct rtw89_vif_link *rtwvif_link;
343 unsigned int link_id;
344
345 ieee80211_iterate_stations_atomic(rtwdev->hw,
346 ser_sta_deinit_cam_iter,
347 rtwvif);
348
349 rtw89_vif_for_each_link(rtwvif, rtwvif_link, link_id)
350 rtw89_cam_deinit(rtwdev, rtwvif_link);
351
352 bitmap_zero(rtwdev->cam_info.ba_cam_map, RTW89_MAX_BA_CAM_NUM);
353 }
354
ser_reset_mac_binding(struct rtw89_dev * rtwdev)355 static void ser_reset_mac_binding(struct rtw89_dev *rtwdev)
356 {
357 struct rtw89_vif *rtwvif;
358
359 rtw89_cam_reset_keys(rtwdev);
360 rtw89_for_each_rtwvif(rtwdev, rtwvif)
361 ser_deinit_cam(rtwdev, rtwvif);
362
363 rtw89_core_release_all_bits_map(rtwdev->mac_id_map, RTW89_MAX_MAC_ID_NUM);
364 rtw89_for_each_rtwvif(rtwdev, rtwvif)
365 ser_reset_vif(rtwdev, rtwvif);
366
367 rtwdev->total_sta_assoc = 0;
368 refcount_set(&rtwdev->refcount_ap_info, 0);
369 }
370
371 /* hal function */
hal_enable_dma(struct rtw89_ser * ser)372 static int hal_enable_dma(struct rtw89_ser *ser)
373 {
374 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
375 int ret;
376
377 if (!test_bit(RTW89_SER_HAL_STOP_DMA, ser->flags))
378 return 0;
379
380 if (!rtwdev->hci.ops->mac_lv1_rcvy)
381 return -EIO;
382
383 ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_2);
384 if (!ret)
385 clear_bit(RTW89_SER_HAL_STOP_DMA, ser->flags);
386 else
387 rtw89_debug(rtwdev, RTW89_DBG_SER,
388 "lv1 rcvy fail to start dma: %d\n", ret);
389
390 return ret;
391 }
392
hal_stop_dma(struct rtw89_ser * ser)393 static int hal_stop_dma(struct rtw89_ser *ser)
394 {
395 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
396 int ret;
397
398 if (!rtwdev->hci.ops->mac_lv1_rcvy)
399 return -EIO;
400
401 ret = rtwdev->hci.ops->mac_lv1_rcvy(rtwdev, RTW89_LV1_RCVY_STEP_1);
402 if (!ret)
403 set_bit(RTW89_SER_HAL_STOP_DMA, ser->flags);
404 else
405 rtw89_debug(rtwdev, RTW89_DBG_SER,
406 "lv1 rcvy fail to stop dma: %d\n", ret);
407
408 return ret;
409 }
410
hal_send_post_m0_event(struct rtw89_ser * ser)411 static void hal_send_post_m0_event(struct rtw89_ser *ser)
412 {
413 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
414
415 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RESET_START_DMAC);
416 }
417
hal_send_m2_event(struct rtw89_ser * ser)418 static void hal_send_m2_event(struct rtw89_ser *ser)
419 {
420 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
421
422 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_DISABLE_EN);
423 }
424
hal_send_m4_event(struct rtw89_ser * ser)425 static void hal_send_m4_event(struct rtw89_ser *ser)
426 {
427 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
428
429 rtw89_mac_set_err_status(rtwdev, MAC_AX_ERR_L1_RCVY_EN);
430 }
431
432 /* state handler */
ser_idle_st_hdl(struct rtw89_ser * ser,u8 evt)433 static void ser_idle_st_hdl(struct rtw89_ser *ser, u8 evt)
434 {
435 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
436
437 switch (evt) {
438 case SER_EV_STATE_IN:
439 rtw89_hci_recovery_complete(rtwdev);
440 clear_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags);
441 clear_bit(RTW89_FLAG_CRASH_SIMULATING, rtwdev->flags);
442 break;
443 case SER_EV_L1_RESET_PREPARE:
444 ser_state_goto(ser, SER_L1_RESET_PRE_ST);
445 break;
446 case SER_EV_L1_RESET:
447 ser_state_goto(ser, SER_RESET_TRX_ST);
448 break;
449 case SER_EV_L2_RESET:
450 ser_state_goto(ser, SER_L2_RESET_ST);
451 break;
452 case SER_EV_STATE_OUT:
453 set_bit(RTW89_FLAG_SER_HANDLING, rtwdev->flags);
454 rtw89_hci_recovery_start(rtwdev);
455 break;
456 default:
457 break;
458 }
459 }
460
ser_l1_reset_pre_st_hdl(struct rtw89_ser * ser,u8 evt)461 static void ser_l1_reset_pre_st_hdl(struct rtw89_ser *ser, u8 evt)
462 {
463 switch (evt) {
464 case SER_EV_STATE_IN:
465 ser->prehandle_l1 = true;
466 hal_send_post_m0_event(ser);
467 ser_set_alarm(ser, 1000, SER_EV_M1_TIMEOUT);
468 break;
469 case SER_EV_L1_RESET:
470 ser_state_goto(ser, SER_RESET_TRX_ST);
471 break;
472 case SER_EV_M1_TIMEOUT:
473 ser_state_goto(ser, SER_L2_RESET_ST);
474 break;
475 case SER_EV_STATE_OUT:
476 ser_del_alarm(ser);
477 break;
478 default:
479 break;
480 }
481 }
482
ser_reset_trx_st_hdl(struct rtw89_ser * ser,u8 evt)483 static void ser_reset_trx_st_hdl(struct rtw89_ser *ser, u8 evt)
484 {
485 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
486 struct wiphy *wiphy = rtwdev->hw->wiphy;
487
488 switch (evt) {
489 case SER_EV_STATE_IN:
490 wiphy_lock(wiphy);
491 wiphy_delayed_work_cancel(wiphy, &rtwdev->track_work);
492 wiphy_unlock(wiphy);
493 drv_stop_tx(ser);
494
495 if (hal_stop_dma(ser)) {
496 ser_state_goto(ser, SER_L2_RESET_ST);
497 break;
498 }
499
500 drv_stop_rx(ser);
501 drv_trx_reset(ser);
502
503 /* wait m3 */
504 hal_send_m2_event(ser);
505
506 /* set alarm to prevent FW response timeout */
507 ser_set_alarm(ser, 1000, SER_EV_M3_TIMEOUT);
508 break;
509
510 case SER_EV_DO_RECOVERY:
511 ser_state_goto(ser, SER_DO_HCI_ST);
512 break;
513
514 case SER_EV_M3_TIMEOUT:
515 ser_state_goto(ser, SER_L2_RESET_ST);
516 break;
517
518 case SER_EV_STATE_OUT:
519 ser_del_alarm(ser);
520 hal_enable_dma(ser);
521 drv_resume_rx(ser);
522 drv_resume_tx(ser);
523 wiphy_delayed_work_queue(wiphy, &rtwdev->track_work,
524 RTW89_TRACK_WORK_PERIOD);
525 break;
526
527 default:
528 break;
529 }
530 }
531
ser_do_hci_st_hdl(struct rtw89_ser * ser,u8 evt)532 static void ser_do_hci_st_hdl(struct rtw89_ser *ser, u8 evt)
533 {
534 switch (evt) {
535 case SER_EV_STATE_IN:
536 /* wait m5 */
537 hal_send_m4_event(ser);
538
539 /* prevent FW response timeout */
540 ser_set_alarm(ser, 1000, SER_EV_FW_M5_TIMEOUT);
541 break;
542
543 case SER_EV_FW_M5_TIMEOUT:
544 ser_state_goto(ser, SER_L2_RESET_ST);
545 break;
546
547 case SER_EV_MAC_RESET_DONE:
548 ser_state_goto(ser, SER_IDLE_ST);
549 break;
550
551 case SER_EV_STATE_OUT:
552 ser_del_alarm(ser);
553 break;
554
555 default:
556 break;
557 }
558 }
559
ser_mac_mem_dump(struct rtw89_dev * rtwdev,u8 * buf,u8 sel,u32 start_addr,u32 len)560 static void ser_mac_mem_dump(struct rtw89_dev *rtwdev, u8 *buf,
561 u8 sel, u32 start_addr, u32 len)
562 {
563 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
564 u32 filter_model_addr = mac->filter_model_addr;
565 u32 indir_access_addr = mac->indir_access_addr;
566 u32 *ptr = (u32 *)buf;
567 u32 base_addr, start_page, residue;
568 u32 cnt = 0;
569 u32 i;
570
571 start_page = start_addr / MAC_MEM_DUMP_PAGE_SIZE;
572 residue = start_addr % MAC_MEM_DUMP_PAGE_SIZE;
573 base_addr = mac->mem_base_addrs[sel];
574 base_addr += start_page * MAC_MEM_DUMP_PAGE_SIZE;
575
576 while (cnt < len) {
577 rtw89_write32(rtwdev, filter_model_addr, base_addr);
578
579 for (i = indir_access_addr + residue;
580 i < indir_access_addr + MAC_MEM_DUMP_PAGE_SIZE;
581 i += 4, ptr++) {
582 *ptr = rtw89_read32(rtwdev, i);
583 cnt += 4;
584 if (cnt >= len)
585 break;
586 }
587
588 residue = 0;
589 base_addr += MAC_MEM_DUMP_PAGE_SIZE;
590 }
591 }
592
rtw89_ser_fw_rsvd_ple_dump(struct rtw89_dev * rtwdev,u8 * buf)593 static void rtw89_ser_fw_rsvd_ple_dump(struct rtw89_dev *rtwdev, u8 *buf)
594 {
595 u32 start_addr = rtwdev->chip->rsvd_ple_ofst;
596
597 rtw89_debug(rtwdev, RTW89_DBG_SER,
598 "dump mem for fw rsvd payload engine (start addr: 0x%x)\n",
599 start_addr);
600 ser_mac_mem_dump(rtwdev, buf, RTW89_MAC_MEM_SHARED_BUF, start_addr,
601 RTW89_FW_RSVD_PLE_SIZE);
602 }
603
604 struct __fw_backtrace_entry {
605 u32 wcpu_addr;
606 u32 size;
607 u32 key;
608 } __packed;
609
610 struct __fw_backtrace_info {
611 u32 ra;
612 u32 sp;
613 } __packed;
614
615 static_assert(RTW89_FW_BACKTRACE_INFO_SIZE ==
616 sizeof(struct __fw_backtrace_info));
617
convert_addr_from_wcpu(u32 wcpu_addr)618 static u32 convert_addr_from_wcpu(u32 wcpu_addr)
619 {
620 if (wcpu_addr < 0x30000000)
621 return wcpu_addr;
622
623 return wcpu_addr & GENMASK(28, 0);
624 }
625
rtw89_ser_fw_backtrace_dump(struct rtw89_dev * rtwdev,u8 * buf,const struct __fw_backtrace_entry * ent)626 static int rtw89_ser_fw_backtrace_dump(struct rtw89_dev *rtwdev, u8 *buf,
627 const struct __fw_backtrace_entry *ent)
628 {
629 struct __fw_backtrace_info *ptr = (struct __fw_backtrace_info *)buf;
630 const struct rtw89_mac_gen_def *mac = rtwdev->chip->mac_def;
631 u32 filter_model_addr = mac->filter_model_addr;
632 u32 indir_access_addr = mac->indir_access_addr;
633 u32 fwbt_addr = convert_addr_from_wcpu(ent->wcpu_addr);
634 u32 fwbt_size = ent->size;
635 u32 fwbt_key = ent->key;
636 u32 i;
637
638 if (fwbt_addr == 0) {
639 rtw89_warn(rtwdev, "FW backtrace invalid address: 0x%x\n",
640 fwbt_addr);
641 return -EINVAL;
642 }
643
644 if (fwbt_key != RTW89_FW_BACKTRACE_KEY) {
645 rtw89_warn(rtwdev, "FW backtrace invalid key: 0x%x\n",
646 fwbt_key);
647 return -EINVAL;
648 }
649
650 if (fwbt_size == 0 || !RTW89_VALID_FW_BACKTRACE_SIZE(fwbt_size) ||
651 fwbt_size > RTW89_FW_BACKTRACE_MAX_SIZE) {
652 rtw89_warn(rtwdev, "FW backtrace invalid size: 0x%x\n",
653 fwbt_size);
654 return -EINVAL;
655 }
656
657 rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace start\n");
658 rtw89_write32(rtwdev, filter_model_addr, fwbt_addr);
659
660 for (i = indir_access_addr;
661 i < indir_access_addr + fwbt_size;
662 i += RTW89_FW_BACKTRACE_INFO_SIZE, ptr++) {
663 *ptr = (struct __fw_backtrace_info){
664 .ra = rtw89_read32(rtwdev, i),
665 .sp = rtw89_read32(rtwdev, i + 4),
666 };
667 rtw89_debug(rtwdev, RTW89_DBG_SER,
668 "next sp: 0x%x, next ra: 0x%x\n",
669 ptr->sp, ptr->ra);
670 }
671
672 rtw89_debug(rtwdev, RTW89_DBG_SER, "dump fw backtrace end\n");
673 return 0;
674 }
675
ser_l2_reset_st_pre_hdl(struct rtw89_ser * ser)676 static void ser_l2_reset_st_pre_hdl(struct rtw89_ser *ser)
677 {
678 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
679 struct rtw89_ser_cd_buffer *buf;
680 struct __fw_backtrace_entry fwbt_ent;
681 int ret = 0;
682
683 buf = rtw89_ser_cd_prep(rtwdev);
684 if (!buf) {
685 ret = -ENOMEM;
686 goto bottom;
687 }
688
689 rtw89_ser_fw_rsvd_ple_dump(rtwdev, buf->fwple.data);
690
691 fwbt_ent = *(struct __fw_backtrace_entry *)buf->fwple.data;
692 ret = rtw89_ser_fw_backtrace_dump(rtwdev, buf->fwbt.data, &fwbt_ent);
693 if (ret)
694 goto bottom;
695
696 rtw89_ser_cd_send(rtwdev, buf);
697
698 bottom:
699 rtw89_ser_cd_free(rtwdev, buf, !!ret);
700
701 ser_reset_mac_binding(rtwdev);
702 rtw89_core_stop(rtwdev);
703 rtw89_entity_init(rtwdev);
704 rtw89_fw_release_general_pkt_list(rtwdev, false);
705 INIT_LIST_HEAD(&rtwdev->rtwvifs_list);
706 }
707
ser_l2_reset_st_hdl(struct rtw89_ser * ser,u8 evt)708 static void ser_l2_reset_st_hdl(struct rtw89_ser *ser, u8 evt)
709 {
710 struct rtw89_dev *rtwdev = container_of(ser, struct rtw89_dev, ser);
711
712 switch (evt) {
713 case SER_EV_STATE_IN:
714 wiphy_lock(rtwdev->hw->wiphy);
715 ser_l2_reset_st_pre_hdl(ser);
716 wiphy_unlock(rtwdev->hw->wiphy);
717
718 ieee80211_restart_hw(rtwdev->hw);
719 ser_set_alarm(ser, SER_RECFG_TIMEOUT, SER_EV_L2_RECFG_TIMEOUT);
720 break;
721
722 case SER_EV_L2_RECFG_TIMEOUT:
723 rtw89_info(rtwdev, "Err: ser L2 re-config timeout\n");
724 fallthrough;
725 case SER_EV_L2_RECFG_DONE:
726 ser_state_goto(ser, SER_IDLE_ST);
727 break;
728
729 case SER_EV_STATE_OUT:
730 ser_del_alarm(ser);
731 break;
732
733 default:
734 break;
735 }
736 }
737
738 static const struct event_ent ser_ev_tbl[] = {
739 {SER_EV_NONE, "SER_EV_NONE"},
740 {SER_EV_STATE_IN, "SER_EV_STATE_IN"},
741 {SER_EV_STATE_OUT, "SER_EV_STATE_OUT"},
742 {SER_EV_L1_RESET_PREPARE, "SER_EV_L1_RESET_PREPARE pre-m0"},
743 {SER_EV_L1_RESET, "SER_EV_L1_RESET m1"},
744 {SER_EV_DO_RECOVERY, "SER_EV_DO_RECOVERY m3"},
745 {SER_EV_MAC_RESET_DONE, "SER_EV_MAC_RESET_DONE m5"},
746 {SER_EV_L2_RESET, "SER_EV_L2_RESET"},
747 {SER_EV_L2_RECFG_DONE, "SER_EV_L2_RECFG_DONE"},
748 {SER_EV_L2_RECFG_TIMEOUT, "SER_EV_L2_RECFG_TIMEOUT"},
749 {SER_EV_M1_TIMEOUT, "SER_EV_M1_TIMEOUT"},
750 {SER_EV_M3_TIMEOUT, "SER_EV_M3_TIMEOUT"},
751 {SER_EV_FW_M5_TIMEOUT, "SER_EV_FW_M5_TIMEOUT"},
752 {SER_EV_L0_RESET, "SER_EV_L0_RESET"},
753 {SER_EV_MAXX, "SER_EV_MAX"}
754 };
755
756 static const struct state_ent ser_st_tbl[] = {
757 {SER_IDLE_ST, "SER_IDLE_ST", ser_idle_st_hdl},
758 {SER_L1_RESET_PRE_ST, "SER_L1_RESET_PRE_ST", ser_l1_reset_pre_st_hdl},
759 {SER_RESET_TRX_ST, "SER_RESET_TRX_ST", ser_reset_trx_st_hdl},
760 {SER_DO_HCI_ST, "SER_DO_HCI_ST", ser_do_hci_st_hdl},
761 {SER_L2_RESET_ST, "SER_L2_RESET_ST", ser_l2_reset_st_hdl}
762 };
763
rtw89_ser_init(struct rtw89_dev * rtwdev)764 int rtw89_ser_init(struct rtw89_dev *rtwdev)
765 {
766 struct rtw89_ser *ser = &rtwdev->ser;
767
768 memset(ser, 0, sizeof(*ser));
769 INIT_LIST_HEAD(&ser->msg_q);
770 ser->state = SER_IDLE_ST;
771 ser->st_tbl = ser_st_tbl;
772 ser->ev_tbl = ser_ev_tbl;
773
774 bitmap_zero(ser->flags, RTW89_NUM_OF_SER_FLAGS);
775 spin_lock_init(&ser->msg_q_lock);
776 INIT_WORK(&ser->ser_hdl_work, rtw89_ser_hdl_work);
777 INIT_DELAYED_WORK(&ser->ser_alarm_work, rtw89_ser_alarm_work);
778 return 0;
779 }
780
rtw89_ser_deinit(struct rtw89_dev * rtwdev)781 int rtw89_ser_deinit(struct rtw89_dev *rtwdev)
782 {
783 struct rtw89_ser *ser = (struct rtw89_ser *)&rtwdev->ser;
784
785 set_bit(RTW89_SER_DRV_STOP_RUN, ser->flags);
786 cancel_delayed_work_sync(&ser->ser_alarm_work);
787 cancel_work_sync(&ser->ser_hdl_work);
788 clear_bit(RTW89_SER_DRV_STOP_RUN, ser->flags);
789 return 0;
790 }
791
rtw89_ser_recfg_done(struct rtw89_dev * rtwdev)792 void rtw89_ser_recfg_done(struct rtw89_dev *rtwdev)
793 {
794 ser_send_msg(&rtwdev->ser, SER_EV_L2_RECFG_DONE);
795 }
796
rtw89_ser_notify(struct rtw89_dev * rtwdev,u32 err)797 int rtw89_ser_notify(struct rtw89_dev *rtwdev, u32 err)
798 {
799 u8 event = SER_EV_NONE;
800
801 rtw89_info(rtwdev, "SER catches error: 0x%x\n", err);
802
803 switch (err) {
804 case MAC_AX_ERR_L1_PREERR_DMAC: /* pre-M0 */
805 event = SER_EV_L1_RESET_PREPARE;
806 break;
807 case MAC_AX_ERR_L1_ERR_DMAC:
808 case MAC_AX_ERR_L0_PROMOTE_TO_L1:
809 event = SER_EV_L1_RESET; /* M1 */
810 break;
811 case MAC_AX_ERR_L1_RESET_DISABLE_DMAC_DONE:
812 event = SER_EV_DO_RECOVERY; /* M3 */
813 break;
814 case MAC_AX_ERR_L1_RESET_RECOVERY_DONE:
815 event = SER_EV_MAC_RESET_DONE; /* M5 */
816 break;
817 case MAC_AX_ERR_L0_ERR_CMAC0:
818 case MAC_AX_ERR_L0_ERR_CMAC1:
819 case MAC_AX_ERR_L0_RESET_DONE:
820 event = SER_EV_L0_RESET;
821 break;
822 default:
823 if (err == MAC_AX_ERR_L1_PROMOTE_TO_L2 ||
824 (err >= MAC_AX_ERR_L2_ERR_AH_DMA &&
825 err <= MAC_AX_GET_ERR_MAX))
826 event = SER_EV_L2_RESET;
827 break;
828 }
829
830 if (event == SER_EV_NONE) {
831 rtw89_warn(rtwdev, "SER cannot recognize error: 0x%x\n", err);
832 return -EINVAL;
833 }
834
835 ser_send_msg(&rtwdev->ser, event);
836 return 0;
837 }
838 EXPORT_SYMBOL(rtw89_ser_notify);
839