1 // SPDX-License-Identifier: GPL-2.0
2 /* Ethernet device driver for Cortina Systems Gemini SoC
3 * Also known as the StorLink SL3512 and SL3516 (SL351x) or Lepus
4 * Net Engine and Gigabit Ethernet MAC (GMAC)
5 * This hardware contains a TCP Offload Engine (TOE) but currently the
6 * driver does not make use of it.
7 *
8 * Authors:
9 * Linus Walleij <linus.walleij@linaro.org>
10 * Tobias Waldvogel <tobias.waldvogel@gmail.com> (OpenWRT)
11 * Michał Mirosław <mirq-linux@rere.qmqm.pl>
12 * Paulius Zaleckas <paulius.zaleckas@gmail.com>
13 * Giuseppe De Robertis <Giuseppe.DeRobertis@ba.infn.it>
14 * Gary Chen & Ch Hsu Storlink Semiconductor
15 */
16 #include <linux/kernel.h>
17 #include <linux/init.h>
18 #include <linux/module.h>
19 #include <linux/platform_device.h>
20 #include <linux/spinlock.h>
21 #include <linux/slab.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/cache.h>
24 #include <linux/interrupt.h>
25 #include <linux/reset.h>
26 #include <linux/clk.h>
27 #include <linux/of.h>
28 #include <linux/of_mdio.h>
29 #include <linux/of_net.h>
30 #include <linux/of_platform.h>
31 #include <linux/etherdevice.h>
32 #include <linux/if_vlan.h>
33 #include <linux/skbuff.h>
34 #include <linux/phy.h>
35 #include <linux/crc32.h>
36 #include <linux/ethtool.h>
37 #include <linux/tcp.h>
38 #include <linux/u64_stats_sync.h>
39
40 #include <linux/in.h>
41 #include <linux/ip.h>
42 #include <linux/ipv6.h>
43 #include <net/gro.h>
44
45 #include "gemini.h"
46
47 #define DRV_NAME "gmac-gemini"
48
49 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV | NETIF_MSG_PROBE | NETIF_MSG_LINK)
50 static int debug = -1;
51 module_param(debug, int, 0);
52 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
53
54 #define HSIZE_8 0x00
55 #define HSIZE_16 0x01
56 #define HSIZE_32 0x02
57
58 #define HBURST_SINGLE 0x00
59 #define HBURST_INCR 0x01
60 #define HBURST_INCR4 0x02
61 #define HBURST_INCR8 0x03
62
63 #define HPROT_DATA_CACHE BIT(0)
64 #define HPROT_PRIVILIGED BIT(1)
65 #define HPROT_BUFFERABLE BIT(2)
66 #define HPROT_CACHABLE BIT(3)
67
68 #define DEFAULT_RX_COALESCE_NSECS 0
69 #define DEFAULT_GMAC_RXQ_ORDER 9
70 #define DEFAULT_GMAC_TXQ_ORDER 8
71 #define DEFAULT_RX_BUF_ORDER 11
72 #define TX_MAX_FRAGS 16
73 #define TX_QUEUE_NUM 1 /* max: 6 */
74 #define RX_MAX_ALLOC_ORDER 2
75
76 #define GMAC0_IRQ0_2 (GMAC0_TXDERR_INT_BIT | GMAC0_TXPERR_INT_BIT | \
77 GMAC0_RXDERR_INT_BIT | GMAC0_RXPERR_INT_BIT)
78 #define GMAC0_IRQ0_TXQ0_INTS (GMAC0_SWTQ00_EOF_INT_BIT | \
79 GMAC0_SWTQ00_FIN_INT_BIT)
80 #define GMAC0_IRQ4_8 (GMAC0_MIB_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT)
81
82 #define GMAC_OFFLOAD_FEATURES (NETIF_F_SG | NETIF_F_IP_CSUM | \
83 NETIF_F_IPV6_CSUM | NETIF_F_RXCSUM | \
84 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6)
85
86 /**
87 * struct gmac_queue_page - page buffer per-page info
88 * @page: the page struct
89 * @mapping: the dma address handle
90 */
91 struct gmac_queue_page {
92 struct page *page;
93 dma_addr_t mapping;
94 };
95
96 struct gmac_txq {
97 struct gmac_txdesc *ring;
98 struct sk_buff **skb;
99 unsigned int cptr;
100 unsigned int noirq_packets;
101 };
102
103 struct gemini_ethernet;
104
105 struct gemini_ethernet_port {
106 u8 id; /* 0 or 1 */
107
108 struct gemini_ethernet *geth;
109 struct net_device *netdev;
110 struct device *dev;
111 void __iomem *dma_base;
112 void __iomem *gmac_base;
113 struct clk *pclk;
114 struct reset_control *reset;
115 int irq;
116 __le32 mac_addr[3];
117
118 void __iomem *rxq_rwptr;
119 struct gmac_rxdesc *rxq_ring;
120 unsigned int rxq_order;
121
122 struct napi_struct napi;
123 struct hrtimer rx_coalesce_timer;
124 unsigned int rx_coalesce_nsecs;
125 unsigned int freeq_refill;
126 struct gmac_txq txq[TX_QUEUE_NUM];
127 unsigned int txq_order;
128 unsigned int irq_every_tx_packets;
129
130 dma_addr_t rxq_dma_base;
131 dma_addr_t txq_dma_base;
132
133 unsigned int msg_enable;
134 spinlock_t config_lock; /* Locks config register */
135
136 struct u64_stats_sync tx_stats_syncp;
137 struct u64_stats_sync rx_stats_syncp;
138 struct u64_stats_sync ir_stats_syncp;
139
140 struct rtnl_link_stats64 stats;
141 u64 hw_stats[RX_STATS_NUM];
142 u64 rx_stats[RX_STATUS_NUM];
143 u64 rx_csum_stats[RX_CHKSUM_NUM];
144 u64 rx_napi_exits;
145 u64 tx_frag_stats[TX_MAX_FRAGS];
146 u64 tx_frags_linearized;
147 u64 tx_hw_csummed;
148 };
149
150 struct gemini_ethernet {
151 struct device *dev;
152 void __iomem *base;
153 struct gemini_ethernet_port *port0;
154 struct gemini_ethernet_port *port1;
155 bool initialized;
156
157 spinlock_t irq_lock; /* Locks IRQ-related registers */
158 unsigned int freeq_order;
159 unsigned int freeq_frag_order;
160 struct gmac_rxdesc *freeq_ring;
161 dma_addr_t freeq_dma_base;
162 struct gmac_queue_page *freeq_pages;
163 unsigned int num_freeq_pages;
164 spinlock_t freeq_lock; /* Locks queue from reentrance */
165 };
166
167 #define GMAC_STATS_NUM ( \
168 RX_STATS_NUM + RX_STATUS_NUM + RX_CHKSUM_NUM + 1 + \
169 TX_MAX_FRAGS + 2)
170
171 static const char gmac_stats_strings[GMAC_STATS_NUM][ETH_GSTRING_LEN] = {
172 "GMAC_IN_DISCARDS",
173 "GMAC_IN_ERRORS",
174 "GMAC_IN_MCAST",
175 "GMAC_IN_BCAST",
176 "GMAC_IN_MAC1",
177 "GMAC_IN_MAC2",
178 "RX_STATUS_GOOD_FRAME",
179 "RX_STATUS_TOO_LONG_GOOD_CRC",
180 "RX_STATUS_RUNT_FRAME",
181 "RX_STATUS_SFD_NOT_FOUND",
182 "RX_STATUS_CRC_ERROR",
183 "RX_STATUS_TOO_LONG_BAD_CRC",
184 "RX_STATUS_ALIGNMENT_ERROR",
185 "RX_STATUS_TOO_LONG_BAD_ALIGN",
186 "RX_STATUS_RX_ERR",
187 "RX_STATUS_DA_FILTERED",
188 "RX_STATUS_BUFFER_FULL",
189 "RX_STATUS_11",
190 "RX_STATUS_12",
191 "RX_STATUS_13",
192 "RX_STATUS_14",
193 "RX_STATUS_15",
194 "RX_CHKSUM_IP_UDP_TCP_OK",
195 "RX_CHKSUM_IP_OK_ONLY",
196 "RX_CHKSUM_NONE",
197 "RX_CHKSUM_3",
198 "RX_CHKSUM_IP_ERR_UNKNOWN",
199 "RX_CHKSUM_IP_ERR",
200 "RX_CHKSUM_TCP_UDP_ERR",
201 "RX_CHKSUM_7",
202 "RX_NAPI_EXITS",
203 "TX_FRAGS[1]",
204 "TX_FRAGS[2]",
205 "TX_FRAGS[3]",
206 "TX_FRAGS[4]",
207 "TX_FRAGS[5]",
208 "TX_FRAGS[6]",
209 "TX_FRAGS[7]",
210 "TX_FRAGS[8]",
211 "TX_FRAGS[9]",
212 "TX_FRAGS[10]",
213 "TX_FRAGS[11]",
214 "TX_FRAGS[12]",
215 "TX_FRAGS[13]",
216 "TX_FRAGS[14]",
217 "TX_FRAGS[15]",
218 "TX_FRAGS[16+]",
219 "TX_FRAGS_LINEARIZED",
220 "TX_HW_CSUMMED",
221 };
222
223 static void gmac_dump_dma_state(struct net_device *netdev);
224
gmac_update_config0_reg(struct net_device * netdev,u32 val,u32 vmask)225 static void gmac_update_config0_reg(struct net_device *netdev,
226 u32 val, u32 vmask)
227 {
228 struct gemini_ethernet_port *port = netdev_priv(netdev);
229 unsigned long flags;
230 u32 reg;
231
232 spin_lock_irqsave(&port->config_lock, flags);
233
234 reg = readl(port->gmac_base + GMAC_CONFIG0);
235 reg = (reg & ~vmask) | val;
236 writel(reg, port->gmac_base + GMAC_CONFIG0);
237
238 spin_unlock_irqrestore(&port->config_lock, flags);
239 }
240
gmac_enable_tx_rx(struct net_device * netdev)241 static void gmac_enable_tx_rx(struct net_device *netdev)
242 {
243 struct gemini_ethernet_port *port = netdev_priv(netdev);
244 unsigned long flags;
245 u32 reg;
246
247 spin_lock_irqsave(&port->config_lock, flags);
248
249 reg = readl(port->gmac_base + GMAC_CONFIG0);
250 reg &= ~CONFIG0_TX_RX_DISABLE;
251 writel(reg, port->gmac_base + GMAC_CONFIG0);
252
253 spin_unlock_irqrestore(&port->config_lock, flags);
254 }
255
gmac_disable_tx_rx(struct net_device * netdev)256 static void gmac_disable_tx_rx(struct net_device *netdev)
257 {
258 struct gemini_ethernet_port *port = netdev_priv(netdev);
259 unsigned long flags;
260 u32 val;
261
262 spin_lock_irqsave(&port->config_lock, flags);
263
264 val = readl(port->gmac_base + GMAC_CONFIG0);
265 val |= CONFIG0_TX_RX_DISABLE;
266 writel(val, port->gmac_base + GMAC_CONFIG0);
267
268 spin_unlock_irqrestore(&port->config_lock, flags);
269
270 mdelay(10); /* let GMAC consume packet */
271 }
272
gmac_set_flow_control(struct net_device * netdev,bool tx,bool rx)273 static void gmac_set_flow_control(struct net_device *netdev, bool tx, bool rx)
274 {
275 struct gemini_ethernet_port *port = netdev_priv(netdev);
276 unsigned long flags;
277 u32 val;
278
279 spin_lock_irqsave(&port->config_lock, flags);
280
281 val = readl(port->gmac_base + GMAC_CONFIG0);
282 val &= ~CONFIG0_FLOW_CTL;
283 if (tx)
284 val |= CONFIG0_FLOW_TX;
285 if (rx)
286 val |= CONFIG0_FLOW_RX;
287 writel(val, port->gmac_base + GMAC_CONFIG0);
288
289 spin_unlock_irqrestore(&port->config_lock, flags);
290 }
291
gmac_adjust_link(struct net_device * netdev)292 static void gmac_adjust_link(struct net_device *netdev)
293 {
294 struct gemini_ethernet_port *port = netdev_priv(netdev);
295 struct phy_device *phydev = netdev->phydev;
296 union gmac_status status, old_status;
297 bool pause_tx = false;
298 bool pause_rx = false;
299
300 status.bits32 = readl(port->gmac_base + GMAC_STATUS);
301 old_status.bits32 = status.bits32;
302 status.bits.link = phydev->link;
303 status.bits.duplex = phydev->duplex;
304
305 switch (phydev->speed) {
306 case 1000:
307 status.bits.speed = GMAC_SPEED_1000;
308 if (phy_interface_mode_is_rgmii(phydev->interface))
309 status.bits.mii_rmii = GMAC_PHY_RGMII_1000;
310 netdev_dbg(netdev, "connect %s to RGMII @ 1Gbit\n",
311 phydev_name(phydev));
312 break;
313 case 100:
314 status.bits.speed = GMAC_SPEED_100;
315 if (phy_interface_mode_is_rgmii(phydev->interface))
316 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
317 netdev_dbg(netdev, "connect %s to RGMII @ 100 Mbit\n",
318 phydev_name(phydev));
319 break;
320 case 10:
321 status.bits.speed = GMAC_SPEED_10;
322 if (phy_interface_mode_is_rgmii(phydev->interface))
323 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
324 netdev_dbg(netdev, "connect %s to RGMII @ 10 Mbit\n",
325 phydev_name(phydev));
326 break;
327 default:
328 netdev_warn(netdev, "Unsupported PHY speed (%d) on %s\n",
329 phydev->speed, phydev_name(phydev));
330 }
331
332 if (phydev->duplex == DUPLEX_FULL) {
333 phy_get_pause(phydev, &pause_tx, &pause_rx);
334 netdev_dbg(netdev, "set negotiated pause params pause TX = %s, pause RX = %s\n",
335 pause_tx ? "ON" : "OFF", pause_rx ? "ON" : "OFF");
336 }
337
338 gmac_set_flow_control(netdev, pause_tx, pause_rx);
339
340 if (old_status.bits32 == status.bits32)
341 return;
342
343 if (netif_msg_link(port)) {
344 phy_print_status(phydev);
345 netdev_info(netdev, "link flow control: %s\n",
346 phydev->pause
347 ? (phydev->asym_pause ? "tx" : "both")
348 : (phydev->asym_pause ? "rx" : "none")
349 );
350 }
351
352 gmac_disable_tx_rx(netdev);
353 writel(status.bits32, port->gmac_base + GMAC_STATUS);
354 gmac_enable_tx_rx(netdev);
355 }
356
gmac_setup_phy(struct net_device * netdev)357 static int gmac_setup_phy(struct net_device *netdev)
358 {
359 struct gemini_ethernet_port *port = netdev_priv(netdev);
360 union gmac_status status = { .bits32 = 0 };
361 struct device *dev = port->dev;
362 struct phy_device *phy;
363
364 phy = of_phy_get_and_connect(netdev,
365 dev->of_node,
366 gmac_adjust_link);
367 if (!phy)
368 return -ENODEV;
369 netdev->phydev = phy;
370
371 phy_set_max_speed(phy, SPEED_1000);
372 phy_support_asym_pause(phy);
373
374 /* set PHY interface type */
375 switch (phy->interface) {
376 case PHY_INTERFACE_MODE_MII:
377 netdev_dbg(netdev,
378 "MII: set GMAC0 to GMII mode, GMAC1 disabled\n");
379 status.bits.mii_rmii = GMAC_PHY_MII;
380 break;
381 case PHY_INTERFACE_MODE_GMII:
382 netdev_dbg(netdev,
383 "GMII: set GMAC0 to GMII mode, GMAC1 disabled\n");
384 status.bits.mii_rmii = GMAC_PHY_GMII;
385 break;
386 case PHY_INTERFACE_MODE_RGMII:
387 case PHY_INTERFACE_MODE_RGMII_ID:
388 case PHY_INTERFACE_MODE_RGMII_TXID:
389 case PHY_INTERFACE_MODE_RGMII_RXID:
390 netdev_dbg(netdev,
391 "RGMII: set GMAC0 and GMAC1 to MII/RGMII mode\n");
392 status.bits.mii_rmii = GMAC_PHY_RGMII_100_10;
393 break;
394 default:
395 netdev_err(netdev, "Unsupported MII interface\n");
396 phy_disconnect(phy);
397 netdev->phydev = NULL;
398 return -EINVAL;
399 }
400 writel(status.bits32, port->gmac_base + GMAC_STATUS);
401
402 if (netif_msg_link(port))
403 phy_attached_info(phy);
404
405 return 0;
406 }
407
408 /* The maximum frame length is not logically enumerated in the
409 * hardware, so we do a table lookup to find the applicable max
410 * frame length.
411 */
412 struct gmac_max_framelen {
413 unsigned int max_l3_len;
414 u8 val;
415 };
416
417 static const struct gmac_max_framelen gmac_maxlens[] = {
418 {
419 .max_l3_len = 1518,
420 .val = CONFIG0_MAXLEN_1518,
421 },
422 {
423 .max_l3_len = 1522,
424 .val = CONFIG0_MAXLEN_1522,
425 },
426 {
427 .max_l3_len = 1536,
428 .val = CONFIG0_MAXLEN_1536,
429 },
430 {
431 .max_l3_len = 1548,
432 .val = CONFIG0_MAXLEN_1548,
433 },
434 {
435 .max_l3_len = 9212,
436 .val = CONFIG0_MAXLEN_9k,
437 },
438 {
439 .max_l3_len = 10236,
440 .val = CONFIG0_MAXLEN_10k,
441 },
442 };
443
gmac_pick_rx_max_len(unsigned int max_l3_len)444 static int gmac_pick_rx_max_len(unsigned int max_l3_len)
445 {
446 const struct gmac_max_framelen *maxlen;
447 int maxtot;
448 int i;
449
450 maxtot = max_l3_len + ETH_HLEN + VLAN_HLEN;
451
452 for (i = 0; i < ARRAY_SIZE(gmac_maxlens); i++) {
453 maxlen = &gmac_maxlens[i];
454 if (maxtot <= maxlen->max_l3_len)
455 return maxlen->val;
456 }
457
458 return -1;
459 }
460
gmac_init(struct net_device * netdev)461 static int gmac_init(struct net_device *netdev)
462 {
463 struct gemini_ethernet_port *port = netdev_priv(netdev);
464 union gmac_config0 config0 = { .bits = {
465 .dis_tx = 1,
466 .dis_rx = 1,
467 .ipv4_rx_chksum = 1,
468 .ipv6_rx_chksum = 1,
469 .rx_err_detect = 1,
470 .rgmm_edge = 1,
471 .port0_chk_hwq = 1,
472 .port1_chk_hwq = 1,
473 .port0_chk_toeq = 1,
474 .port1_chk_toeq = 1,
475 .port0_chk_classq = 1,
476 .port1_chk_classq = 1,
477 } };
478 union gmac_ahb_weight ahb_weight = { .bits = {
479 .rx_weight = 1,
480 .tx_weight = 1,
481 .hash_weight = 1,
482 .pre_req = 0x1f,
483 .tq_dv_threshold = 0,
484 } };
485 union gmac_tx_wcr0 hw_weigh = { .bits = {
486 .hw_tq3 = 1,
487 .hw_tq2 = 1,
488 .hw_tq1 = 1,
489 .hw_tq0 = 1,
490 } };
491 union gmac_tx_wcr1 sw_weigh = { .bits = {
492 .sw_tq5 = 1,
493 .sw_tq4 = 1,
494 .sw_tq3 = 1,
495 .sw_tq2 = 1,
496 .sw_tq1 = 1,
497 .sw_tq0 = 1,
498 } };
499 union gmac_config1 config1 = { .bits = {
500 .set_threshold = 16,
501 .rel_threshold = 24,
502 } };
503 union gmac_config2 config2 = { .bits = {
504 .set_threshold = 16,
505 .rel_threshold = 32,
506 } };
507 union gmac_config3 config3 = { .bits = {
508 .set_threshold = 0,
509 .rel_threshold = 0,
510 } };
511 union gmac_config0 tmp;
512
513 config0.bits.max_len = gmac_pick_rx_max_len(netdev->mtu);
514 tmp.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
515 config0.bits.reserved = tmp.bits.reserved;
516 writel(config0.bits32, port->gmac_base + GMAC_CONFIG0);
517 writel(config1.bits32, port->gmac_base + GMAC_CONFIG1);
518 writel(config2.bits32, port->gmac_base + GMAC_CONFIG2);
519 writel(config3.bits32, port->gmac_base + GMAC_CONFIG3);
520
521 readl(port->dma_base + GMAC_AHB_WEIGHT_REG);
522 writel(ahb_weight.bits32, port->dma_base + GMAC_AHB_WEIGHT_REG);
523
524 writel(hw_weigh.bits32,
525 port->dma_base + GMAC_TX_WEIGHTING_CTRL_0_REG);
526 writel(sw_weigh.bits32,
527 port->dma_base + GMAC_TX_WEIGHTING_CTRL_1_REG);
528
529 port->rxq_order = DEFAULT_GMAC_RXQ_ORDER;
530 port->txq_order = DEFAULT_GMAC_TXQ_ORDER;
531 port->rx_coalesce_nsecs = DEFAULT_RX_COALESCE_NSECS;
532
533 /* Mark every quarter of the queue a packet for interrupt
534 * in order to be able to wake up the queue if it was stopped
535 */
536 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
537
538 return 0;
539 }
540
gmac_setup_txqs(struct net_device * netdev)541 static int gmac_setup_txqs(struct net_device *netdev)
542 {
543 struct gemini_ethernet_port *port = netdev_priv(netdev);
544 unsigned int n_txq = netdev->num_tx_queues;
545 struct gemini_ethernet *geth = port->geth;
546 size_t entries = 1 << port->txq_order;
547 struct gmac_txq *txq = port->txq;
548 struct gmac_txdesc *desc_ring;
549 size_t len = n_txq * entries;
550 struct sk_buff **skb_tab;
551 void __iomem *rwptr_reg;
552 unsigned int r;
553 int i;
554
555 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
556
557 skb_tab = kcalloc(len, sizeof(*skb_tab), GFP_KERNEL);
558 if (!skb_tab)
559 return -ENOMEM;
560
561 desc_ring = dma_alloc_coherent(geth->dev, len * sizeof(*desc_ring),
562 &port->txq_dma_base, GFP_KERNEL);
563
564 if (!desc_ring) {
565 kfree(skb_tab);
566 return -ENOMEM;
567 }
568
569 if (port->txq_dma_base & ~DMA_Q_BASE_MASK) {
570 dev_warn(geth->dev, "TX queue base is not aligned\n");
571 dma_free_coherent(geth->dev, len * sizeof(*desc_ring),
572 desc_ring, port->txq_dma_base);
573 kfree(skb_tab);
574 return -ENOMEM;
575 }
576
577 writel(port->txq_dma_base | port->txq_order,
578 port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
579
580 for (i = 0; i < n_txq; i++) {
581 txq->ring = desc_ring;
582 txq->skb = skb_tab;
583 txq->noirq_packets = 0;
584
585 r = readw(rwptr_reg);
586 rwptr_reg += 2;
587 writew(r, rwptr_reg);
588 rwptr_reg += 2;
589 txq->cptr = r;
590
591 txq++;
592 desc_ring += entries;
593 skb_tab += entries;
594 }
595
596 return 0;
597 }
598
gmac_clean_txq(struct net_device * netdev,struct gmac_txq * txq,unsigned int r)599 static void gmac_clean_txq(struct net_device *netdev, struct gmac_txq *txq,
600 unsigned int r)
601 {
602 struct gemini_ethernet_port *port = netdev_priv(netdev);
603 unsigned int m = (1 << port->txq_order) - 1;
604 struct gemini_ethernet *geth = port->geth;
605 unsigned int c = txq->cptr;
606 union gmac_txdesc_0 word0;
607 union gmac_txdesc_1 word1;
608 unsigned int hwchksum = 0;
609 unsigned long bytes = 0;
610 struct gmac_txdesc *txd;
611 unsigned short nfrags;
612 unsigned int errs = 0;
613 unsigned int pkts = 0;
614 unsigned int word3;
615 dma_addr_t mapping;
616
617 if (c == r)
618 return;
619
620 while (c != r) {
621 txd = txq->ring + c;
622 word0 = txd->word0;
623 word1 = txd->word1;
624 mapping = txd->word2.buf_adr;
625 word3 = txd->word3.bits32;
626
627 dma_unmap_single(geth->dev, mapping,
628 word0.bits.buffer_size, DMA_TO_DEVICE);
629
630 if (word3 & EOF_BIT)
631 dev_kfree_skb(txq->skb[c]);
632
633 c++;
634 c &= m;
635
636 if (!(word3 & SOF_BIT))
637 continue;
638
639 if (!word0.bits.status_tx_ok) {
640 errs++;
641 continue;
642 }
643
644 pkts++;
645 bytes += txd->word1.bits.byte_count;
646
647 if (word1.bits32 & TSS_CHECKUM_ENABLE)
648 hwchksum++;
649
650 nfrags = word0.bits.desc_count - 1;
651 if (nfrags) {
652 if (nfrags >= TX_MAX_FRAGS)
653 nfrags = TX_MAX_FRAGS - 1;
654
655 u64_stats_update_begin(&port->tx_stats_syncp);
656 port->tx_frag_stats[nfrags]++;
657 u64_stats_update_end(&port->tx_stats_syncp);
658 }
659 }
660
661 u64_stats_update_begin(&port->ir_stats_syncp);
662 port->stats.tx_errors += errs;
663 port->stats.tx_packets += pkts;
664 port->stats.tx_bytes += bytes;
665 port->tx_hw_csummed += hwchksum;
666 u64_stats_update_end(&port->ir_stats_syncp);
667
668 txq->cptr = c;
669 }
670
gmac_cleanup_txqs(struct net_device * netdev)671 static void gmac_cleanup_txqs(struct net_device *netdev)
672 {
673 struct gemini_ethernet_port *port = netdev_priv(netdev);
674 unsigned int n_txq = netdev->num_tx_queues;
675 struct gemini_ethernet *geth = port->geth;
676 void __iomem *rwptr_reg;
677 unsigned int r, i;
678
679 rwptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
680
681 for (i = 0; i < n_txq; i++) {
682 r = readw(rwptr_reg);
683 rwptr_reg += 2;
684 writew(r, rwptr_reg);
685 rwptr_reg += 2;
686
687 gmac_clean_txq(netdev, port->txq + i, r);
688 }
689 writel(0, port->dma_base + GMAC_SW_TX_QUEUE_BASE_REG);
690
691 kfree(port->txq->skb);
692 dma_free_coherent(geth->dev,
693 n_txq * sizeof(*port->txq->ring) << port->txq_order,
694 port->txq->ring, port->txq_dma_base);
695 }
696
gmac_setup_rxq(struct net_device * netdev)697 static int gmac_setup_rxq(struct net_device *netdev)
698 {
699 struct gemini_ethernet_port *port = netdev_priv(netdev);
700 struct gemini_ethernet *geth = port->geth;
701 struct nontoe_qhdr __iomem *qhdr;
702
703 qhdr = geth->base + TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
704 port->rxq_rwptr = &qhdr->word1;
705
706 /* Remap a slew of memory to use for the RX queue */
707 port->rxq_ring = dma_alloc_coherent(geth->dev,
708 sizeof(*port->rxq_ring) << port->rxq_order,
709 &port->rxq_dma_base, GFP_KERNEL);
710 if (!port->rxq_ring)
711 return -ENOMEM;
712 if (port->rxq_dma_base & ~NONTOE_QHDR0_BASE_MASK) {
713 dev_warn(geth->dev, "RX queue base is not aligned\n");
714 return -ENOMEM;
715 }
716
717 writel(port->rxq_dma_base | port->rxq_order, &qhdr->word0);
718 writel(0, port->rxq_rwptr);
719 return 0;
720 }
721
722 static struct gmac_queue_page *
gmac_get_queue_page(struct gemini_ethernet * geth,struct gemini_ethernet_port * port,dma_addr_t addr)723 gmac_get_queue_page(struct gemini_ethernet *geth,
724 struct gemini_ethernet_port *port,
725 dma_addr_t addr)
726 {
727 struct gmac_queue_page *gpage;
728 dma_addr_t mapping;
729 int i;
730
731 /* Only look for even pages */
732 mapping = addr & PAGE_MASK;
733
734 if (!geth->freeq_pages) {
735 dev_err(geth->dev, "try to get page with no page list\n");
736 return NULL;
737 }
738
739 /* Look up a ring buffer page from virtual mapping */
740 for (i = 0; i < geth->num_freeq_pages; i++) {
741 gpage = &geth->freeq_pages[i];
742 if (gpage->mapping == mapping)
743 return gpage;
744 }
745
746 return NULL;
747 }
748
gmac_cleanup_rxq(struct net_device * netdev)749 static void gmac_cleanup_rxq(struct net_device *netdev)
750 {
751 struct gemini_ethernet_port *port = netdev_priv(netdev);
752 struct gemini_ethernet *geth = port->geth;
753 struct gmac_rxdesc *rxd = port->rxq_ring;
754 static struct gmac_queue_page *gpage;
755 struct nontoe_qhdr __iomem *qhdr;
756 void __iomem *dma_reg;
757 void __iomem *ptr_reg;
758 dma_addr_t mapping;
759 union dma_rwptr rw;
760 unsigned int r, w;
761
762 qhdr = geth->base +
763 TOE_DEFAULT_Q_HDR_BASE(netdev->dev_id);
764 dma_reg = &qhdr->word0;
765 ptr_reg = &qhdr->word1;
766
767 rw.bits32 = readl(ptr_reg);
768 r = rw.bits.rptr;
769 w = rw.bits.wptr;
770 writew(r, ptr_reg + 2);
771
772 writel(0, dma_reg);
773
774 /* Loop from read pointer to write pointer of the RX queue
775 * and free up all pages by the queue.
776 */
777 while (r != w) {
778 mapping = rxd[r].word2.buf_adr;
779 r++;
780 r &= ((1 << port->rxq_order) - 1);
781
782 if (!mapping)
783 continue;
784
785 /* Freeq pointers are one page off */
786 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
787 if (!gpage) {
788 dev_err(geth->dev, "could not find page\n");
789 continue;
790 }
791 /* Release the RX queue reference to the page */
792 put_page(gpage->page);
793 }
794
795 dma_free_coherent(geth->dev, sizeof(*port->rxq_ring) << port->rxq_order,
796 port->rxq_ring, port->rxq_dma_base);
797 }
798
geth_freeq_alloc_map_page(struct gemini_ethernet * geth,int pn)799 static struct page *geth_freeq_alloc_map_page(struct gemini_ethernet *geth,
800 int pn)
801 {
802 struct gmac_rxdesc *freeq_entry;
803 struct gmac_queue_page *gpage;
804 unsigned int fpp_order;
805 unsigned int frag_len;
806 dma_addr_t mapping;
807 struct page *page;
808 int i;
809
810 /* First allocate and DMA map a single page */
811 page = alloc_page(GFP_ATOMIC);
812 if (!page)
813 return NULL;
814
815 mapping = dma_map_single(geth->dev, page_address(page),
816 PAGE_SIZE, DMA_FROM_DEVICE);
817 if (dma_mapping_error(geth->dev, mapping)) {
818 put_page(page);
819 return NULL;
820 }
821
822 /* The assign the page mapping (physical address) to the buffer address
823 * in the hardware queue. PAGE_SHIFT on ARM is 12 (1 page is 4096 bytes,
824 * 4k), and the default RX frag order is 11 (fragments are up 20 2048
825 * bytes, 2k) so fpp_order (fragments per page order) is default 1. Thus
826 * each page normally needs two entries in the queue.
827 */
828 frag_len = 1 << geth->freeq_frag_order; /* Usually 2048 */
829 fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
830 freeq_entry = geth->freeq_ring + (pn << fpp_order);
831 dev_dbg(geth->dev, "allocate page %d fragment length %d fragments per page %d, freeq entry %p\n",
832 pn, frag_len, (1 << fpp_order), freeq_entry);
833 for (i = (1 << fpp_order); i > 0; i--) {
834 freeq_entry->word2.buf_adr = mapping;
835 freeq_entry++;
836 mapping += frag_len;
837 }
838
839 /* If the freeq entry already has a page mapped, then unmap it. */
840 gpage = &geth->freeq_pages[pn];
841 if (gpage->page) {
842 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
843 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
844 /* This should be the last reference to the page so it gets
845 * released
846 */
847 put_page(gpage->page);
848 }
849
850 /* Then put our new mapping into the page table */
851 dev_dbg(geth->dev, "page %d, DMA addr: %08x, page %p\n",
852 pn, (unsigned int)mapping, page);
853 gpage->mapping = mapping;
854 gpage->page = page;
855
856 return page;
857 }
858
859 /**
860 * geth_fill_freeq() - Fill the freeq with empty fragments to use
861 * @geth: the ethernet adapter
862 * @refill: whether to reset the queue by filling in all freeq entries or
863 * just refill it, usually the interrupt to refill the queue happens when
864 * the queue is half empty.
865 */
geth_fill_freeq(struct gemini_ethernet * geth,bool refill)866 static unsigned int geth_fill_freeq(struct gemini_ethernet *geth, bool refill)
867 {
868 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
869 unsigned int count = 0;
870 unsigned int pn, epn;
871 unsigned long flags;
872 union dma_rwptr rw;
873 unsigned int m_pn;
874
875 /* Mask for page */
876 m_pn = (1 << (geth->freeq_order - fpp_order)) - 1;
877
878 spin_lock_irqsave(&geth->freeq_lock, flags);
879
880 rw.bits32 = readl(geth->base + GLOBAL_SWFQ_RWPTR_REG);
881 pn = (refill ? rw.bits.wptr : rw.bits.rptr) >> fpp_order;
882 epn = (rw.bits.rptr >> fpp_order) - 1;
883 epn &= m_pn;
884
885 /* Loop over the freeq ring buffer entries */
886 while (pn != epn) {
887 struct gmac_queue_page *gpage;
888 struct page *page;
889
890 gpage = &geth->freeq_pages[pn];
891 page = gpage->page;
892
893 dev_dbg(geth->dev, "fill entry %d page ref count %d add %d refs\n",
894 pn, page_ref_count(page), 1 << fpp_order);
895
896 if (page_ref_count(page) > 1) {
897 unsigned int fl = (pn - epn) & m_pn;
898
899 if (fl > 64 >> fpp_order)
900 break;
901
902 page = geth_freeq_alloc_map_page(geth, pn);
903 if (!page)
904 break;
905 }
906
907 /* Add one reference per fragment in the page */
908 page_ref_add(page, 1 << fpp_order);
909 count += 1 << fpp_order;
910 pn++;
911 pn &= m_pn;
912 }
913
914 writew(pn << fpp_order, geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
915
916 spin_unlock_irqrestore(&geth->freeq_lock, flags);
917
918 return count;
919 }
920
geth_setup_freeq(struct gemini_ethernet * geth)921 static int geth_setup_freeq(struct gemini_ethernet *geth)
922 {
923 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
924 unsigned int frag_len = 1 << geth->freeq_frag_order;
925 unsigned int len = 1 << geth->freeq_order;
926 unsigned int pages = len >> fpp_order;
927 union queue_threshold qt;
928 union dma_skb_size skbsz;
929 unsigned int filled;
930 unsigned int pn;
931
932 geth->freeq_ring = dma_alloc_coherent(geth->dev,
933 sizeof(*geth->freeq_ring) << geth->freeq_order,
934 &geth->freeq_dma_base, GFP_KERNEL);
935 if (!geth->freeq_ring)
936 return -ENOMEM;
937 if (geth->freeq_dma_base & ~DMA_Q_BASE_MASK) {
938 dev_warn(geth->dev, "queue ring base is not aligned\n");
939 goto err_freeq;
940 }
941
942 /* Allocate a mapping to page look-up index */
943 geth->freeq_pages = kcalloc(pages, sizeof(*geth->freeq_pages),
944 GFP_KERNEL);
945 if (!geth->freeq_pages)
946 goto err_freeq;
947 geth->num_freeq_pages = pages;
948
949 dev_info(geth->dev, "allocate %d pages for queue\n", pages);
950 for (pn = 0; pn < pages; pn++)
951 if (!geth_freeq_alloc_map_page(geth, pn))
952 goto err_freeq_alloc;
953
954 filled = geth_fill_freeq(geth, false);
955 if (!filled)
956 goto err_freeq_alloc;
957
958 qt.bits32 = readl(geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
959 qt.bits.swfq_empty = 32;
960 writel(qt.bits32, geth->base + GLOBAL_QUEUE_THRESHOLD_REG);
961
962 skbsz.bits.sw_skb_size = 1 << geth->freeq_frag_order;
963 writel(skbsz.bits32, geth->base + GLOBAL_DMA_SKB_SIZE_REG);
964 writel(geth->freeq_dma_base | geth->freeq_order,
965 geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
966
967 return 0;
968
969 err_freeq_alloc:
970 while (pn > 0) {
971 struct gmac_queue_page *gpage;
972 dma_addr_t mapping;
973
974 --pn;
975 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
976 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
977 gpage = &geth->freeq_pages[pn];
978 put_page(gpage->page);
979 }
980
981 kfree(geth->freeq_pages);
982 err_freeq:
983 dma_free_coherent(geth->dev,
984 sizeof(*geth->freeq_ring) << geth->freeq_order,
985 geth->freeq_ring, geth->freeq_dma_base);
986 geth->freeq_ring = NULL;
987 return -ENOMEM;
988 }
989
990 /**
991 * geth_cleanup_freeq() - cleanup the DMA mappings and free the queue
992 * @geth: the Gemini global ethernet state
993 */
geth_cleanup_freeq(struct gemini_ethernet * geth)994 static void geth_cleanup_freeq(struct gemini_ethernet *geth)
995 {
996 unsigned int fpp_order = PAGE_SHIFT - geth->freeq_frag_order;
997 unsigned int frag_len = 1 << geth->freeq_frag_order;
998 unsigned int len = 1 << geth->freeq_order;
999 unsigned int pages = len >> fpp_order;
1000 unsigned int pn;
1001
1002 writew(readw(geth->base + GLOBAL_SWFQ_RWPTR_REG),
1003 geth->base + GLOBAL_SWFQ_RWPTR_REG + 2);
1004 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
1005
1006 for (pn = 0; pn < pages; pn++) {
1007 struct gmac_queue_page *gpage;
1008 dma_addr_t mapping;
1009
1010 mapping = geth->freeq_ring[pn << fpp_order].word2.buf_adr;
1011 dma_unmap_single(geth->dev, mapping, frag_len, DMA_FROM_DEVICE);
1012
1013 gpage = &geth->freeq_pages[pn];
1014 while (page_ref_count(gpage->page) > 0)
1015 put_page(gpage->page);
1016 }
1017
1018 kfree(geth->freeq_pages);
1019
1020 dma_free_coherent(geth->dev,
1021 sizeof(*geth->freeq_ring) << geth->freeq_order,
1022 geth->freeq_ring, geth->freeq_dma_base);
1023 }
1024
1025 /**
1026 * geth_resize_freeq() - resize the software queue depth
1027 * @port: the port requesting the change
1028 *
1029 * This gets called at least once during probe() so the device queue gets
1030 * "resized" from the hardware defaults. Since both ports/net devices share
1031 * the same hardware queue, some synchronization between the ports is
1032 * needed.
1033 */
geth_resize_freeq(struct gemini_ethernet_port * port)1034 static int geth_resize_freeq(struct gemini_ethernet_port *port)
1035 {
1036 struct gemini_ethernet *geth = port->geth;
1037 struct net_device *netdev = port->netdev;
1038 struct gemini_ethernet_port *other_port;
1039 struct net_device *other_netdev;
1040 unsigned int new_size = 0;
1041 unsigned int new_order;
1042 unsigned long flags;
1043 u32 en;
1044 int ret;
1045
1046 if (netdev->dev_id == 0)
1047 other_netdev = geth->port1->netdev;
1048 else
1049 other_netdev = geth->port0->netdev;
1050
1051 if (other_netdev && netif_running(other_netdev))
1052 return -EBUSY;
1053
1054 new_size = 1 << (port->rxq_order + 1);
1055 netdev_dbg(netdev, "port %d size: %d order %d\n",
1056 netdev->dev_id,
1057 new_size,
1058 port->rxq_order);
1059 if (other_netdev) {
1060 other_port = netdev_priv(other_netdev);
1061 new_size += 1 << (other_port->rxq_order + 1);
1062 netdev_dbg(other_netdev, "port %d size: %d order %d\n",
1063 other_netdev->dev_id,
1064 (1 << (other_port->rxq_order + 1)),
1065 other_port->rxq_order);
1066 }
1067
1068 new_order = min(15, ilog2(new_size - 1) + 1);
1069 dev_dbg(geth->dev, "set shared queue to size %d order %d\n",
1070 new_size, new_order);
1071 if (geth->freeq_order == new_order)
1072 return 0;
1073
1074 spin_lock_irqsave(&geth->irq_lock, flags);
1075
1076 /* Disable the software queue IRQs */
1077 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1078 en &= ~SWFQ_EMPTY_INT_BIT;
1079 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1080 spin_unlock_irqrestore(&geth->irq_lock, flags);
1081
1082 /* Drop the old queue */
1083 if (geth->freeq_ring)
1084 geth_cleanup_freeq(geth);
1085
1086 /* Allocate a new queue with the desired order */
1087 geth->freeq_order = new_order;
1088 ret = geth_setup_freeq(geth);
1089
1090 /* Restart the interrupts - NOTE if this is the first resize
1091 * after probe(), this is where the interrupts get turned on
1092 * in the first place.
1093 */
1094 spin_lock_irqsave(&geth->irq_lock, flags);
1095 en |= SWFQ_EMPTY_INT_BIT;
1096 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1097 spin_unlock_irqrestore(&geth->irq_lock, flags);
1098
1099 return ret;
1100 }
1101
gmac_tx_irq_enable(struct net_device * netdev,unsigned int txq,int en)1102 static void gmac_tx_irq_enable(struct net_device *netdev,
1103 unsigned int txq, int en)
1104 {
1105 struct gemini_ethernet_port *port = netdev_priv(netdev);
1106 struct gemini_ethernet *geth = port->geth;
1107 unsigned long flags;
1108 u32 val, mask;
1109
1110 netdev_dbg(netdev, "%s device %d\n", __func__, netdev->dev_id);
1111
1112 spin_lock_irqsave(&geth->irq_lock, flags);
1113
1114 mask = GMAC0_IRQ0_TXQ0_INTS << (6 * netdev->dev_id + txq);
1115
1116 if (en)
1117 writel(mask, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1118
1119 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1120 val = en ? val | mask : val & ~mask;
1121 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1122
1123 spin_unlock_irqrestore(&geth->irq_lock, flags);
1124 }
1125
gmac_tx_irq(struct net_device * netdev,unsigned int txq_num)1126 static void gmac_tx_irq(struct net_device *netdev, unsigned int txq_num)
1127 {
1128 struct netdev_queue *ntxq = netdev_get_tx_queue(netdev, txq_num);
1129
1130 gmac_tx_irq_enable(netdev, txq_num, 0);
1131 netif_tx_wake_queue(ntxq);
1132 }
1133
gmac_map_tx_bufs(struct net_device * netdev,struct sk_buff * skb,struct gmac_txq * txq,unsigned short * desc)1134 static int gmac_map_tx_bufs(struct net_device *netdev, struct sk_buff *skb,
1135 struct gmac_txq *txq, unsigned short *desc)
1136 {
1137 struct gemini_ethernet_port *port = netdev_priv(netdev);
1138 struct skb_shared_info *skb_si = skb_shinfo(skb);
1139 unsigned short m = (1 << port->txq_order) - 1;
1140 short frag, last_frag = skb_si->nr_frags - 1;
1141 struct gemini_ethernet *geth = port->geth;
1142 unsigned int word1, word3, buflen;
1143 unsigned short w = *desc;
1144 struct gmac_txdesc *txd;
1145 skb_frag_t *skb_frag;
1146 dma_addr_t mapping;
1147 void *buffer;
1148 u16 mss;
1149 int ret;
1150
1151 word1 = skb->len;
1152 word3 = SOF_BIT;
1153
1154 mss = skb_shinfo(skb)->gso_size;
1155 if (mss) {
1156 /* This means we are dealing with TCP and skb->len is the
1157 * sum total of all the segments. The TSO will deal with
1158 * chopping this up for us.
1159 */
1160 /* The accelerator needs the full frame size here */
1161 mss += skb_tcp_all_headers(skb);
1162 netdev_dbg(netdev, "segment offloading mss = %04x len=%04x\n",
1163 mss, skb->len);
1164 word1 |= TSS_MTU_ENABLE_BIT;
1165 word3 |= mss;
1166 } else if (skb->len >= ETH_FRAME_LEN) {
1167 /* Hardware offloaded checksumming isn't working on frames
1168 * bigger than 1514 bytes. A hypothesis about this is that the
1169 * checksum buffer is only 1518 bytes, so when the frames get
1170 * bigger they get truncated, or the last few bytes get
1171 * overwritten by the FCS.
1172 *
1173 * Just use software checksumming and bypass on bigger frames.
1174 */
1175 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1176 ret = skb_checksum_help(skb);
1177 if (ret)
1178 return ret;
1179 }
1180 word1 |= TSS_BYPASS_BIT;
1181 }
1182
1183 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1184 int tcp = 0;
1185
1186 /* We do not switch off the checksumming on non TCP/UDP
1187 * frames: as is shown from tests, the checksumming engine
1188 * is smart enough to see that a frame is not actually TCP
1189 * or UDP and then just pass it through without any changes
1190 * to the frame.
1191 */
1192 if (skb->protocol == htons(ETH_P_IP)) {
1193 word1 |= TSS_IP_CHKSUM_BIT;
1194 tcp = ip_hdr(skb)->protocol == IPPROTO_TCP;
1195 } else { /* IPv6 */
1196 word1 |= TSS_IPV6_ENABLE_BIT;
1197 tcp = ipv6_hdr(skb)->nexthdr == IPPROTO_TCP;
1198 }
1199
1200 word1 |= tcp ? TSS_TCP_CHKSUM_BIT : TSS_UDP_CHKSUM_BIT;
1201 }
1202
1203 frag = -1;
1204 while (frag <= last_frag) {
1205 if (frag == -1) {
1206 buffer = skb->data;
1207 buflen = skb_headlen(skb);
1208 } else {
1209 skb_frag = skb_si->frags + frag;
1210 buffer = skb_frag_address(skb_frag);
1211 buflen = skb_frag_size(skb_frag);
1212 }
1213
1214 if (frag == last_frag) {
1215 word3 |= EOF_BIT;
1216 txq->skb[w] = skb;
1217 }
1218
1219 mapping = dma_map_single(geth->dev, buffer, buflen,
1220 DMA_TO_DEVICE);
1221 if (dma_mapping_error(geth->dev, mapping))
1222 goto map_error;
1223
1224 txd = txq->ring + w;
1225 txd->word0.bits32 = buflen;
1226 txd->word1.bits32 = word1;
1227 txd->word2.buf_adr = mapping;
1228 txd->word3.bits32 = word3;
1229
1230 word3 &= MTU_SIZE_BIT_MASK;
1231 w++;
1232 w &= m;
1233 frag++;
1234 }
1235
1236 *desc = w;
1237 return 0;
1238
1239 map_error:
1240 while (w != *desc) {
1241 w--;
1242 w &= m;
1243
1244 dma_unmap_page(geth->dev, txq->ring[w].word2.buf_adr,
1245 txq->ring[w].word0.bits.buffer_size,
1246 DMA_TO_DEVICE);
1247 }
1248 return -ENOMEM;
1249 }
1250
gmac_start_xmit(struct sk_buff * skb,struct net_device * netdev)1251 static netdev_tx_t gmac_start_xmit(struct sk_buff *skb,
1252 struct net_device *netdev)
1253 {
1254 struct gemini_ethernet_port *port = netdev_priv(netdev);
1255 unsigned short m = (1 << port->txq_order) - 1;
1256 struct netdev_queue *ntxq;
1257 unsigned short r, w, d;
1258 void __iomem *ptr_reg;
1259 struct gmac_txq *txq;
1260 int txq_num, nfrags;
1261 union dma_rwptr rw;
1262
1263 if (skb->len >= 0x10000)
1264 goto out_drop_free;
1265
1266 txq_num = skb_get_queue_mapping(skb);
1267 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE_PTR_REG(txq_num);
1268 txq = &port->txq[txq_num];
1269 ntxq = netdev_get_tx_queue(netdev, txq_num);
1270 nfrags = skb_shinfo(skb)->nr_frags;
1271
1272 rw.bits32 = readl(ptr_reg);
1273 r = rw.bits.rptr;
1274 w = rw.bits.wptr;
1275
1276 d = txq->cptr - w - 1;
1277 d &= m;
1278
1279 if (d < nfrags + 2) {
1280 gmac_clean_txq(netdev, txq, r);
1281 d = txq->cptr - w - 1;
1282 d &= m;
1283
1284 if (d < nfrags + 2) {
1285 netif_tx_stop_queue(ntxq);
1286
1287 d = txq->cptr + nfrags + 16;
1288 d &= m;
1289 txq->ring[d].word3.bits.eofie = 1;
1290 gmac_tx_irq_enable(netdev, txq_num, 1);
1291
1292 u64_stats_update_begin(&port->tx_stats_syncp);
1293 netdev->stats.tx_fifo_errors++;
1294 u64_stats_update_end(&port->tx_stats_syncp);
1295 return NETDEV_TX_BUSY;
1296 }
1297 }
1298
1299 if (gmac_map_tx_bufs(netdev, skb, txq, &w)) {
1300 if (skb_linearize(skb))
1301 goto out_drop;
1302
1303 u64_stats_update_begin(&port->tx_stats_syncp);
1304 port->tx_frags_linearized++;
1305 u64_stats_update_end(&port->tx_stats_syncp);
1306
1307 if (gmac_map_tx_bufs(netdev, skb, txq, &w))
1308 goto out_drop_free;
1309 }
1310
1311 writew(w, ptr_reg + 2);
1312
1313 gmac_clean_txq(netdev, txq, r);
1314 return NETDEV_TX_OK;
1315
1316 out_drop_free:
1317 dev_kfree_skb(skb);
1318 out_drop:
1319 u64_stats_update_begin(&port->tx_stats_syncp);
1320 port->stats.tx_dropped++;
1321 u64_stats_update_end(&port->tx_stats_syncp);
1322 return NETDEV_TX_OK;
1323 }
1324
gmac_tx_timeout(struct net_device * netdev,unsigned int txqueue)1325 static void gmac_tx_timeout(struct net_device *netdev, unsigned int txqueue)
1326 {
1327 netdev_err(netdev, "Tx timeout\n");
1328 gmac_dump_dma_state(netdev);
1329 }
1330
gmac_enable_irq(struct net_device * netdev,int enable)1331 static void gmac_enable_irq(struct net_device *netdev, int enable)
1332 {
1333 struct gemini_ethernet_port *port = netdev_priv(netdev);
1334 struct gemini_ethernet *geth = port->geth;
1335 unsigned long flags;
1336 u32 val, mask;
1337
1338 netdev_dbg(netdev, "%s device %d %s\n", __func__,
1339 netdev->dev_id, enable ? "enable" : "disable");
1340 spin_lock_irqsave(&geth->irq_lock, flags);
1341
1342 mask = GMAC0_IRQ0_2 << (netdev->dev_id * 2);
1343 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1344 val = enable ? (val | mask) : (val & ~mask);
1345 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1346
1347 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1348 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1349 val = enable ? (val | mask) : (val & ~mask);
1350 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1351
1352 mask = GMAC0_IRQ4_8 << (netdev->dev_id * 8);
1353 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1354 val = enable ? (val | mask) : (val & ~mask);
1355 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1356
1357 spin_unlock_irqrestore(&geth->irq_lock, flags);
1358 }
1359
gmac_enable_rx_irq(struct net_device * netdev,int enable)1360 static void gmac_enable_rx_irq(struct net_device *netdev, int enable)
1361 {
1362 struct gemini_ethernet_port *port = netdev_priv(netdev);
1363 struct gemini_ethernet *geth = port->geth;
1364 unsigned long flags;
1365 u32 val, mask;
1366
1367 netdev_dbg(netdev, "%s device %d %s\n", __func__, netdev->dev_id,
1368 enable ? "enable" : "disable");
1369 spin_lock_irqsave(&geth->irq_lock, flags);
1370 mask = DEFAULT_Q0_INT_BIT << netdev->dev_id;
1371
1372 val = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1373 val = enable ? (val | mask) : (val & ~mask);
1374 writel(val, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1375
1376 spin_unlock_irqrestore(&geth->irq_lock, flags);
1377 }
1378
gmac_skb_if_good_frame(struct gemini_ethernet_port * port,union gmac_rxdesc_0 word0,unsigned int frame_len)1379 static struct sk_buff *gmac_skb_if_good_frame(struct gemini_ethernet_port *port,
1380 union gmac_rxdesc_0 word0,
1381 unsigned int frame_len)
1382 {
1383 unsigned int rx_csum = word0.bits.chksum_status;
1384 unsigned int rx_status = word0.bits.status;
1385 struct sk_buff *skb = NULL;
1386
1387 port->rx_stats[rx_status]++;
1388 port->rx_csum_stats[rx_csum]++;
1389
1390 if (word0.bits.derr || word0.bits.perr ||
1391 rx_status || frame_len < ETH_ZLEN ||
1392 rx_csum >= RX_CHKSUM_IP_ERR_UNKNOWN) {
1393 port->stats.rx_errors++;
1394
1395 if (frame_len < ETH_ZLEN || RX_ERROR_LENGTH(rx_status))
1396 port->stats.rx_length_errors++;
1397 if (RX_ERROR_OVER(rx_status))
1398 port->stats.rx_over_errors++;
1399 if (RX_ERROR_CRC(rx_status))
1400 port->stats.rx_crc_errors++;
1401 if (RX_ERROR_FRAME(rx_status))
1402 port->stats.rx_frame_errors++;
1403 return NULL;
1404 }
1405
1406 skb = napi_get_frags(&port->napi);
1407 if (!skb)
1408 goto update_exit;
1409
1410 if (rx_csum == RX_CHKSUM_IP_UDP_TCP_OK)
1411 skb->ip_summed = CHECKSUM_UNNECESSARY;
1412
1413 update_exit:
1414 port->stats.rx_bytes += frame_len;
1415 port->stats.rx_packets++;
1416 return skb;
1417 }
1418
gmac_rx(struct net_device * netdev,unsigned int budget)1419 static unsigned int gmac_rx(struct net_device *netdev, unsigned int budget)
1420 {
1421 struct gemini_ethernet_port *port = netdev_priv(netdev);
1422 unsigned short m = (1 << port->rxq_order) - 1;
1423 struct gemini_ethernet *geth = port->geth;
1424 void __iomem *ptr_reg = port->rxq_rwptr;
1425 unsigned int frame_len, frag_len;
1426 struct gmac_rxdesc *rx = NULL;
1427 struct gmac_queue_page *gpage;
1428 static struct sk_buff *skb;
1429 union gmac_rxdesc_0 word0;
1430 union gmac_rxdesc_1 word1;
1431 union gmac_rxdesc_3 word3;
1432 struct page *page = NULL;
1433 unsigned int page_offs;
1434 unsigned long flags;
1435 unsigned short r, w;
1436 union dma_rwptr rw;
1437 dma_addr_t mapping;
1438 int frag_nr = 0;
1439
1440 spin_lock_irqsave(&geth->irq_lock, flags);
1441 rw.bits32 = readl(ptr_reg);
1442 /* Reset interrupt as all packages until here are taken into account */
1443 writel(DEFAULT_Q0_INT_BIT << netdev->dev_id,
1444 geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1445 spin_unlock_irqrestore(&geth->irq_lock, flags);
1446
1447 r = rw.bits.rptr;
1448 w = rw.bits.wptr;
1449
1450 while (budget && w != r) {
1451 rx = port->rxq_ring + r;
1452 word0 = rx->word0;
1453 word1 = rx->word1;
1454 mapping = rx->word2.buf_adr;
1455 word3 = rx->word3;
1456
1457 r++;
1458 r &= m;
1459
1460 frag_len = word0.bits.buffer_size;
1461 frame_len = word1.bits.byte_count;
1462 page_offs = mapping & ~PAGE_MASK;
1463
1464 if (!mapping) {
1465 netdev_err(netdev,
1466 "rxq[%u]: HW BUG: zero DMA desc\n", r);
1467 goto err_drop;
1468 }
1469
1470 /* Freeq pointers are one page off */
1471 gpage = gmac_get_queue_page(geth, port, mapping + PAGE_SIZE);
1472 if (!gpage) {
1473 dev_err(geth->dev, "could not find mapping\n");
1474 continue;
1475 }
1476 page = gpage->page;
1477
1478 if (word3.bits32 & SOF_BIT) {
1479 if (skb) {
1480 napi_free_frags(&port->napi);
1481 port->stats.rx_dropped++;
1482 }
1483
1484 skb = gmac_skb_if_good_frame(port, word0, frame_len);
1485 if (!skb)
1486 goto err_drop;
1487
1488 page_offs += NET_IP_ALIGN;
1489 frag_len -= NET_IP_ALIGN;
1490 frag_nr = 0;
1491
1492 } else if (!skb) {
1493 put_page(page);
1494 continue;
1495 }
1496
1497 if (word3.bits32 & EOF_BIT)
1498 frag_len = frame_len - skb->len;
1499
1500 /* append page frag to skb */
1501 if (frag_nr == MAX_SKB_FRAGS)
1502 goto err_drop;
1503
1504 if (frag_len == 0)
1505 netdev_err(netdev, "Received fragment with len = 0\n");
1506
1507 skb_fill_page_desc(skb, frag_nr, page, page_offs, frag_len);
1508 skb->len += frag_len;
1509 skb->data_len += frag_len;
1510 skb->truesize += frag_len;
1511 frag_nr++;
1512
1513 if (word3.bits32 & EOF_BIT) {
1514 napi_gro_frags(&port->napi);
1515 skb = NULL;
1516 --budget;
1517 }
1518 continue;
1519
1520 err_drop:
1521 if (skb) {
1522 napi_free_frags(&port->napi);
1523 skb = NULL;
1524 }
1525
1526 if (mapping)
1527 put_page(page);
1528
1529 port->stats.rx_dropped++;
1530 }
1531
1532 writew(r, ptr_reg);
1533 return budget;
1534 }
1535
gmac_napi_poll(struct napi_struct * napi,int budget)1536 static int gmac_napi_poll(struct napi_struct *napi, int budget)
1537 {
1538 struct gemini_ethernet_port *port = netdev_priv(napi->dev);
1539 struct gemini_ethernet *geth = port->geth;
1540 unsigned int freeq_threshold;
1541 unsigned int received;
1542
1543 freeq_threshold = 1 << (geth->freeq_order - 1);
1544 u64_stats_update_begin(&port->rx_stats_syncp);
1545
1546 received = gmac_rx(napi->dev, budget);
1547 if (received < budget) {
1548 napi_gro_flush(napi, false);
1549 napi_complete_done(napi, received);
1550 gmac_enable_rx_irq(napi->dev, 1);
1551 ++port->rx_napi_exits;
1552 }
1553
1554 port->freeq_refill += (budget - received);
1555 if (port->freeq_refill > freeq_threshold) {
1556 port->freeq_refill -= freeq_threshold;
1557 geth_fill_freeq(geth, true);
1558 }
1559
1560 u64_stats_update_end(&port->rx_stats_syncp);
1561 return received;
1562 }
1563
gmac_dump_dma_state(struct net_device * netdev)1564 static void gmac_dump_dma_state(struct net_device *netdev)
1565 {
1566 struct gemini_ethernet_port *port = netdev_priv(netdev);
1567 struct gemini_ethernet *geth = port->geth;
1568 void __iomem *ptr_reg;
1569 u32 reg[5];
1570
1571 /* Interrupt status */
1572 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
1573 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
1574 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
1575 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
1576 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1577 netdev_err(netdev, "IRQ status: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1578 reg[0], reg[1], reg[2], reg[3], reg[4]);
1579
1580 /* Interrupt enable */
1581 reg[0] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
1582 reg[1] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
1583 reg[2] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
1584 reg[3] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
1585 reg[4] = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
1586 netdev_err(netdev, "IRQ enable: 0x%08x 0x%08x 0x%08x 0x%08x 0x%08x\n",
1587 reg[0], reg[1], reg[2], reg[3], reg[4]);
1588
1589 /* RX DMA status */
1590 reg[0] = readl(port->dma_base + GMAC_DMA_RX_FIRST_DESC_REG);
1591 reg[1] = readl(port->dma_base + GMAC_DMA_RX_CURR_DESC_REG);
1592 reg[2] = GET_RPTR(port->rxq_rwptr);
1593 reg[3] = GET_WPTR(port->rxq_rwptr);
1594 netdev_err(netdev, "RX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1595 reg[0], reg[1], reg[2], reg[3]);
1596
1597 reg[0] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD0_REG);
1598 reg[1] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD1_REG);
1599 reg[2] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD2_REG);
1600 reg[3] = readl(port->dma_base + GMAC_DMA_RX_DESC_WORD3_REG);
1601 netdev_err(netdev, "RX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1602 reg[0], reg[1], reg[2], reg[3]);
1603
1604 /* TX DMA status */
1605 ptr_reg = port->dma_base + GMAC_SW_TX_QUEUE0_PTR_REG;
1606
1607 reg[0] = readl(port->dma_base + GMAC_DMA_TX_FIRST_DESC_REG);
1608 reg[1] = readl(port->dma_base + GMAC_DMA_TX_CURR_DESC_REG);
1609 reg[2] = GET_RPTR(ptr_reg);
1610 reg[3] = GET_WPTR(ptr_reg);
1611 netdev_err(netdev, "TX DMA regs: 0x%08x 0x%08x, ptr: %u %u\n",
1612 reg[0], reg[1], reg[2], reg[3]);
1613
1614 reg[0] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD0_REG);
1615 reg[1] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD1_REG);
1616 reg[2] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD2_REG);
1617 reg[3] = readl(port->dma_base + GMAC_DMA_TX_DESC_WORD3_REG);
1618 netdev_err(netdev, "TX DMA descriptor: 0x%08x 0x%08x 0x%08x 0x%08x\n",
1619 reg[0], reg[1], reg[2], reg[3]);
1620
1621 /* FREE queues status */
1622 ptr_reg = geth->base + GLOBAL_SWFQ_RWPTR_REG;
1623
1624 reg[0] = GET_RPTR(ptr_reg);
1625 reg[1] = GET_WPTR(ptr_reg);
1626
1627 ptr_reg = geth->base + GLOBAL_HWFQ_RWPTR_REG;
1628
1629 reg[2] = GET_RPTR(ptr_reg);
1630 reg[3] = GET_WPTR(ptr_reg);
1631 netdev_err(netdev, "FQ SW ptr: %u %u, HW ptr: %u %u\n",
1632 reg[0], reg[1], reg[2], reg[3]);
1633 }
1634
gmac_update_hw_stats(struct net_device * netdev)1635 static void gmac_update_hw_stats(struct net_device *netdev)
1636 {
1637 struct gemini_ethernet_port *port = netdev_priv(netdev);
1638 unsigned int rx_discards, rx_mcast, rx_bcast;
1639 struct gemini_ethernet *geth = port->geth;
1640 unsigned long flags;
1641
1642 spin_lock_irqsave(&geth->irq_lock, flags);
1643 u64_stats_update_begin(&port->ir_stats_syncp);
1644
1645 rx_discards = readl(port->gmac_base + GMAC_IN_DISCARDS);
1646 port->hw_stats[0] += rx_discards;
1647 port->hw_stats[1] += readl(port->gmac_base + GMAC_IN_ERRORS);
1648 rx_mcast = readl(port->gmac_base + GMAC_IN_MCAST);
1649 port->hw_stats[2] += rx_mcast;
1650 rx_bcast = readl(port->gmac_base + GMAC_IN_BCAST);
1651 port->hw_stats[3] += rx_bcast;
1652 port->hw_stats[4] += readl(port->gmac_base + GMAC_IN_MAC1);
1653 port->hw_stats[5] += readl(port->gmac_base + GMAC_IN_MAC2);
1654
1655 port->stats.rx_missed_errors += rx_discards;
1656 port->stats.multicast += rx_mcast;
1657 port->stats.multicast += rx_bcast;
1658
1659 writel(GMAC0_MIB_INT_BIT << (netdev->dev_id * 8),
1660 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1661
1662 u64_stats_update_end(&port->ir_stats_syncp);
1663 spin_unlock_irqrestore(&geth->irq_lock, flags);
1664 }
1665
1666 /**
1667 * gmac_get_intr_flags() - get interrupt status flags for a port from
1668 * @netdev: the net device for the port to get flags from
1669 * @i: the interrupt status register 0..4
1670 */
gmac_get_intr_flags(struct net_device * netdev,int i)1671 static u32 gmac_get_intr_flags(struct net_device *netdev, int i)
1672 {
1673 struct gemini_ethernet_port *port = netdev_priv(netdev);
1674 struct gemini_ethernet *geth = port->geth;
1675 void __iomem *irqif_reg, *irqen_reg;
1676 unsigned int offs, val;
1677
1678 /* Calculate the offset using the stride of the status registers */
1679 offs = i * (GLOBAL_INTERRUPT_STATUS_1_REG -
1680 GLOBAL_INTERRUPT_STATUS_0_REG);
1681
1682 irqif_reg = geth->base + GLOBAL_INTERRUPT_STATUS_0_REG + offs;
1683 irqen_reg = geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG + offs;
1684
1685 val = readl(irqif_reg) & readl(irqen_reg);
1686 return val;
1687 }
1688
gmac_coalesce_delay_expired(struct hrtimer * timer)1689 static enum hrtimer_restart gmac_coalesce_delay_expired(struct hrtimer *timer)
1690 {
1691 struct gemini_ethernet_port *port =
1692 container_of(timer, struct gemini_ethernet_port,
1693 rx_coalesce_timer);
1694
1695 napi_schedule(&port->napi);
1696 return HRTIMER_NORESTART;
1697 }
1698
gmac_irq(int irq,void * data)1699 static irqreturn_t gmac_irq(int irq, void *data)
1700 {
1701 struct gemini_ethernet_port *port;
1702 struct net_device *netdev = data;
1703 struct gemini_ethernet *geth;
1704 u32 val, orr = 0;
1705
1706 port = netdev_priv(netdev);
1707 geth = port->geth;
1708
1709 val = gmac_get_intr_flags(netdev, 0);
1710 orr |= val;
1711
1712 if (val & (GMAC0_IRQ0_2 << (netdev->dev_id * 2))) {
1713 /* Oh, crap */
1714 netdev_err(netdev, "hw failure/sw bug\n");
1715 gmac_dump_dma_state(netdev);
1716
1717 /* don't know how to recover, just reduce losses */
1718 gmac_enable_irq(netdev, 0);
1719 return IRQ_HANDLED;
1720 }
1721
1722 if (val & (GMAC0_IRQ0_TXQ0_INTS << (netdev->dev_id * 6)))
1723 gmac_tx_irq(netdev, 0);
1724
1725 val = gmac_get_intr_flags(netdev, 1);
1726 orr |= val;
1727
1728 if (val & (DEFAULT_Q0_INT_BIT << netdev->dev_id)) {
1729 gmac_enable_rx_irq(netdev, 0);
1730
1731 if (!port->rx_coalesce_nsecs) {
1732 napi_schedule(&port->napi);
1733 } else {
1734 ktime_t ktime;
1735
1736 ktime = ktime_set(0, port->rx_coalesce_nsecs);
1737 hrtimer_start(&port->rx_coalesce_timer, ktime,
1738 HRTIMER_MODE_REL);
1739 }
1740 }
1741
1742 val = gmac_get_intr_flags(netdev, 4);
1743 orr |= val;
1744
1745 if (val & (GMAC0_MIB_INT_BIT << (netdev->dev_id * 8)))
1746 gmac_update_hw_stats(netdev);
1747
1748 if (val & (GMAC0_RX_OVERRUN_INT_BIT << (netdev->dev_id * 8))) {
1749 spin_lock(&geth->irq_lock);
1750 writel(GMAC0_RXDERR_INT_BIT << (netdev->dev_id * 8),
1751 geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
1752 u64_stats_update_begin(&port->ir_stats_syncp);
1753 ++port->stats.rx_fifo_errors;
1754 u64_stats_update_end(&port->ir_stats_syncp);
1755 spin_unlock(&geth->irq_lock);
1756 }
1757
1758 return orr ? IRQ_HANDLED : IRQ_NONE;
1759 }
1760
gmac_start_dma(struct gemini_ethernet_port * port)1761 static void gmac_start_dma(struct gemini_ethernet_port *port)
1762 {
1763 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1764 union gmac_dma_ctrl dma_ctrl;
1765
1766 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1767 dma_ctrl.bits.rd_enable = 1;
1768 dma_ctrl.bits.td_enable = 1;
1769 dma_ctrl.bits.loopback = 0;
1770 dma_ctrl.bits.drop_small_ack = 0;
1771 dma_ctrl.bits.rd_insert_bytes = NET_IP_ALIGN;
1772 dma_ctrl.bits.rd_prot = HPROT_DATA_CACHE | HPROT_PRIVILIGED;
1773 dma_ctrl.bits.rd_burst_size = HBURST_INCR8;
1774 dma_ctrl.bits.rd_bus = HSIZE_8;
1775 dma_ctrl.bits.td_prot = HPROT_DATA_CACHE;
1776 dma_ctrl.bits.td_burst_size = HBURST_INCR8;
1777 dma_ctrl.bits.td_bus = HSIZE_8;
1778
1779 writel(dma_ctrl.bits32, dma_ctrl_reg);
1780 }
1781
gmac_stop_dma(struct gemini_ethernet_port * port)1782 static void gmac_stop_dma(struct gemini_ethernet_port *port)
1783 {
1784 void __iomem *dma_ctrl_reg = port->dma_base + GMAC_DMA_CTRL_REG;
1785 union gmac_dma_ctrl dma_ctrl;
1786
1787 dma_ctrl.bits32 = readl(dma_ctrl_reg);
1788 dma_ctrl.bits.rd_enable = 0;
1789 dma_ctrl.bits.td_enable = 0;
1790 writel(dma_ctrl.bits32, dma_ctrl_reg);
1791 }
1792
gmac_open(struct net_device * netdev)1793 static int gmac_open(struct net_device *netdev)
1794 {
1795 struct gemini_ethernet_port *port = netdev_priv(netdev);
1796 int err;
1797
1798 err = request_irq(netdev->irq, gmac_irq,
1799 IRQF_SHARED, netdev->name, netdev);
1800 if (err) {
1801 netdev_err(netdev, "no IRQ\n");
1802 return err;
1803 }
1804
1805 netif_carrier_off(netdev);
1806 phy_start(netdev->phydev);
1807
1808 err = geth_resize_freeq(port);
1809 /* It's fine if it's just busy, the other port has set up
1810 * the freeq in that case.
1811 */
1812 if (err && (err != -EBUSY)) {
1813 netdev_err(netdev, "could not resize freeq\n");
1814 goto err_stop_phy;
1815 }
1816
1817 err = gmac_setup_rxq(netdev);
1818 if (err) {
1819 netdev_err(netdev, "could not setup RXQ\n");
1820 goto err_stop_phy;
1821 }
1822
1823 err = gmac_setup_txqs(netdev);
1824 if (err) {
1825 netdev_err(netdev, "could not setup TXQs\n");
1826 gmac_cleanup_rxq(netdev);
1827 goto err_stop_phy;
1828 }
1829
1830 napi_enable(&port->napi);
1831
1832 gmac_start_dma(port);
1833 gmac_enable_irq(netdev, 1);
1834 gmac_enable_tx_rx(netdev);
1835 netif_tx_start_all_queues(netdev);
1836
1837 hrtimer_setup(&port->rx_coalesce_timer, &gmac_coalesce_delay_expired, CLOCK_MONOTONIC,
1838 HRTIMER_MODE_REL);
1839
1840 netdev_dbg(netdev, "opened\n");
1841
1842 return 0;
1843
1844 err_stop_phy:
1845 phy_stop(netdev->phydev);
1846 free_irq(netdev->irq, netdev);
1847 return err;
1848 }
1849
gmac_stop(struct net_device * netdev)1850 static int gmac_stop(struct net_device *netdev)
1851 {
1852 struct gemini_ethernet_port *port = netdev_priv(netdev);
1853
1854 hrtimer_cancel(&port->rx_coalesce_timer);
1855 netif_tx_stop_all_queues(netdev);
1856 gmac_disable_tx_rx(netdev);
1857 gmac_stop_dma(port);
1858 napi_disable(&port->napi);
1859
1860 gmac_enable_irq(netdev, 0);
1861 gmac_cleanup_rxq(netdev);
1862 gmac_cleanup_txqs(netdev);
1863
1864 phy_stop(netdev->phydev);
1865 free_irq(netdev->irq, netdev);
1866
1867 gmac_update_hw_stats(netdev);
1868 return 0;
1869 }
1870
gmac_set_rx_mode(struct net_device * netdev)1871 static void gmac_set_rx_mode(struct net_device *netdev)
1872 {
1873 struct gemini_ethernet_port *port = netdev_priv(netdev);
1874 union gmac_rx_fltr filter = { .bits = {
1875 .broadcast = 1,
1876 .multicast = 1,
1877 .unicast = 1,
1878 } };
1879 struct netdev_hw_addr *ha;
1880 unsigned int bit_nr;
1881 u32 mc_filter[2];
1882
1883 mc_filter[1] = 0;
1884 mc_filter[0] = 0;
1885
1886 if (netdev->flags & IFF_PROMISC) {
1887 filter.bits.error = 1;
1888 filter.bits.promiscuous = 1;
1889 mc_filter[1] = ~0;
1890 mc_filter[0] = ~0;
1891 } else if (netdev->flags & IFF_ALLMULTI) {
1892 mc_filter[1] = ~0;
1893 mc_filter[0] = ~0;
1894 } else {
1895 netdev_for_each_mc_addr(ha, netdev) {
1896 bit_nr = ~crc32_le(~0, ha->addr, ETH_ALEN) & 0x3f;
1897 mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 0x1f);
1898 }
1899 }
1900
1901 writel(mc_filter[0], port->gmac_base + GMAC_MCAST_FIL0);
1902 writel(mc_filter[1], port->gmac_base + GMAC_MCAST_FIL1);
1903 writel(filter.bits32, port->gmac_base + GMAC_RX_FLTR);
1904 }
1905
gmac_write_mac_address(struct net_device * netdev)1906 static void gmac_write_mac_address(struct net_device *netdev)
1907 {
1908 struct gemini_ethernet_port *port = netdev_priv(netdev);
1909 __le32 addr[3];
1910
1911 memset(addr, 0, sizeof(addr));
1912 memcpy(addr, netdev->dev_addr, ETH_ALEN);
1913
1914 writel(le32_to_cpu(addr[0]), port->gmac_base + GMAC_STA_ADD0);
1915 writel(le32_to_cpu(addr[1]), port->gmac_base + GMAC_STA_ADD1);
1916 writel(le32_to_cpu(addr[2]), port->gmac_base + GMAC_STA_ADD2);
1917 }
1918
gmac_set_mac_address(struct net_device * netdev,void * addr)1919 static int gmac_set_mac_address(struct net_device *netdev, void *addr)
1920 {
1921 struct sockaddr *sa = addr;
1922
1923 eth_hw_addr_set(netdev, sa->sa_data);
1924 gmac_write_mac_address(netdev);
1925
1926 return 0;
1927 }
1928
gmac_clear_hw_stats(struct net_device * netdev)1929 static void gmac_clear_hw_stats(struct net_device *netdev)
1930 {
1931 struct gemini_ethernet_port *port = netdev_priv(netdev);
1932
1933 readl(port->gmac_base + GMAC_IN_DISCARDS);
1934 readl(port->gmac_base + GMAC_IN_ERRORS);
1935 readl(port->gmac_base + GMAC_IN_MCAST);
1936 readl(port->gmac_base + GMAC_IN_BCAST);
1937 readl(port->gmac_base + GMAC_IN_MAC1);
1938 readl(port->gmac_base + GMAC_IN_MAC2);
1939 }
1940
gmac_get_stats64(struct net_device * netdev,struct rtnl_link_stats64 * stats)1941 static void gmac_get_stats64(struct net_device *netdev,
1942 struct rtnl_link_stats64 *stats)
1943 {
1944 struct gemini_ethernet_port *port = netdev_priv(netdev);
1945 unsigned int start;
1946
1947 gmac_update_hw_stats(netdev);
1948
1949 /* Racing with RX NAPI */
1950 do {
1951 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
1952
1953 stats->rx_packets = port->stats.rx_packets;
1954 stats->rx_bytes = port->stats.rx_bytes;
1955 stats->rx_errors = port->stats.rx_errors;
1956 stats->rx_dropped = port->stats.rx_dropped;
1957
1958 stats->rx_length_errors = port->stats.rx_length_errors;
1959 stats->rx_over_errors = port->stats.rx_over_errors;
1960 stats->rx_crc_errors = port->stats.rx_crc_errors;
1961 stats->rx_frame_errors = port->stats.rx_frame_errors;
1962
1963 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
1964
1965 /* Racing with MIB and TX completion interrupts */
1966 do {
1967 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
1968
1969 stats->tx_errors = port->stats.tx_errors;
1970 stats->tx_packets = port->stats.tx_packets;
1971 stats->tx_bytes = port->stats.tx_bytes;
1972
1973 stats->multicast = port->stats.multicast;
1974 stats->rx_missed_errors = port->stats.rx_missed_errors;
1975 stats->rx_fifo_errors = port->stats.rx_fifo_errors;
1976
1977 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
1978
1979 /* Racing with hard_start_xmit */
1980 do {
1981 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
1982
1983 stats->tx_dropped = port->stats.tx_dropped;
1984
1985 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
1986
1987 stats->rx_dropped += stats->rx_missed_errors;
1988 }
1989
gmac_change_mtu(struct net_device * netdev,int new_mtu)1990 static int gmac_change_mtu(struct net_device *netdev, int new_mtu)
1991 {
1992 int max_len = gmac_pick_rx_max_len(new_mtu);
1993
1994 if (max_len < 0)
1995 return -EINVAL;
1996
1997 gmac_disable_tx_rx(netdev);
1998
1999 WRITE_ONCE(netdev->mtu, new_mtu);
2000 gmac_update_config0_reg(netdev, max_len << CONFIG0_MAXLEN_SHIFT,
2001 CONFIG0_MAXLEN_MASK);
2002
2003 netdev_update_features(netdev);
2004
2005 gmac_enable_tx_rx(netdev);
2006
2007 return 0;
2008 }
2009
gmac_set_features(struct net_device * netdev,netdev_features_t features)2010 static int gmac_set_features(struct net_device *netdev,
2011 netdev_features_t features)
2012 {
2013 struct gemini_ethernet_port *port = netdev_priv(netdev);
2014 int enable = features & NETIF_F_RXCSUM;
2015 unsigned long flags;
2016 u32 reg;
2017
2018 spin_lock_irqsave(&port->config_lock, flags);
2019
2020 reg = readl(port->gmac_base + GMAC_CONFIG0);
2021 reg = enable ? reg | CONFIG0_RX_CHKSUM : reg & ~CONFIG0_RX_CHKSUM;
2022 writel(reg, port->gmac_base + GMAC_CONFIG0);
2023
2024 spin_unlock_irqrestore(&port->config_lock, flags);
2025 return 0;
2026 }
2027
gmac_get_sset_count(struct net_device * netdev,int sset)2028 static int gmac_get_sset_count(struct net_device *netdev, int sset)
2029 {
2030 return sset == ETH_SS_STATS ? GMAC_STATS_NUM : 0;
2031 }
2032
gmac_get_strings(struct net_device * netdev,u32 stringset,u8 * data)2033 static void gmac_get_strings(struct net_device *netdev, u32 stringset, u8 *data)
2034 {
2035 if (stringset != ETH_SS_STATS)
2036 return;
2037
2038 memcpy(data, gmac_stats_strings, sizeof(gmac_stats_strings));
2039 }
2040
gmac_get_ethtool_stats(struct net_device * netdev,struct ethtool_stats * estats,u64 * values)2041 static void gmac_get_ethtool_stats(struct net_device *netdev,
2042 struct ethtool_stats *estats, u64 *values)
2043 {
2044 struct gemini_ethernet_port *port = netdev_priv(netdev);
2045 unsigned int start;
2046 u64 *p;
2047 int i;
2048
2049 gmac_update_hw_stats(netdev);
2050
2051 /* Racing with MIB interrupt */
2052 do {
2053 p = values;
2054 start = u64_stats_fetch_begin(&port->ir_stats_syncp);
2055
2056 for (i = 0; i < RX_STATS_NUM; i++)
2057 *p++ = port->hw_stats[i];
2058
2059 } while (u64_stats_fetch_retry(&port->ir_stats_syncp, start));
2060 values = p;
2061
2062 /* Racing with RX NAPI */
2063 do {
2064 p = values;
2065 start = u64_stats_fetch_begin(&port->rx_stats_syncp);
2066
2067 for (i = 0; i < RX_STATUS_NUM; i++)
2068 *p++ = port->rx_stats[i];
2069 for (i = 0; i < RX_CHKSUM_NUM; i++)
2070 *p++ = port->rx_csum_stats[i];
2071 *p++ = port->rx_napi_exits;
2072
2073 } while (u64_stats_fetch_retry(&port->rx_stats_syncp, start));
2074 values = p;
2075
2076 /* Racing with TX start_xmit */
2077 do {
2078 p = values;
2079 start = u64_stats_fetch_begin(&port->tx_stats_syncp);
2080
2081 for (i = 0; i < TX_MAX_FRAGS; i++) {
2082 *values++ = port->tx_frag_stats[i];
2083 port->tx_frag_stats[i] = 0;
2084 }
2085 *values++ = port->tx_frags_linearized;
2086 *values++ = port->tx_hw_csummed;
2087
2088 } while (u64_stats_fetch_retry(&port->tx_stats_syncp, start));
2089 }
2090
gmac_get_ksettings(struct net_device * netdev,struct ethtool_link_ksettings * cmd)2091 static int gmac_get_ksettings(struct net_device *netdev,
2092 struct ethtool_link_ksettings *cmd)
2093 {
2094 if (!netdev->phydev)
2095 return -ENXIO;
2096 phy_ethtool_ksettings_get(netdev->phydev, cmd);
2097
2098 return 0;
2099 }
2100
gmac_set_ksettings(struct net_device * netdev,const struct ethtool_link_ksettings * cmd)2101 static int gmac_set_ksettings(struct net_device *netdev,
2102 const struct ethtool_link_ksettings *cmd)
2103 {
2104 if (!netdev->phydev)
2105 return -ENXIO;
2106 return phy_ethtool_ksettings_set(netdev->phydev, cmd);
2107 }
2108
gmac_nway_reset(struct net_device * netdev)2109 static int gmac_nway_reset(struct net_device *netdev)
2110 {
2111 if (!netdev->phydev)
2112 return -ENXIO;
2113 return phy_start_aneg(netdev->phydev);
2114 }
2115
gmac_get_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pparam)2116 static void gmac_get_pauseparam(struct net_device *netdev,
2117 struct ethtool_pauseparam *pparam)
2118 {
2119 struct gemini_ethernet_port *port = netdev_priv(netdev);
2120 union gmac_config0 config0;
2121
2122 config0.bits32 = readl(port->gmac_base + GMAC_CONFIG0);
2123
2124 pparam->rx_pause = config0.bits.rx_fc_en;
2125 pparam->tx_pause = config0.bits.tx_fc_en;
2126 pparam->autoneg = true;
2127 }
2128
gmac_set_pauseparam(struct net_device * netdev,struct ethtool_pauseparam * pparam)2129 static int gmac_set_pauseparam(struct net_device *netdev,
2130 struct ethtool_pauseparam *pparam)
2131 {
2132 struct phy_device *phydev = netdev->phydev;
2133
2134 if (!pparam->autoneg)
2135 return -EOPNOTSUPP;
2136
2137 phy_set_asym_pause(phydev, pparam->rx_pause, pparam->tx_pause);
2138
2139 return 0;
2140 }
2141
gmac_get_ringparam(struct net_device * netdev,struct ethtool_ringparam * rp,struct kernel_ethtool_ringparam * kernel_rp,struct netlink_ext_ack * extack)2142 static void gmac_get_ringparam(struct net_device *netdev,
2143 struct ethtool_ringparam *rp,
2144 struct kernel_ethtool_ringparam *kernel_rp,
2145 struct netlink_ext_ack *extack)
2146 {
2147 struct gemini_ethernet_port *port = netdev_priv(netdev);
2148
2149 readl(port->gmac_base + GMAC_CONFIG0);
2150
2151 rp->rx_max_pending = 1 << 15;
2152 rp->rx_mini_max_pending = 0;
2153 rp->rx_jumbo_max_pending = 0;
2154 rp->tx_max_pending = 1 << 15;
2155
2156 rp->rx_pending = 1 << port->rxq_order;
2157 rp->rx_mini_pending = 0;
2158 rp->rx_jumbo_pending = 0;
2159 rp->tx_pending = 1 << port->txq_order;
2160 }
2161
gmac_set_ringparam(struct net_device * netdev,struct ethtool_ringparam * rp,struct kernel_ethtool_ringparam * kernel_rp,struct netlink_ext_ack * extack)2162 static int gmac_set_ringparam(struct net_device *netdev,
2163 struct ethtool_ringparam *rp,
2164 struct kernel_ethtool_ringparam *kernel_rp,
2165 struct netlink_ext_ack *extack)
2166 {
2167 struct gemini_ethernet_port *port = netdev_priv(netdev);
2168 int err = 0;
2169
2170 if (netif_running(netdev))
2171 return -EBUSY;
2172
2173 if (rp->rx_pending) {
2174 port->rxq_order = min(15, ilog2(rp->rx_pending - 1) + 1);
2175 err = geth_resize_freeq(port);
2176 }
2177 if (rp->tx_pending) {
2178 port->txq_order = min(15, ilog2(rp->tx_pending - 1) + 1);
2179 port->irq_every_tx_packets = 1 << (port->txq_order - 2);
2180 }
2181
2182 return err;
2183 }
2184
gmac_get_coalesce(struct net_device * netdev,struct ethtool_coalesce * ecmd,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)2185 static int gmac_get_coalesce(struct net_device *netdev,
2186 struct ethtool_coalesce *ecmd,
2187 struct kernel_ethtool_coalesce *kernel_coal,
2188 struct netlink_ext_ack *extack)
2189 {
2190 struct gemini_ethernet_port *port = netdev_priv(netdev);
2191
2192 ecmd->rx_max_coalesced_frames = 1;
2193 ecmd->tx_max_coalesced_frames = port->irq_every_tx_packets;
2194 ecmd->rx_coalesce_usecs = port->rx_coalesce_nsecs / 1000;
2195
2196 return 0;
2197 }
2198
gmac_set_coalesce(struct net_device * netdev,struct ethtool_coalesce * ecmd,struct kernel_ethtool_coalesce * kernel_coal,struct netlink_ext_ack * extack)2199 static int gmac_set_coalesce(struct net_device *netdev,
2200 struct ethtool_coalesce *ecmd,
2201 struct kernel_ethtool_coalesce *kernel_coal,
2202 struct netlink_ext_ack *extack)
2203 {
2204 struct gemini_ethernet_port *port = netdev_priv(netdev);
2205
2206 if (ecmd->tx_max_coalesced_frames < 1)
2207 return -EINVAL;
2208 if (ecmd->tx_max_coalesced_frames >= 1 << port->txq_order)
2209 return -EINVAL;
2210
2211 port->irq_every_tx_packets = ecmd->tx_max_coalesced_frames;
2212 port->rx_coalesce_nsecs = ecmd->rx_coalesce_usecs * 1000;
2213
2214 return 0;
2215 }
2216
gmac_get_msglevel(struct net_device * netdev)2217 static u32 gmac_get_msglevel(struct net_device *netdev)
2218 {
2219 struct gemini_ethernet_port *port = netdev_priv(netdev);
2220
2221 return port->msg_enable;
2222 }
2223
gmac_set_msglevel(struct net_device * netdev,u32 level)2224 static void gmac_set_msglevel(struct net_device *netdev, u32 level)
2225 {
2226 struct gemini_ethernet_port *port = netdev_priv(netdev);
2227
2228 port->msg_enable = level;
2229 }
2230
gmac_get_drvinfo(struct net_device * netdev,struct ethtool_drvinfo * info)2231 static void gmac_get_drvinfo(struct net_device *netdev,
2232 struct ethtool_drvinfo *info)
2233 {
2234 strcpy(info->driver, DRV_NAME);
2235 strcpy(info->bus_info, netdev->dev_id ? "1" : "0");
2236 }
2237
2238 static const struct net_device_ops gmac_351x_ops = {
2239 .ndo_init = gmac_init,
2240 .ndo_open = gmac_open,
2241 .ndo_stop = gmac_stop,
2242 .ndo_start_xmit = gmac_start_xmit,
2243 .ndo_tx_timeout = gmac_tx_timeout,
2244 .ndo_set_rx_mode = gmac_set_rx_mode,
2245 .ndo_set_mac_address = gmac_set_mac_address,
2246 .ndo_get_stats64 = gmac_get_stats64,
2247 .ndo_change_mtu = gmac_change_mtu,
2248 .ndo_set_features = gmac_set_features,
2249 };
2250
2251 static const struct ethtool_ops gmac_351x_ethtool_ops = {
2252 .supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS |
2253 ETHTOOL_COALESCE_MAX_FRAMES,
2254 .get_sset_count = gmac_get_sset_count,
2255 .get_strings = gmac_get_strings,
2256 .get_ethtool_stats = gmac_get_ethtool_stats,
2257 .get_link = ethtool_op_get_link,
2258 .get_link_ksettings = gmac_get_ksettings,
2259 .set_link_ksettings = gmac_set_ksettings,
2260 .nway_reset = gmac_nway_reset,
2261 .get_pauseparam = gmac_get_pauseparam,
2262 .set_pauseparam = gmac_set_pauseparam,
2263 .get_ringparam = gmac_get_ringparam,
2264 .set_ringparam = gmac_set_ringparam,
2265 .get_coalesce = gmac_get_coalesce,
2266 .set_coalesce = gmac_set_coalesce,
2267 .get_msglevel = gmac_get_msglevel,
2268 .set_msglevel = gmac_set_msglevel,
2269 .get_drvinfo = gmac_get_drvinfo,
2270 };
2271
gemini_port_irq_thread(int irq,void * data)2272 static irqreturn_t gemini_port_irq_thread(int irq, void *data)
2273 {
2274 unsigned long irqmask = SWFQ_EMPTY_INT_BIT;
2275 struct gemini_ethernet_port *port = data;
2276 struct gemini_ethernet *geth;
2277 unsigned long flags;
2278
2279 geth = port->geth;
2280 /* The queue is half empty so refill it */
2281 geth_fill_freeq(geth, true);
2282
2283 spin_lock_irqsave(&geth->irq_lock, flags);
2284 /* ACK queue interrupt */
2285 writel(irqmask, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2286 /* Enable queue interrupt again */
2287 irqmask |= readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2288 writel(irqmask, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2289 spin_unlock_irqrestore(&geth->irq_lock, flags);
2290
2291 return IRQ_HANDLED;
2292 }
2293
gemini_port_irq(int irq,void * data)2294 static irqreturn_t gemini_port_irq(int irq, void *data)
2295 {
2296 struct gemini_ethernet_port *port = data;
2297 struct gemini_ethernet *geth;
2298 irqreturn_t ret = IRQ_NONE;
2299 u32 val, en;
2300
2301 geth = port->geth;
2302 spin_lock(&geth->irq_lock);
2303
2304 val = readl(geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2305 en = readl(geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2306
2307 if (val & en & SWFQ_EMPTY_INT_BIT) {
2308 /* Disable the queue empty interrupt while we work on
2309 * processing the queue. Also disable overrun interrupts
2310 * as there is not much we can do about it here.
2311 */
2312 en &= ~(SWFQ_EMPTY_INT_BIT | GMAC0_RX_OVERRUN_INT_BIT
2313 | GMAC1_RX_OVERRUN_INT_BIT);
2314 writel(en, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2315 ret = IRQ_WAKE_THREAD;
2316 }
2317
2318 spin_unlock(&geth->irq_lock);
2319
2320 return ret;
2321 }
2322
gemini_port_remove(struct gemini_ethernet_port * port)2323 static void gemini_port_remove(struct gemini_ethernet_port *port)
2324 {
2325 if (port->netdev) {
2326 phy_disconnect(port->netdev->phydev);
2327 unregister_netdev(port->netdev);
2328 }
2329 clk_disable_unprepare(port->pclk);
2330 geth_cleanup_freeq(port->geth);
2331 }
2332
gemini_ethernet_init(struct gemini_ethernet * geth)2333 static void gemini_ethernet_init(struct gemini_ethernet *geth)
2334 {
2335 /* Only do this once both ports are online */
2336 if (geth->initialized)
2337 return;
2338 if (geth->port0 && geth->port1)
2339 geth->initialized = true;
2340 else
2341 return;
2342
2343 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_0_REG);
2344 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_1_REG);
2345 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_2_REG);
2346 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_3_REG);
2347 writel(0, geth->base + GLOBAL_INTERRUPT_ENABLE_4_REG);
2348
2349 /* Interrupt config:
2350 *
2351 * GMAC0 intr bits ------> int0 ----> eth0
2352 * GMAC1 intr bits ------> int1 ----> eth1
2353 * TOE intr -------------> int1 ----> eth1
2354 * Classification Intr --> int0 ----> eth0
2355 * Default Q0 -----------> int0 ----> eth0
2356 * Default Q1 -----------> int1 ----> eth1
2357 * FreeQ intr -----------> int1 ----> eth1
2358 */
2359 writel(0xCCFC0FC0, geth->base + GLOBAL_INTERRUPT_SELECT_0_REG);
2360 writel(0x00F00002, geth->base + GLOBAL_INTERRUPT_SELECT_1_REG);
2361 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_2_REG);
2362 writel(0xFFFFFFFF, geth->base + GLOBAL_INTERRUPT_SELECT_3_REG);
2363 writel(0xFF000003, geth->base + GLOBAL_INTERRUPT_SELECT_4_REG);
2364
2365 /* edge-triggered interrupts packed to level-triggered one... */
2366 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_0_REG);
2367 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_1_REG);
2368 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_2_REG);
2369 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_3_REG);
2370 writel(~0, geth->base + GLOBAL_INTERRUPT_STATUS_4_REG);
2371
2372 /* Set up queue */
2373 writel(0, geth->base + GLOBAL_SW_FREEQ_BASE_SIZE_REG);
2374 writel(0, geth->base + GLOBAL_HW_FREEQ_BASE_SIZE_REG);
2375 writel(0, geth->base + GLOBAL_SWFQ_RWPTR_REG);
2376 writel(0, geth->base + GLOBAL_HWFQ_RWPTR_REG);
2377
2378 geth->freeq_frag_order = DEFAULT_RX_BUF_ORDER;
2379 /* This makes the queue resize on probe() so that we
2380 * set up and enable the queue IRQ. FIXME: fragile.
2381 */
2382 geth->freeq_order = 1;
2383 }
2384
gemini_port_save_mac_addr(struct gemini_ethernet_port * port)2385 static void gemini_port_save_mac_addr(struct gemini_ethernet_port *port)
2386 {
2387 port->mac_addr[0] =
2388 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD0));
2389 port->mac_addr[1] =
2390 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD1));
2391 port->mac_addr[2] =
2392 cpu_to_le32(readl(port->gmac_base + GMAC_STA_ADD2));
2393 }
2394
gemini_ethernet_port_probe(struct platform_device * pdev)2395 static int gemini_ethernet_port_probe(struct platform_device *pdev)
2396 {
2397 char *port_names[2] = { "ethernet0", "ethernet1" };
2398 struct device_node *np = pdev->dev.of_node;
2399 struct gemini_ethernet_port *port;
2400 struct device *dev = &pdev->dev;
2401 struct gemini_ethernet *geth;
2402 struct net_device *netdev;
2403 struct device *parent;
2404 u8 mac[ETH_ALEN];
2405 unsigned int id;
2406 int irq;
2407 int ret;
2408
2409 parent = dev->parent;
2410 geth = dev_get_drvdata(parent);
2411
2412 if (!strcmp(dev_name(dev), "60008000.ethernet-port"))
2413 id = 0;
2414 else if (!strcmp(dev_name(dev), "6000c000.ethernet-port"))
2415 id = 1;
2416 else
2417 return -ENODEV;
2418
2419 dev_info(dev, "probe %s ID %d\n", dev_name(dev), id);
2420
2421 netdev = devm_alloc_etherdev_mqs(dev, sizeof(*port), TX_QUEUE_NUM, TX_QUEUE_NUM);
2422 if (!netdev) {
2423 dev_err(dev, "Can't allocate ethernet device #%d\n", id);
2424 return -ENOMEM;
2425 }
2426
2427 port = netdev_priv(netdev);
2428 SET_NETDEV_DEV(netdev, dev);
2429 port->netdev = netdev;
2430 port->id = id;
2431 port->geth = geth;
2432 port->dev = dev;
2433 port->msg_enable = netif_msg_init(debug, DEFAULT_MSG_ENABLE);
2434
2435 /* DMA memory */
2436 port->dma_base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
2437 if (IS_ERR(port->dma_base)) {
2438 dev_err(dev, "get DMA address failed\n");
2439 return PTR_ERR(port->dma_base);
2440 }
2441
2442 /* GMAC config memory */
2443 port->gmac_base = devm_platform_get_and_ioremap_resource(pdev, 1, NULL);
2444 if (IS_ERR(port->gmac_base)) {
2445 dev_err(dev, "get GMAC address failed\n");
2446 return PTR_ERR(port->gmac_base);
2447 }
2448
2449 /* Interrupt */
2450 irq = platform_get_irq(pdev, 0);
2451 if (irq < 0)
2452 return irq;
2453 port->irq = irq;
2454
2455 /* Clock the port */
2456 port->pclk = devm_clk_get(dev, "PCLK");
2457 if (IS_ERR(port->pclk)) {
2458 dev_err(dev, "no PCLK\n");
2459 return PTR_ERR(port->pclk);
2460 }
2461 ret = clk_prepare_enable(port->pclk);
2462 if (ret)
2463 return ret;
2464
2465 /* Maybe there is a nice ethernet address we should use */
2466 gemini_port_save_mac_addr(port);
2467
2468 /* Reset the port */
2469 port->reset = devm_reset_control_get_exclusive(dev, NULL);
2470 if (IS_ERR(port->reset)) {
2471 dev_err(dev, "no reset\n");
2472 ret = PTR_ERR(port->reset);
2473 goto unprepare;
2474 }
2475 reset_control_reset(port->reset);
2476 usleep_range(100, 500);
2477
2478 /* Assign pointer in the main state container */
2479 if (!id)
2480 geth->port0 = port;
2481 else
2482 geth->port1 = port;
2483
2484 /* This will just be done once both ports are up and reset */
2485 gemini_ethernet_init(geth);
2486
2487 platform_set_drvdata(pdev, port);
2488
2489 /* Set up and register the netdev */
2490 netdev->dev_id = port->id;
2491 netdev->irq = irq;
2492 netdev->netdev_ops = &gmac_351x_ops;
2493 netdev->ethtool_ops = &gmac_351x_ethtool_ops;
2494
2495 spin_lock_init(&port->config_lock);
2496 gmac_clear_hw_stats(netdev);
2497
2498 netdev->hw_features = GMAC_OFFLOAD_FEATURES;
2499 netdev->features |= GMAC_OFFLOAD_FEATURES | NETIF_F_GRO;
2500 /* We can receive jumbo frames up to 10236 bytes but only
2501 * transmit 2047 bytes so, let's accept payloads of 2047
2502 * bytes minus VLAN and ethernet header
2503 */
2504 netdev->min_mtu = ETH_MIN_MTU;
2505 netdev->max_mtu = MTU_SIZE_BIT_MASK - VLAN_ETH_HLEN;
2506
2507 port->freeq_refill = 0;
2508 netif_napi_add(netdev, &port->napi, gmac_napi_poll);
2509
2510 ret = of_get_mac_address(np, mac);
2511 if (!ret) {
2512 dev_info(dev, "Setting macaddr from DT %pM\n", mac);
2513 memcpy(port->mac_addr, mac, ETH_ALEN);
2514 }
2515
2516 if (is_valid_ether_addr((void *)port->mac_addr)) {
2517 eth_hw_addr_set(netdev, (u8 *)port->mac_addr);
2518 } else {
2519 dev_dbg(dev, "ethernet address 0x%08x%08x%08x invalid\n",
2520 port->mac_addr[0], port->mac_addr[1],
2521 port->mac_addr[2]);
2522 dev_info(dev, "using a random ethernet address\n");
2523 eth_hw_addr_random(netdev);
2524 }
2525 gmac_write_mac_address(netdev);
2526
2527 ret = devm_request_threaded_irq(port->dev,
2528 port->irq,
2529 gemini_port_irq,
2530 gemini_port_irq_thread,
2531 IRQF_SHARED,
2532 port_names[port->id],
2533 port);
2534 if (ret)
2535 goto unprepare;
2536
2537 ret = gmac_setup_phy(netdev);
2538 if (ret) {
2539 netdev_err(netdev,
2540 "PHY init failed\n");
2541 goto unprepare;
2542 }
2543
2544 ret = register_netdev(netdev);
2545 if (ret)
2546 goto unprepare;
2547
2548 return 0;
2549
2550 unprepare:
2551 clk_disable_unprepare(port->pclk);
2552 return ret;
2553 }
2554
gemini_ethernet_port_remove(struct platform_device * pdev)2555 static void gemini_ethernet_port_remove(struct platform_device *pdev)
2556 {
2557 struct gemini_ethernet_port *port = platform_get_drvdata(pdev);
2558
2559 gemini_port_remove(port);
2560 }
2561
2562 static const struct of_device_id gemini_ethernet_port_of_match[] = {
2563 {
2564 .compatible = "cortina,gemini-ethernet-port",
2565 },
2566 {},
2567 };
2568 MODULE_DEVICE_TABLE(of, gemini_ethernet_port_of_match);
2569
2570 static struct platform_driver gemini_ethernet_port_driver = {
2571 .driver = {
2572 .name = "gemini-ethernet-port",
2573 .of_match_table = gemini_ethernet_port_of_match,
2574 },
2575 .probe = gemini_ethernet_port_probe,
2576 .remove = gemini_ethernet_port_remove,
2577 };
2578
gemini_ethernet_probe(struct platform_device * pdev)2579 static int gemini_ethernet_probe(struct platform_device *pdev)
2580 {
2581 struct device *dev = &pdev->dev;
2582 struct gemini_ethernet *geth;
2583 unsigned int retry = 5;
2584 u32 val;
2585
2586 /* Global registers */
2587 geth = devm_kzalloc(dev, sizeof(*geth), GFP_KERNEL);
2588 if (!geth)
2589 return -ENOMEM;
2590 geth->base = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
2591 if (IS_ERR(geth->base))
2592 return PTR_ERR(geth->base);
2593 geth->dev = dev;
2594
2595 /* Wait for ports to stabilize */
2596 do {
2597 udelay(2);
2598 val = readl(geth->base + GLOBAL_TOE_VERSION_REG);
2599 barrier();
2600 } while (!val && --retry);
2601 if (!retry) {
2602 dev_err(dev, "failed to reset ethernet\n");
2603 return -EIO;
2604 }
2605 dev_info(dev, "Ethernet device ID: 0x%03x, revision 0x%01x\n",
2606 (val >> 4) & 0xFFFU, val & 0xFU);
2607
2608 spin_lock_init(&geth->irq_lock);
2609 spin_lock_init(&geth->freeq_lock);
2610
2611 /* The children will use this */
2612 platform_set_drvdata(pdev, geth);
2613
2614 /* Spawn child devices for the two ports */
2615 return devm_of_platform_populate(dev);
2616 }
2617
gemini_ethernet_remove(struct platform_device * pdev)2618 static void gemini_ethernet_remove(struct platform_device *pdev)
2619 {
2620 struct gemini_ethernet *geth = platform_get_drvdata(pdev);
2621
2622 geth_cleanup_freeq(geth);
2623 geth->initialized = false;
2624 }
2625
2626 static const struct of_device_id gemini_ethernet_of_match[] = {
2627 {
2628 .compatible = "cortina,gemini-ethernet",
2629 },
2630 {},
2631 };
2632 MODULE_DEVICE_TABLE(of, gemini_ethernet_of_match);
2633
2634 static struct platform_driver gemini_ethernet_driver = {
2635 .driver = {
2636 .name = DRV_NAME,
2637 .of_match_table = gemini_ethernet_of_match,
2638 },
2639 .probe = gemini_ethernet_probe,
2640 .remove = gemini_ethernet_remove,
2641 };
2642
gemini_ethernet_module_init(void)2643 static int __init gemini_ethernet_module_init(void)
2644 {
2645 int ret;
2646
2647 ret = platform_driver_register(&gemini_ethernet_port_driver);
2648 if (ret)
2649 return ret;
2650
2651 ret = platform_driver_register(&gemini_ethernet_driver);
2652 if (ret) {
2653 platform_driver_unregister(&gemini_ethernet_port_driver);
2654 return ret;
2655 }
2656
2657 return 0;
2658 }
2659 module_init(gemini_ethernet_module_init);
2660
gemini_ethernet_module_exit(void)2661 static void __exit gemini_ethernet_module_exit(void)
2662 {
2663 platform_driver_unregister(&gemini_ethernet_driver);
2664 platform_driver_unregister(&gemini_ethernet_port_driver);
2665 }
2666 module_exit(gemini_ethernet_module_exit);
2667
2668 MODULE_AUTHOR("Linus Walleij <linus.walleij@linaro.org>");
2669 MODULE_DESCRIPTION("StorLink SL351x (Gemini) ethernet driver");
2670 MODULE_LICENSE("GPL");
2671 MODULE_ALIAS("platform:" DRV_NAME);
2672