1 /* SPDX-License-Identifier: GPL-2.0-only */ 2 /* 3 * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved. 4 */ 5 6 #ifndef __IRIS_BUFFER_H__ 7 #define __IRIS_BUFFER_H__ 8 9 #include <media/videobuf2-v4l2.h> 10 11 struct iris_inst; 12 13 #define to_iris_buffer(ptr) container_of(ptr, struct iris_buffer, vb2) 14 15 /** 16 * enum iris_buffer_type 17 * 18 * @BUF_INPUT: input buffer to the iris hardware 19 * @BUF_OUTPUT: output buffer from the iris hardware 20 * @BUF_BIN: buffer to store intermediate bin data 21 * @BUF_ARP: buffer for auto register programming 22 * @BUF_COMV: buffer to store colocated motion vectors 23 * @BUF_NON_COMV: buffer to hold config data for HW 24 * @BUF_LINE: buffer to store decoding/encoding context data for HW 25 * @BUF_DPB: buffer to store display picture buffers for reference 26 * @BUF_PERSIST: buffer to store session context data 27 * @BUF_SCRATCH_1: buffer to store decoding/encoding context data for HW 28 * @BUF_TYPE_MAX: max buffer types 29 */ 30 enum iris_buffer_type { 31 BUF_INPUT = 1, 32 BUF_OUTPUT, 33 BUF_BIN, 34 BUF_ARP, 35 BUF_COMV, 36 BUF_NON_COMV, 37 BUF_LINE, 38 BUF_DPB, 39 BUF_PERSIST, 40 BUF_SCRATCH_1, 41 BUF_TYPE_MAX, 42 }; 43 44 /* 45 * enum iris_buffer_attributes 46 * 47 * BUF_ATTR_DEFERRED: buffer queued by client but not submitted to firmware. 48 * BUF_ATTR_PENDING_RELEASE: buffers requested to be released from firmware. 49 * BUF_ATTR_QUEUED: buffers submitted to firmware. 50 * BUF_ATTR_DEQUEUED: buffers received from firmware. 51 * BUF_ATTR_BUFFER_DONE: buffers sent back to vb2. 52 */ 53 enum iris_buffer_attributes { 54 BUF_ATTR_DEFERRED = BIT(0), 55 BUF_ATTR_PENDING_RELEASE = BIT(1), 56 BUF_ATTR_QUEUED = BIT(2), 57 BUF_ATTR_DEQUEUED = BIT(3), 58 BUF_ATTR_BUFFER_DONE = BIT(4), 59 }; 60 61 /** 62 * struct iris_buffer 63 * 64 * @vb2: v4l2 vb2 buffer 65 * @list: list head for the iris_buffers structure 66 * @inst: iris instance structure 67 * @type: enum for type of iris buffer 68 * @index: identifier for the iris buffer 69 * @fd: file descriptor of the buffer 70 * @buffer_size: accessible buffer size in bytes starting from addr_offset 71 * @data_offset: accessible buffer offset from base address 72 * @data_size: data size in bytes 73 * @device_addr: device address of the buffer 74 * @kvaddr: kernel virtual address of the buffer 75 * @dma_attrs: dma attributes 76 * @flags: buffer flags. It is represented as bit masks. 77 * @timestamp: timestamp of the buffer in nano seconds (ns) 78 * @attr: enum for iris buffer attributes 79 */ 80 struct iris_buffer { 81 struct vb2_v4l2_buffer vb2; 82 struct list_head list; 83 struct iris_inst *inst; 84 enum iris_buffer_type type; 85 u32 index; 86 int fd; 87 size_t buffer_size; 88 u32 data_offset; 89 size_t data_size; 90 dma_addr_t device_addr; 91 void *kvaddr; 92 unsigned long dma_attrs; 93 u32 flags; /* V4L2_BUF_FLAG_* */ 94 u64 timestamp; 95 enum iris_buffer_attributes attr; 96 }; 97 98 struct iris_buffers { 99 struct list_head list; 100 u32 min_count; 101 u32 size; 102 }; 103 104 int iris_get_buffer_size(struct iris_inst *inst, enum iris_buffer_type buffer_type); 105 void iris_get_internal_buffers(struct iris_inst *inst, u32 plane); 106 int iris_create_internal_buffers(struct iris_inst *inst, u32 plane); 107 int iris_queue_internal_buffers(struct iris_inst *inst, u32 plane); 108 int iris_destroy_internal_buffer(struct iris_inst *inst, struct iris_buffer *buffer); 109 int iris_destroy_internal_buffers(struct iris_inst *inst, u32 plane); 110 int iris_alloc_and_queue_persist_bufs(struct iris_inst *inst); 111 int iris_alloc_and_queue_input_int_bufs(struct iris_inst *inst); 112 int iris_queue_buffer(struct iris_inst *inst, struct iris_buffer *buf); 113 int iris_queue_deferred_buffers(struct iris_inst *inst, enum iris_buffer_type buf_type); 114 int iris_vb2_buffer_done(struct iris_inst *inst, struct iris_buffer *buf); 115 void iris_vb2_queue_error(struct iris_inst *inst); 116 117 #endif 118