1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
2 /* Copyright (c) 2015 - 2021 Intel Corporation */
3 #ifndef IRDMA_MAIN_H
4 #define IRDMA_MAIN_H
5
6 #include <linux/ip.h>
7 #include <linux/tcp.h>
8 #include <linux/if_vlan.h>
9 #include <net/addrconf.h>
10 #include <net/netevent.h>
11 #include <net/tcp.h>
12 #include <net/ip6_route.h>
13 #include <net/flow.h>
14 #include <net/secure_seq.h>
15 #include <linux/netdevice.h>
16 #include <linux/etherdevice.h>
17 #include <linux/inetdevice.h>
18 #include <linux/spinlock.h>
19 #include <linux/kernel.h>
20 #include <linux/delay.h>
21 #include <linux/pci.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/workqueue.h>
24 #include <linux/slab.h>
25 #include <linux/io.h>
26 #include <linux/crc32c.h>
27 #include <linux/kthread.h>
28 #ifndef CONFIG_64BIT
29 #include <linux/io-64-nonatomic-lo-hi.h>
30 #endif
31 #include <linux/auxiliary_bus.h>
32 #include <linux/net/intel/iidc.h>
33 #include <rdma/ib_smi.h>
34 #include <rdma/ib_verbs.h>
35 #include <rdma/ib_pack.h>
36 #include <rdma/rdma_cm.h>
37 #include <rdma/iw_cm.h>
38 #include <rdma/ib_user_verbs.h>
39 #include <rdma/ib_umem.h>
40 #include <rdma/ib_cache.h>
41 #include <rdma/uverbs_ioctl.h>
42 #include "osdep.h"
43 #include "defs.h"
44 #include "hmc.h"
45 #include "type.h"
46 #include "ws.h"
47 #include "protos.h"
48 #include "pble.h"
49 #include "cm.h"
50 #include <rdma/irdma-abi.h>
51 #include "verbs.h"
52 #include "user.h"
53 #include "puda.h"
54
55 extern struct auxiliary_driver i40iw_auxiliary_drv;
56
57 #define IRDMA_FW_VER_DEFAULT 2
58 #define IRDMA_HW_VER 2
59
60 #define IRDMA_ARP_ADD 1
61 #define IRDMA_ARP_DELETE 2
62 #define IRDMA_ARP_RESOLVE 3
63
64 #define IRDMA_MACIP_ADD 1
65 #define IRDMA_MACIP_DELETE 2
66
67 #define IW_CCQ_SIZE (IRDMA_CQP_SW_SQSIZE_2048 + 1)
68 #define IW_CEQ_SIZE 2048
69 #define IW_AEQ_SIZE 2048
70
71 #define RX_BUF_SIZE (1536 + 8)
72 #define IW_REG0_SIZE (4 * 1024)
73 #define IW_TX_TIMEOUT (6 * HZ)
74 #define IW_FIRST_QPN 1
75
76 #define IW_SW_CONTEXT_ALIGN 1024
77
78 #define MAX_DPC_ITERATIONS 128
79
80 #define IRDMA_EVENT_TIMEOUT_MS 5000
81 #define IRDMA_VCHNL_EVENT_TIMEOUT 100000
82 #define IRDMA_RST_TIMEOUT_HZ 4
83
84 #define IRDMA_NO_QSET 0xffff
85
86 #define IW_CFG_FPM_QP_COUNT 32768
87 #define IRDMA_MAX_PAGES_PER_FMR 262144
88 #define IRDMA_MIN_PAGES_PER_FMR 1
89 #define IRDMA_CQP_COMPL_RQ_WQE_FLUSHED 2
90 #define IRDMA_CQP_COMPL_SQ_WQE_FLUSHED 3
91
92 #define IRDMA_Q_TYPE_PE_AEQ 0x80
93 #define IRDMA_Q_INVALID_IDX 0xffff
94 #define IRDMA_REM_ENDPOINT_TRK_QPID 3
95
96 #define IRDMA_DRV_OPT_ENA_MPA_VER_0 0x00000001
97 #define IRDMA_DRV_OPT_DISABLE_MPA_CRC 0x00000002
98 #define IRDMA_DRV_OPT_DISABLE_FIRST_WRITE 0x00000004
99 #define IRDMA_DRV_OPT_DISABLE_INTF 0x00000008
100 #define IRDMA_DRV_OPT_ENA_MSI 0x00000010
101 #define IRDMA_DRV_OPT_DUAL_LOGICAL_PORT 0x00000020
102 #define IRDMA_DRV_OPT_NO_INLINE_DATA 0x00000080
103 #define IRDMA_DRV_OPT_DISABLE_INT_MOD 0x00000100
104 #define IRDMA_DRV_OPT_DISABLE_VIRT_WQ 0x00000200
105 #define IRDMA_DRV_OPT_ENA_PAU 0x00000400
106 #define IRDMA_DRV_OPT_MCAST_LOGPORT_MAP 0x00000800
107
108 #define IW_HMC_OBJ_TYPE_NUM ARRAY_SIZE(iw_hmc_obj_types)
109 #define IRDMA_ROCE_CWND_DEFAULT 0x400
110 #define IRDMA_ROCE_ACKCREDS_DEFAULT 0x1E
111
112 #define IRDMA_FLUSH_SQ BIT(0)
113 #define IRDMA_FLUSH_RQ BIT(1)
114 #define IRDMA_REFLUSH BIT(2)
115 #define IRDMA_FLUSH_WAIT BIT(3)
116
117 #define IRDMA_IRQ_NAME_STR_LEN (64)
118
119 #define IRDMA_NUM_AEQ_MSIX 1
120 #define IRDMA_MIN_MSIX 2
121
122 enum init_completion_state {
123 INVALID_STATE = 0,
124 INITIAL_STATE,
125 CQP_CREATED,
126 HMC_OBJS_CREATED,
127 HW_RSRC_INITIALIZED,
128 CCQ_CREATED,
129 CEQ0_CREATED, /* Last state of probe */
130 ILQ_CREATED,
131 IEQ_CREATED,
132 CEQS_CREATED,
133 PBLE_CHUNK_MEM,
134 AEQ_CREATED,
135 IP_ADDR_REGISTERED, /* Last state of open */
136 };
137
138 struct irdma_rsrc_limits {
139 u32 qplimit;
140 u32 mrlimit;
141 u32 cqlimit;
142 };
143
144 struct irdma_cqp_err_info {
145 u16 maj;
146 u16 min;
147 const char *desc;
148 };
149
150 struct irdma_cqp_compl_info {
151 u32 op_ret_val;
152 u16 maj_err_code;
153 u16 min_err_code;
154 bool error;
155 u8 op_code;
156 };
157
158 struct irdma_cqp_request {
159 struct cqp_cmds_info info;
160 wait_queue_head_t waitq;
161 struct list_head list;
162 refcount_t refcnt;
163 void (*callback_fcn)(struct irdma_cqp_request *cqp_request);
164 void *param;
165 struct irdma_cqp_compl_info compl_info;
166 bool request_done; /* READ/WRITE_ONCE macros operate on it */
167 bool waiting:1;
168 bool dynamic:1;
169 };
170
171 struct irdma_cqp {
172 struct irdma_sc_cqp sc_cqp;
173 spinlock_t req_lock; /* protect CQP request list */
174 spinlock_t compl_lock; /* protect CQP completion processing */
175 wait_queue_head_t waitq;
176 wait_queue_head_t remove_wq;
177 struct irdma_dma_mem sq;
178 struct irdma_dma_mem host_ctx;
179 u64 *scratch_array;
180 struct irdma_cqp_request *cqp_requests;
181 struct list_head cqp_avail_reqs;
182 struct list_head cqp_pending_reqs;
183 };
184
185 struct irdma_ccq {
186 struct irdma_sc_cq sc_cq;
187 struct irdma_dma_mem mem_cq;
188 struct irdma_dma_mem shadow_area;
189 };
190
191 struct irdma_ceq {
192 struct irdma_sc_ceq sc_ceq;
193 struct irdma_dma_mem mem;
194 u32 irq;
195 u32 msix_idx;
196 struct irdma_pci_f *rf;
197 struct tasklet_struct dpc_tasklet;
198 spinlock_t ce_lock; /* sync cq destroy with cq completion event notification */
199 };
200
201 struct irdma_aeq {
202 struct irdma_sc_aeq sc_aeq;
203 struct irdma_dma_mem mem;
204 struct irdma_pble_alloc palloc;
205 bool virtual_map;
206 };
207
208 struct irdma_arp_entry {
209 u32 ip_addr[4];
210 u8 mac_addr[ETH_ALEN];
211 };
212
213 struct irdma_msix_vector {
214 u32 idx;
215 u32 irq;
216 u32 cpu_affinity;
217 u32 ceq_id;
218 cpumask_t mask;
219 char name[IRDMA_IRQ_NAME_STR_LEN];
220 };
221
222 struct irdma_mc_table_info {
223 u32 mgn;
224 u32 dest_ip[4];
225 bool lan_fwd:1;
226 bool ipv4_valid:1;
227 };
228
229 struct mc_table_list {
230 struct list_head list;
231 struct irdma_mc_table_info mc_info;
232 struct irdma_mcast_grp_info mc_grp_ctx;
233 };
234
235 struct irdma_qv_info {
236 u32 v_idx; /* msix_vector */
237 u16 ceq_idx;
238 u16 aeq_idx;
239 u8 itr_idx;
240 };
241
242 struct irdma_qvlist_info {
243 u32 num_vectors;
244 struct irdma_qv_info qv_info[] __counted_by(num_vectors);
245 };
246
247 struct irdma_gen_ops {
248 void (*request_reset)(struct irdma_pci_f *rf);
249 int (*register_qset)(struct irdma_sc_vsi *vsi,
250 struct irdma_ws_node *tc_node);
251 void (*unregister_qset)(struct irdma_sc_vsi *vsi,
252 struct irdma_ws_node *tc_node);
253 };
254
255 struct irdma_pci_f {
256 bool reset:1;
257 bool rsrc_created:1;
258 bool msix_shared:1;
259 u8 rsrc_profile;
260 u8 *hmc_info_mem;
261 u8 *mem_rsrc;
262 u8 rdma_ver;
263 u8 rst_to;
264 u8 pf_id;
265 enum irdma_protocol_used protocol_used;
266 u32 sd_type;
267 u32 msix_count;
268 u32 max_mr;
269 u32 max_qp;
270 u32 max_cq;
271 u32 max_ah;
272 u32 next_ah;
273 u32 max_mcg;
274 u32 next_mcg;
275 u32 max_pd;
276 u32 next_qp;
277 u32 next_cq;
278 u32 next_pd;
279 u32 max_mr_size;
280 u32 max_cqe;
281 u32 mr_stagmask;
282 u32 used_pds;
283 u32 used_cqs;
284 u32 used_mrs;
285 u32 used_qps;
286 u32 arp_table_size;
287 u32 next_arp_index;
288 u32 ceqs_count;
289 u32 next_ws_node_id;
290 u32 max_ws_node_id;
291 u32 limits_sel;
292 unsigned long *allocated_ws_nodes;
293 unsigned long *allocated_qps;
294 unsigned long *allocated_cqs;
295 unsigned long *allocated_mrs;
296 unsigned long *allocated_pds;
297 unsigned long *allocated_mcgs;
298 unsigned long *allocated_ahs;
299 unsigned long *allocated_arps;
300 enum init_completion_state init_state;
301 struct irdma_sc_dev sc_dev;
302 struct pci_dev *pcidev;
303 void *cdev;
304 struct irdma_hw hw;
305 struct irdma_cqp cqp;
306 struct irdma_ccq ccq;
307 struct irdma_aeq aeq;
308 struct irdma_ceq *ceqlist;
309 struct irdma_hmc_pble_rsrc *pble_rsrc;
310 struct irdma_arp_entry *arp_table;
311 spinlock_t arp_lock; /*protect ARP table access*/
312 spinlock_t rsrc_lock; /* protect HW resource array access */
313 spinlock_t qptable_lock; /*protect QP table access*/
314 spinlock_t cqtable_lock; /*protect CQ table access*/
315 struct irdma_qp **qp_table;
316 struct irdma_cq **cq_table;
317 spinlock_t qh_list_lock; /* protect mc_qht_list */
318 struct mc_table_list mc_qht_list;
319 struct irdma_msix_vector *iw_msixtbl;
320 struct irdma_qvlist_info *iw_qvlist;
321 struct tasklet_struct dpc_tasklet;
322 struct msix_entry *msix_entries;
323 struct irdma_dma_mem obj_mem;
324 struct irdma_dma_mem obj_next;
325 atomic_t vchnl_msgs;
326 wait_queue_head_t vchnl_waitq;
327 struct workqueue_struct *cqp_cmpl_wq;
328 struct work_struct cqp_cmpl_work;
329 struct irdma_sc_vsi default_vsi;
330 void *back_fcn;
331 struct irdma_gen_ops gen_ops;
332 struct irdma_device *iwdev;
333 };
334
335 struct irdma_device {
336 struct ib_device ibdev;
337 struct irdma_pci_f *rf;
338 struct net_device *netdev;
339 struct workqueue_struct *cleanup_wq;
340 struct irdma_sc_vsi vsi;
341 struct irdma_cm_core cm_core;
342 DECLARE_HASHTABLE(ah_hash_tbl, 8);
343 struct mutex ah_tbl_lock; /* protect AH hash table access */
344 u32 roce_cwnd;
345 u32 roce_ackcreds;
346 u32 vendor_id;
347 u32 vendor_part_id;
348 u32 push_mode;
349 u32 rcv_wnd;
350 u16 mac_ip_table_idx;
351 u16 vsi_num;
352 u8 rcv_wscale;
353 u8 iw_status;
354 bool roce_mode:1;
355 bool roce_dcqcn_en:1;
356 bool dcb_vlan_mode:1;
357 bool iw_ooo:1;
358 enum init_completion_state init_state;
359
360 wait_queue_head_t suspend_wq;
361 };
362
to_iwdev(struct ib_device * ibdev)363 static inline struct irdma_device *to_iwdev(struct ib_device *ibdev)
364 {
365 return container_of(ibdev, struct irdma_device, ibdev);
366 }
367
to_ucontext(struct ib_ucontext * ibucontext)368 static inline struct irdma_ucontext *to_ucontext(struct ib_ucontext *ibucontext)
369 {
370 return container_of(ibucontext, struct irdma_ucontext, ibucontext);
371 }
372
373 static inline struct irdma_user_mmap_entry *
to_irdma_mmap_entry(struct rdma_user_mmap_entry * rdma_entry)374 to_irdma_mmap_entry(struct rdma_user_mmap_entry *rdma_entry)
375 {
376 return container_of(rdma_entry, struct irdma_user_mmap_entry,
377 rdma_entry);
378 }
379
to_iwpd(struct ib_pd * ibpd)380 static inline struct irdma_pd *to_iwpd(struct ib_pd *ibpd)
381 {
382 return container_of(ibpd, struct irdma_pd, ibpd);
383 }
384
to_iwah(struct ib_ah * ibah)385 static inline struct irdma_ah *to_iwah(struct ib_ah *ibah)
386 {
387 return container_of(ibah, struct irdma_ah, ibah);
388 }
389
to_iwmr(struct ib_mr * ibmr)390 static inline struct irdma_mr *to_iwmr(struct ib_mr *ibmr)
391 {
392 return container_of(ibmr, struct irdma_mr, ibmr);
393 }
394
to_iwmw(struct ib_mw * ibmw)395 static inline struct irdma_mr *to_iwmw(struct ib_mw *ibmw)
396 {
397 return container_of(ibmw, struct irdma_mr, ibmw);
398 }
399
to_iwcq(struct ib_cq * ibcq)400 static inline struct irdma_cq *to_iwcq(struct ib_cq *ibcq)
401 {
402 return container_of(ibcq, struct irdma_cq, ibcq);
403 }
404
to_iwqp(struct ib_qp * ibqp)405 static inline struct irdma_qp *to_iwqp(struct ib_qp *ibqp)
406 {
407 return container_of(ibqp, struct irdma_qp, ibqp);
408 }
409
dev_to_rf(struct irdma_sc_dev * dev)410 static inline struct irdma_pci_f *dev_to_rf(struct irdma_sc_dev *dev)
411 {
412 return container_of(dev, struct irdma_pci_f, sc_dev);
413 }
414
415 /**
416 * irdma_alloc_resource - allocate a resource
417 * @iwdev: device pointer
418 * @resource_array: resource bit array:
419 * @max_resources: maximum resource number
420 * @req_resources_num: Allocated resource number
421 * @next: next free id
422 **/
irdma_alloc_rsrc(struct irdma_pci_f * rf,unsigned long * rsrc_array,u32 max_rsrc,u32 * req_rsrc_num,u32 * next)423 static inline int irdma_alloc_rsrc(struct irdma_pci_f *rf,
424 unsigned long *rsrc_array, u32 max_rsrc,
425 u32 *req_rsrc_num, u32 *next)
426 {
427 u32 rsrc_num;
428 unsigned long flags;
429
430 spin_lock_irqsave(&rf->rsrc_lock, flags);
431 rsrc_num = find_next_zero_bit(rsrc_array, max_rsrc, *next);
432 if (rsrc_num >= max_rsrc) {
433 rsrc_num = find_first_zero_bit(rsrc_array, max_rsrc);
434 if (rsrc_num >= max_rsrc) {
435 spin_unlock_irqrestore(&rf->rsrc_lock, flags);
436 ibdev_dbg(&rf->iwdev->ibdev,
437 "ERR: resource [%d] allocation failed\n",
438 rsrc_num);
439 return -EOVERFLOW;
440 }
441 }
442 __set_bit(rsrc_num, rsrc_array);
443 *next = rsrc_num + 1;
444 if (*next == max_rsrc)
445 *next = 0;
446 *req_rsrc_num = rsrc_num;
447 spin_unlock_irqrestore(&rf->rsrc_lock, flags);
448
449 return 0;
450 }
451
452 /**
453 * irdma_free_resource - free a resource
454 * @iwdev: device pointer
455 * @resource_array: resource array for the resource_num
456 * @resource_num: resource number to free
457 **/
irdma_free_rsrc(struct irdma_pci_f * rf,unsigned long * rsrc_array,u32 rsrc_num)458 static inline void irdma_free_rsrc(struct irdma_pci_f *rf,
459 unsigned long *rsrc_array, u32 rsrc_num)
460 {
461 unsigned long flags;
462
463 spin_lock_irqsave(&rf->rsrc_lock, flags);
464 __clear_bit(rsrc_num, rsrc_array);
465 spin_unlock_irqrestore(&rf->rsrc_lock, flags);
466 }
467
468 int irdma_ctrl_init_hw(struct irdma_pci_f *rf);
469 void irdma_ctrl_deinit_hw(struct irdma_pci_f *rf);
470 int irdma_rt_init_hw(struct irdma_device *iwdev,
471 struct irdma_l2params *l2params);
472 void irdma_rt_deinit_hw(struct irdma_device *iwdev);
473 void irdma_qp_add_ref(struct ib_qp *ibqp);
474 void irdma_qp_rem_ref(struct ib_qp *ibqp);
475 void irdma_free_lsmm_rsrc(struct irdma_qp *iwqp);
476 struct ib_qp *irdma_get_qp(struct ib_device *ibdev, int qpn);
477 void irdma_flush_wqes(struct irdma_qp *iwqp, u32 flush_mask);
478 void irdma_manage_arp_cache(struct irdma_pci_f *rf,
479 const unsigned char *mac_addr,
480 u32 *ip_addr, bool ipv4, u32 action);
481 struct irdma_apbvt_entry *irdma_add_apbvt(struct irdma_device *iwdev, u16 port);
482 void irdma_del_apbvt(struct irdma_device *iwdev,
483 struct irdma_apbvt_entry *entry);
484 struct irdma_cqp_request *irdma_alloc_and_get_cqp_request(struct irdma_cqp *cqp,
485 bool wait);
486 void irdma_free_cqp_request(struct irdma_cqp *cqp,
487 struct irdma_cqp_request *cqp_request);
488 void irdma_put_cqp_request(struct irdma_cqp *cqp,
489 struct irdma_cqp_request *cqp_request);
490 int irdma_alloc_local_mac_entry(struct irdma_pci_f *rf, u16 *mac_tbl_idx);
491 int irdma_add_local_mac_entry(struct irdma_pci_f *rf, const u8 *mac_addr, u16 idx);
492 void irdma_del_local_mac_entry(struct irdma_pci_f *rf, u16 idx);
493
494 u32 irdma_initialize_hw_rsrc(struct irdma_pci_f *rf);
495 void irdma_port_ibevent(struct irdma_device *iwdev);
496 void irdma_cm_disconn(struct irdma_qp *qp);
497
498 bool irdma_cqp_crit_err(struct irdma_sc_dev *dev, u8 cqp_cmd,
499 u16 maj_err_code, u16 min_err_code);
500 int irdma_handle_cqp_op(struct irdma_pci_f *rf,
501 struct irdma_cqp_request *cqp_request);
502
503 int irdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask,
504 struct ib_udata *udata);
505 int irdma_modify_qp_roce(struct ib_qp *ibqp, struct ib_qp_attr *attr,
506 int attr_mask, struct ib_udata *udata);
507 void irdma_cq_add_ref(struct ib_cq *ibcq);
508 void irdma_cq_rem_ref(struct ib_cq *ibcq);
509 void irdma_cq_wq_destroy(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
510
511 void irdma_cleanup_pending_cqp_op(struct irdma_pci_f *rf);
512 int irdma_hw_modify_qp(struct irdma_device *iwdev, struct irdma_qp *iwqp,
513 struct irdma_modify_qp_info *info, bool wait);
514 int irdma_qp_suspend_resume(struct irdma_sc_qp *qp, bool suspend);
515 int irdma_manage_qhash(struct irdma_device *iwdev, struct irdma_cm_info *cminfo,
516 enum irdma_quad_entry_type etype,
517 enum irdma_quad_hash_manage_type mtype, void *cmnode,
518 bool wait);
519 void irdma_receive_ilq(struct irdma_sc_vsi *vsi, struct irdma_puda_buf *rbuf);
520 void irdma_free_sqbuf(struct irdma_sc_vsi *vsi, void *bufp);
521 void irdma_free_qp_rsrc(struct irdma_qp *iwqp);
522 int irdma_setup_cm_core(struct irdma_device *iwdev, u8 ver);
523 void irdma_cleanup_cm_core(struct irdma_cm_core *cm_core);
524 void irdma_next_iw_state(struct irdma_qp *iwqp, u8 state, u8 del_hash, u8 term,
525 u8 term_len);
526 int irdma_send_syn(struct irdma_cm_node *cm_node, u32 sendack);
527 int irdma_send_reset(struct irdma_cm_node *cm_node);
528 struct irdma_cm_node *irdma_find_node(struct irdma_cm_core *cm_core,
529 u16 rem_port, u32 *rem_addr, u16 loc_port,
530 u32 *loc_addr, u16 vlan_id);
531 int irdma_hw_flush_wqes(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
532 struct irdma_qp_flush_info *info, bool wait);
533 void irdma_gen_ae(struct irdma_pci_f *rf, struct irdma_sc_qp *qp,
534 struct irdma_gen_ae_info *info, bool wait);
535 void irdma_copy_ip_ntohl(u32 *dst, __be32 *src);
536 void irdma_copy_ip_htonl(__be32 *dst, u32 *src);
537 u16 irdma_get_vlan_ipv4(u32 *addr);
538 void irdma_get_vlan_mac_ipv6(u32 *addr, u16 *vlan_id, u8 *mac);
539 struct ib_mr *irdma_reg_phys_mr(struct ib_pd *ib_pd, u64 addr, u64 size,
540 int acc, u64 *iova_start);
541 int irdma_upload_qp_context(struct irdma_qp *iwqp, bool freeze, bool raw);
542 void irdma_cqp_ce_handler(struct irdma_pci_f *rf, struct irdma_sc_cq *cq);
543 int irdma_ah_cqp_op(struct irdma_pci_f *rf, struct irdma_sc_ah *sc_ah, u8 cmd,
544 bool wait,
545 void (*callback_fcn)(struct irdma_cqp_request *cqp_request),
546 void *cb_param);
547 void irdma_gsi_ud_qp_ah_cb(struct irdma_cqp_request *cqp_request);
548 bool irdma_cq_empty(struct irdma_cq *iwcq);
549 int irdma_inetaddr_event(struct notifier_block *notifier, unsigned long event,
550 void *ptr);
551 int irdma_inet6addr_event(struct notifier_block *notifier, unsigned long event,
552 void *ptr);
553 int irdma_net_event(struct notifier_block *notifier, unsigned long event,
554 void *ptr);
555 int irdma_netdevice_event(struct notifier_block *notifier, unsigned long event,
556 void *ptr);
557 void irdma_add_ip(struct irdma_device *iwdev);
558 void cqp_compl_worker(struct work_struct *work);
559 #endif /* IRDMA_MAIN_H */
560