1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright 2021 Google LLC.
4 *
5 * Driver for Semtech's SX9360 capacitive proximity/button solution.
6 * Based on SX9360 driver and copy of datasheet at:
7 * https://edit.wpgdadawant.com/uploads/news_file/program/2019/30184/tech_files/program_30184_suggest_other_file.pdf
8 */
9
10 #include <linux/bits.h>
11 #include <linux/bitfield.h>
12 #include <linux/delay.h>
13 #include <linux/i2c.h>
14 #include <linux/interrupt.h>
15 #include <linux/kernel.h>
16 #include <linux/log2.h>
17 #include <linux/mod_devicetable.h>
18 #include <linux/module.h>
19 #include <linux/pm.h>
20 #include <linux/property.h>
21 #include <linux/regmap.h>
22
23 #include <linux/iio/iio.h>
24
25 #include "sx_common.h"
26
27 /* Nominal Oscillator Frequency. */
28 #define SX9360_FOSC_MHZ 4
29 #define SX9360_FOSC_HZ (SX9360_FOSC_MHZ * 1000000)
30
31 /* Register definitions. */
32 #define SX9360_REG_IRQ_SRC SX_COMMON_REG_IRQ_SRC
33 #define SX9360_REG_STAT 0x01
34 #define SX9360_REG_STAT_COMPSTAT_MASK GENMASK(2, 1)
35 #define SX9360_REG_IRQ_MSK 0x02
36 #define SX9360_CONVDONE_IRQ BIT(0)
37 #define SX9360_FAR_IRQ BIT(2)
38 #define SX9360_CLOSE_IRQ BIT(3)
39 #define SX9360_REG_IRQ_CFG 0x03
40
41 #define SX9360_REG_GNRL_CTRL0 0x10
42 #define SX9360_REG_GNRL_CTRL0_PHEN_MASK GENMASK(1, 0)
43 #define SX9360_REG_GNRL_CTRL1 0x11
44 #define SX9360_REG_GNRL_CTRL1_SCANPERIOD_MASK GENMASK(2, 0)
45 #define SX9360_REG_GNRL_CTRL2 0x12
46 #define SX9360_REG_GNRL_CTRL2_PERIOD_102MS 0x32
47 #define SX9360_REG_GNRL_REG_2_PERIOD_MS(_r) \
48 (((_r) * 8192) / (SX9360_FOSC_HZ / 1000))
49 #define SX9360_REG_GNRL_FREQ_2_REG(_f) (((_f) * 8192) / SX9360_FOSC_HZ)
50 #define SX9360_REG_GNRL_REG_2_FREQ(_r) (SX9360_FOSC_HZ / ((_r) * 8192))
51
52 #define SX9360_REG_AFE_CTRL1 0x21
53 #define SX9360_REG_AFE_CTRL1_RESFILTIN_MASK GENMASK(3, 0)
54 #define SX9360_REG_AFE_CTRL1_RESFILTIN_0OHMS 0
55 #define SX9360_REG_AFE_PARAM0_PHR 0x22
56 #define SX9360_REG_AFE_PARAM1_PHR 0x23
57 #define SX9360_REG_AFE_PARAM0_PHM 0x24
58 #define SX9360_REG_AFE_PARAM0_RSVD 0x08
59 #define SX9360_REG_AFE_PARAM0_RESOLUTION_MASK GENMASK(2, 0)
60 #define SX9360_REG_AFE_PARAM0_RESOLUTION_128 0x02
61 #define SX9360_REG_AFE_PARAM1_PHM 0x25
62 #define SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF 0x40
63 #define SX9360_REG_AFE_PARAM1_FREQ_83_33HZ 0x06
64
65 #define SX9360_REG_PROX_CTRL0_PHR 0x40
66 #define SX9360_REG_PROX_CTRL0_PHM 0x41
67 #define SX9360_REG_PROX_CTRL0_GAIN_MASK GENMASK(5, 3)
68 #define SX9360_REG_PROX_CTRL0_GAIN_1 0x80
69 #define SX9360_REG_PROX_CTRL0_RAWFILT_MASK GENMASK(2, 0)
70 #define SX9360_REG_PROX_CTRL0_RAWFILT_1P50 0x01
71 #define SX9360_REG_PROX_CTRL1 0x42
72 #define SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_MASK GENMASK(5, 3)
73 #define SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_16K 0x20
74 #define SX9360_REG_PROX_CTRL2 0x43
75 #define SX9360_REG_PROX_CTRL2_AVGDEB_MASK GENMASK(7, 6)
76 #define SX9360_REG_PROX_CTRL2_AVGDEB_2SAMPLES 0x40
77 #define SX9360_REG_PROX_CTRL2_AVGPOS_THRESH_16K 0x20
78 #define SX9360_REG_PROX_CTRL3 0x44
79 #define SX9360_REG_PROX_CTRL3_AVGNEG_FILT_MASK GENMASK(5, 3)
80 #define SX9360_REG_PROX_CTRL3_AVGNEG_FILT_2 0x08
81 #define SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK GENMASK(2, 0)
82 #define SX9360_REG_PROX_CTRL3_AVGPOS_FILT_256 0x04
83 #define SX9360_REG_PROX_CTRL4 0x45
84 #define SX9360_REG_PROX_CTRL4_HYST_MASK GENMASK(5, 4)
85 #define SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK GENMASK(3, 2)
86 #define SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK GENMASK(1, 0)
87 #define SX9360_REG_PROX_CTRL5 0x46
88 #define SX9360_REG_PROX_CTRL5_PROXTHRESH_32 0x08
89
90 #define SX9360_REG_REF_CORR0 0x60
91 #define SX9360_REG_REF_CORR1 0x61
92
93 #define SX9360_REG_USEFUL_PHR_MSB 0x90
94 #define SX9360_REG_USEFUL_PHR_LSB 0x91
95
96 #define SX9360_REG_OFFSET_PMR_MSB 0x92
97 #define SX9360_REG_OFFSET_PMR_LSB 0x93
98
99 #define SX9360_REG_USEFUL_PHM_MSB 0x94
100 #define SX9360_REG_USEFUL_PHM_LSB 0x95
101
102 #define SX9360_REG_AVG_PHM_MSB 0x96
103 #define SX9360_REG_AVG_PHM_LSB 0x97
104
105 #define SX9360_REG_DIFF_PHM_MSB 0x98
106 #define SX9360_REG_DIFF_PHM_LSB 0x99
107
108 #define SX9360_REG_OFFSET_PHM_MSB 0x9a
109 #define SX9360_REG_OFFSET_PHM_LSB 0x9b
110
111 #define SX9360_REG_USE_FILTER_MSB 0x9a
112 #define SX9360_REG_USE_FILTER_LSB 0x9b
113
114 #define SX9360_REG_RESET 0xcf
115 /* Write this to REG_RESET to do a soft reset. */
116 #define SX9360_SOFT_RESET 0xde
117
118 #define SX9360_REG_WHOAMI 0xfa
119 #define SX9360_WHOAMI_VALUE 0x60
120
121 #define SX9360_REG_REVISION 0xfe
122
123 /* 2 channels, Phase Reference and Measurement. */
124 #define SX9360_NUM_CHANNELS 2
125
126 static const struct iio_chan_spec sx9360_channels[] = {
127 {
128 .type = IIO_PROXIMITY,
129 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
130 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
131 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
132 .info_mask_separate_available =
133 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
134 .info_mask_shared_by_all_available =
135 BIT(IIO_CHAN_INFO_SAMP_FREQ),
136 .indexed = 1,
137 .address = SX9360_REG_USEFUL_PHR_MSB,
138 .channel = 0,
139 .scan_index = 0,
140 .scan_type = {
141 .sign = 's',
142 .realbits = 12,
143 .storagebits = 16,
144 .endianness = IIO_BE,
145 },
146 },
147 {
148 .type = IIO_PROXIMITY,
149 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
150 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
151 .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),
152 .info_mask_separate_available =
153 BIT(IIO_CHAN_INFO_HARDWAREGAIN),
154 .info_mask_shared_by_all_available =
155 BIT(IIO_CHAN_INFO_SAMP_FREQ),
156 .indexed = 1,
157 .address = SX9360_REG_USEFUL_PHM_MSB,
158 .event_spec = sx_common_events,
159 .num_event_specs = ARRAY_SIZE(sx_common_events),
160 .channel = 1,
161 .scan_index = 1,
162 .scan_type = {
163 .sign = 's',
164 .realbits = 12,
165 .storagebits = 16,
166 .endianness = IIO_BE,
167 },
168 },
169 IIO_CHAN_SOFT_TIMESTAMP(2),
170 };
171
172 /*
173 * Each entry contains the integer part (val) and the fractional part, in micro
174 * seconds. It conforms to the IIO output IIO_VAL_INT_PLUS_MICRO.
175 *
176 * The frequency control register holds the period, with a ~2ms increment.
177 * Therefore the smallest frequency is 4MHz / (2047 * 8192),
178 * The fastest is 4MHz / 8192.
179 * The interval is not linear, but given there is 2047 possible value,
180 * Returns the fake increment of (Max-Min)/2047
181 */
182 static const struct {
183 int val;
184 int val2;
185 } sx9360_samp_freq_interval[] = {
186 { 0, 281250 }, /* 4MHz / (8192 * 2047) */
187 { 0, 281250 },
188 { 448, 281250 }, /* 4MHz / 8192 */
189 };
190
191 static const struct regmap_range sx9360_writable_reg_ranges[] = {
192 /*
193 * To set COMPSTAT for compensation, even if datasheet says register is
194 * RO.
195 */
196 regmap_reg_range(SX9360_REG_STAT, SX9360_REG_IRQ_CFG),
197 regmap_reg_range(SX9360_REG_GNRL_CTRL0, SX9360_REG_GNRL_CTRL2),
198 regmap_reg_range(SX9360_REG_AFE_CTRL1, SX9360_REG_AFE_PARAM1_PHM),
199 regmap_reg_range(SX9360_REG_PROX_CTRL0_PHR, SX9360_REG_PROX_CTRL5),
200 regmap_reg_range(SX9360_REG_REF_CORR0, SX9360_REG_REF_CORR1),
201 regmap_reg_range(SX9360_REG_OFFSET_PMR_MSB, SX9360_REG_OFFSET_PMR_LSB),
202 regmap_reg_range(SX9360_REG_RESET, SX9360_REG_RESET),
203 };
204
205 static const struct regmap_access_table sx9360_writeable_regs = {
206 .yes_ranges = sx9360_writable_reg_ranges,
207 .n_yes_ranges = ARRAY_SIZE(sx9360_writable_reg_ranges),
208 };
209
210 /*
211 * All allocated registers are readable, so we just list unallocated
212 * ones.
213 */
214 static const struct regmap_range sx9360_non_readable_reg_ranges[] = {
215 regmap_reg_range(SX9360_REG_IRQ_CFG + 1, SX9360_REG_GNRL_CTRL0 - 1),
216 regmap_reg_range(SX9360_REG_GNRL_CTRL2 + 1, SX9360_REG_AFE_CTRL1 - 1),
217 regmap_reg_range(SX9360_REG_AFE_PARAM1_PHM + 1,
218 SX9360_REG_PROX_CTRL0_PHR - 1),
219 regmap_reg_range(SX9360_REG_PROX_CTRL5 + 1, SX9360_REG_REF_CORR0 - 1),
220 regmap_reg_range(SX9360_REG_REF_CORR1 + 1,
221 SX9360_REG_USEFUL_PHR_MSB - 1),
222 regmap_reg_range(SX9360_REG_USE_FILTER_LSB + 1, SX9360_REG_RESET - 1),
223 regmap_reg_range(SX9360_REG_RESET + 1, SX9360_REG_WHOAMI - 1),
224 regmap_reg_range(SX9360_REG_WHOAMI + 1, SX9360_REG_REVISION - 1),
225 };
226
227 static const struct regmap_access_table sx9360_readable_regs = {
228 .no_ranges = sx9360_non_readable_reg_ranges,
229 .n_no_ranges = ARRAY_SIZE(sx9360_non_readable_reg_ranges),
230 };
231
232 static const struct regmap_range sx9360_volatile_reg_ranges[] = {
233 regmap_reg_range(SX9360_REG_IRQ_SRC, SX9360_REG_STAT),
234 regmap_reg_range(SX9360_REG_USEFUL_PHR_MSB, SX9360_REG_USE_FILTER_LSB),
235 regmap_reg_range(SX9360_REG_WHOAMI, SX9360_REG_WHOAMI),
236 regmap_reg_range(SX9360_REG_REVISION, SX9360_REG_REVISION),
237 };
238
239 static const struct regmap_access_table sx9360_volatile_regs = {
240 .yes_ranges = sx9360_volatile_reg_ranges,
241 .n_yes_ranges = ARRAY_SIZE(sx9360_volatile_reg_ranges),
242 };
243
244 static const struct regmap_config sx9360_regmap_config = {
245 .reg_bits = 8,
246 .val_bits = 8,
247
248 .max_register = SX9360_REG_REVISION,
249 .cache_type = REGCACHE_RBTREE,
250
251 .wr_table = &sx9360_writeable_regs,
252 .rd_table = &sx9360_readable_regs,
253 .volatile_table = &sx9360_volatile_regs,
254 };
255
sx9360_read_prox_data(struct sx_common_data * data,const struct iio_chan_spec * chan,__be16 * val)256 static int sx9360_read_prox_data(struct sx_common_data *data,
257 const struct iio_chan_spec *chan,
258 __be16 *val)
259 {
260 return regmap_bulk_read(data->regmap, chan->address, val, sizeof(*val));
261 }
262
263 /*
264 * If we have no interrupt support, we have to wait for a scan period
265 * after enabling a channel to get a result.
266 */
sx9360_wait_for_sample(struct sx_common_data * data)267 static int sx9360_wait_for_sample(struct sx_common_data *data)
268 {
269 int ret;
270 __be16 buf;
271
272 ret = regmap_bulk_read(data->regmap, SX9360_REG_GNRL_CTRL1,
273 &buf, sizeof(buf));
274 if (ret < 0)
275 return ret;
276 msleep(SX9360_REG_GNRL_REG_2_PERIOD_MS(be16_to_cpu(buf)));
277
278 return 0;
279 }
280
sx9360_read_gain(struct sx_common_data * data,const struct iio_chan_spec * chan,int * val)281 static int sx9360_read_gain(struct sx_common_data *data,
282 const struct iio_chan_spec *chan, int *val)
283 {
284 unsigned int reg, regval;
285 int ret;
286
287 reg = SX9360_REG_PROX_CTRL0_PHR + chan->channel;
288 ret = regmap_read(data->regmap, reg, ®val);
289 if (ret)
290 return ret;
291
292 *val = 1 << FIELD_GET(SX9360_REG_PROX_CTRL0_GAIN_MASK, regval);
293
294 return IIO_VAL_INT;
295 }
296
sx9360_read_samp_freq(struct sx_common_data * data,int * val,int * val2)297 static int sx9360_read_samp_freq(struct sx_common_data *data,
298 int *val, int *val2)
299 {
300 int ret, divisor;
301 __be16 buf;
302
303 ret = regmap_bulk_read(data->regmap, SX9360_REG_GNRL_CTRL1,
304 &buf, sizeof(buf));
305 if (ret < 0)
306 return ret;
307 divisor = be16_to_cpu(buf);
308 if (divisor == 0) {
309 *val = 0;
310 return IIO_VAL_INT;
311 }
312
313 *val = SX9360_FOSC_HZ;
314 *val2 = divisor * 8192;
315
316 return IIO_VAL_FRACTIONAL;
317 }
318
sx9360_read_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int * val,int * val2,long mask)319 static int sx9360_read_raw(struct iio_dev *indio_dev,
320 const struct iio_chan_spec *chan,
321 int *val, int *val2, long mask)
322 {
323 struct sx_common_data *data = iio_priv(indio_dev);
324 int ret;
325
326 switch (mask) {
327 case IIO_CHAN_INFO_RAW:
328 if (!iio_device_claim_direct(indio_dev))
329 return -EBUSY;
330
331 ret = sx_common_read_proximity(data, chan, val);
332 iio_device_release_direct(indio_dev);
333 return ret;
334 case IIO_CHAN_INFO_HARDWAREGAIN:
335 if (!iio_device_claim_direct(indio_dev))
336 return -EBUSY;
337
338 ret = sx9360_read_gain(data, chan, val);
339 iio_device_release_direct(indio_dev);
340 return ret;
341 case IIO_CHAN_INFO_SAMP_FREQ:
342 return sx9360_read_samp_freq(data, val, val2);
343 default:
344 return -EINVAL;
345 }
346 }
347
348 static const char *sx9360_channel_labels[SX9360_NUM_CHANNELS] = {
349 "reference", "main",
350 };
351
sx9360_read_label(struct iio_dev * iio_dev,const struct iio_chan_spec * chan,char * label)352 static int sx9360_read_label(struct iio_dev *iio_dev, const struct iio_chan_spec *chan,
353 char *label)
354 {
355 return sysfs_emit(label, "%s\n", sx9360_channel_labels[chan->channel]);
356 }
357
358 static const int sx9360_gain_vals[] = { 1, 2, 4, 8 };
359
sx9360_read_avail(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,const int ** vals,int * type,int * length,long mask)360 static int sx9360_read_avail(struct iio_dev *indio_dev,
361 struct iio_chan_spec const *chan,
362 const int **vals, int *type, int *length,
363 long mask)
364 {
365 if (chan->type != IIO_PROXIMITY)
366 return -EINVAL;
367
368 switch (mask) {
369 case IIO_CHAN_INFO_HARDWAREGAIN:
370 *type = IIO_VAL_INT;
371 *length = ARRAY_SIZE(sx9360_gain_vals);
372 *vals = sx9360_gain_vals;
373 return IIO_AVAIL_LIST;
374 case IIO_CHAN_INFO_SAMP_FREQ:
375 *type = IIO_VAL_INT_PLUS_MICRO;
376 *length = ARRAY_SIZE(sx9360_samp_freq_interval) * 2;
377 *vals = (int *)sx9360_samp_freq_interval;
378 return IIO_AVAIL_RANGE;
379 default:
380 return -EINVAL;
381 }
382 }
383
sx9360_set_samp_freq(struct sx_common_data * data,int val,int val2)384 static int sx9360_set_samp_freq(struct sx_common_data *data,
385 int val, int val2)
386 {
387 int reg;
388 __be16 buf;
389
390 reg = val * 8192 / SX9360_FOSC_HZ + val2 * 8192 / (SX9360_FOSC_MHZ);
391 buf = cpu_to_be16(reg);
392 guard(mutex)(&data->mutex);
393
394 return regmap_bulk_write(data->regmap, SX9360_REG_GNRL_CTRL1, &buf,
395 sizeof(buf));
396 }
397
sx9360_read_thresh(struct sx_common_data * data,int * val)398 static int sx9360_read_thresh(struct sx_common_data *data, int *val)
399 {
400 unsigned int regval;
401 int ret;
402
403 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL5, ®val);
404 if (ret)
405 return ret;
406
407 if (regval <= 1)
408 *val = regval;
409 else
410 *val = (regval * regval) / 2;
411
412 return IIO_VAL_INT;
413 }
414
sx9360_read_hysteresis(struct sx_common_data * data,int * val)415 static int sx9360_read_hysteresis(struct sx_common_data *data, int *val)
416 {
417 unsigned int regval, pthresh;
418 int ret;
419
420 ret = sx9360_read_thresh(data, &pthresh);
421 if (ret < 0)
422 return ret;
423
424 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL4, ®val);
425 if (ret)
426 return ret;
427
428 regval = FIELD_GET(SX9360_REG_PROX_CTRL4_HYST_MASK, regval);
429 if (!regval)
430 *val = 0;
431 else
432 *val = pthresh >> (5 - regval);
433
434 return IIO_VAL_INT;
435 }
436
sx9360_read_far_debounce(struct sx_common_data * data,int * val)437 static int sx9360_read_far_debounce(struct sx_common_data *data, int *val)
438 {
439 unsigned int regval;
440 int ret;
441
442 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL4, ®val);
443 if (ret)
444 return ret;
445
446 regval = FIELD_GET(SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK, regval);
447 if (regval)
448 *val = 1 << regval;
449 else
450 *val = 0;
451
452 return IIO_VAL_INT;
453 }
454
sx9360_read_close_debounce(struct sx_common_data * data,int * val)455 static int sx9360_read_close_debounce(struct sx_common_data *data, int *val)
456 {
457 unsigned int regval;
458 int ret;
459
460 ret = regmap_read(data->regmap, SX9360_REG_PROX_CTRL4, ®val);
461 if (ret)
462 return ret;
463
464 regval = FIELD_GET(SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK, regval);
465 if (regval)
466 *val = 1 << regval;
467 else
468 *val = 0;
469
470 return IIO_VAL_INT;
471 }
472
sx9360_read_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int * val,int * val2)473 static int sx9360_read_event_val(struct iio_dev *indio_dev,
474 const struct iio_chan_spec *chan,
475 enum iio_event_type type,
476 enum iio_event_direction dir,
477 enum iio_event_info info, int *val, int *val2)
478 {
479 struct sx_common_data *data = iio_priv(indio_dev);
480
481 if (chan->type != IIO_PROXIMITY)
482 return -EINVAL;
483
484 switch (info) {
485 case IIO_EV_INFO_VALUE:
486 return sx9360_read_thresh(data, val);
487 case IIO_EV_INFO_PERIOD:
488 switch (dir) {
489 case IIO_EV_DIR_RISING:
490 return sx9360_read_far_debounce(data, val);
491 case IIO_EV_DIR_FALLING:
492 return sx9360_read_close_debounce(data, val);
493 default:
494 return -EINVAL;
495 }
496 case IIO_EV_INFO_HYSTERESIS:
497 return sx9360_read_hysteresis(data, val);
498 default:
499 return -EINVAL;
500 }
501 }
502
sx9360_write_thresh(struct sx_common_data * data,int _val)503 static int sx9360_write_thresh(struct sx_common_data *data, int _val)
504 {
505 unsigned int val = _val;
506
507 if (val >= 1)
508 val = int_sqrt(2 * val);
509
510 if (val > 0xff)
511 return -EINVAL;
512
513 guard(mutex)(&data->mutex);
514 return regmap_write(data->regmap, SX9360_REG_PROX_CTRL5, val);
515 }
516
sx9360_write_hysteresis(struct sx_common_data * data,int _val)517 static int sx9360_write_hysteresis(struct sx_common_data *data, int _val)
518 {
519 unsigned int hyst, val = _val;
520 int ret, pthresh;
521
522 ret = sx9360_read_thresh(data, &pthresh);
523 if (ret < 0)
524 return ret;
525
526 if (val == 0)
527 hyst = 0;
528 else if (val >= pthresh >> 2)
529 hyst = 3;
530 else if (val >= pthresh >> 3)
531 hyst = 2;
532 else if (val >= pthresh >> 4)
533 hyst = 1;
534 else
535 return -EINVAL;
536
537 hyst = FIELD_PREP(SX9360_REG_PROX_CTRL4_HYST_MASK, hyst);
538 guard(mutex)(&data->mutex);
539 return regmap_update_bits(data->regmap, SX9360_REG_PROX_CTRL4,
540 SX9360_REG_PROX_CTRL4_HYST_MASK, hyst);
541 }
542
sx9360_write_far_debounce(struct sx_common_data * data,int _val)543 static int sx9360_write_far_debounce(struct sx_common_data *data, int _val)
544 {
545 unsigned int regval, val = _val;
546
547 if (val > 0)
548 val = ilog2(val);
549 if (!FIELD_FIT(SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK, val))
550 return -EINVAL;
551
552 regval = FIELD_PREP(SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK, val);
553
554 guard(mutex)(&data->mutex);
555 return regmap_update_bits(data->regmap, SX9360_REG_PROX_CTRL4,
556 SX9360_REG_PROX_CTRL4_FAR_DEBOUNCE_MASK,
557 regval);
558 }
559
sx9360_write_close_debounce(struct sx_common_data * data,int _val)560 static int sx9360_write_close_debounce(struct sx_common_data *data, int _val)
561 {
562 unsigned int regval, val = _val;
563
564 if (val > 0)
565 val = ilog2(val);
566 if (!FIELD_FIT(SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK, val))
567 return -EINVAL;
568
569 regval = FIELD_PREP(SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK, val);
570
571 guard(mutex)(&data->mutex);
572 return regmap_update_bits(data->regmap, SX9360_REG_PROX_CTRL4,
573 SX9360_REG_PROX_CTRL4_CLOSE_DEBOUNCE_MASK,
574 regval);
575 }
576
sx9360_write_event_val(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,enum iio_event_type type,enum iio_event_direction dir,enum iio_event_info info,int val,int val2)577 static int sx9360_write_event_val(struct iio_dev *indio_dev,
578 const struct iio_chan_spec *chan,
579 enum iio_event_type type,
580 enum iio_event_direction dir,
581 enum iio_event_info info, int val, int val2)
582 {
583 struct sx_common_data *data = iio_priv(indio_dev);
584
585 if (chan->type != IIO_PROXIMITY)
586 return -EINVAL;
587
588 switch (info) {
589 case IIO_EV_INFO_VALUE:
590 return sx9360_write_thresh(data, val);
591 case IIO_EV_INFO_PERIOD:
592 switch (dir) {
593 case IIO_EV_DIR_RISING:
594 return sx9360_write_far_debounce(data, val);
595 case IIO_EV_DIR_FALLING:
596 return sx9360_write_close_debounce(data, val);
597 default:
598 return -EINVAL;
599 }
600 case IIO_EV_INFO_HYSTERESIS:
601 return sx9360_write_hysteresis(data, val);
602 default:
603 return -EINVAL;
604 }
605 }
606
sx9360_write_gain(struct sx_common_data * data,const struct iio_chan_spec * chan,int val)607 static int sx9360_write_gain(struct sx_common_data *data,
608 const struct iio_chan_spec *chan, int val)
609 {
610 unsigned int gain, reg;
611
612 gain = ilog2(val);
613 reg = SX9360_REG_PROX_CTRL0_PHR + chan->channel;
614 gain = FIELD_PREP(SX9360_REG_PROX_CTRL0_GAIN_MASK, gain);
615
616 guard(mutex)(&data->mutex);
617 return regmap_update_bits(data->regmap, reg,
618 SX9360_REG_PROX_CTRL0_GAIN_MASK,
619 gain);
620 }
621
sx9360_write_raw(struct iio_dev * indio_dev,const struct iio_chan_spec * chan,int val,int val2,long mask)622 static int sx9360_write_raw(struct iio_dev *indio_dev,
623 const struct iio_chan_spec *chan, int val, int val2,
624 long mask)
625 {
626 struct sx_common_data *data = iio_priv(indio_dev);
627
628 switch (mask) {
629 case IIO_CHAN_INFO_SAMP_FREQ:
630 return sx9360_set_samp_freq(data, val, val2);
631 case IIO_CHAN_INFO_HARDWAREGAIN:
632 return sx9360_write_gain(data, chan, val);
633 default:
634 return -EINVAL;
635 }
636 }
637
638 static const struct sx_common_reg_default sx9360_default_regs[] = {
639 { SX9360_REG_IRQ_MSK, 0x00 },
640 { SX9360_REG_IRQ_CFG, 0x00, "irq_cfg" },
641 /*
642 * The lower 2 bits should not be set as it enable sensors measurements.
643 * Turning the detection on before the configuration values are set to
644 * good values can cause the device to return erroneous readings.
645 */
646 { SX9360_REG_GNRL_CTRL0, 0x00, "gnrl_ctrl0" },
647 { SX9360_REG_GNRL_CTRL1, 0x00, "gnrl_ctrl1" },
648 { SX9360_REG_GNRL_CTRL2, SX9360_REG_GNRL_CTRL2_PERIOD_102MS, "gnrl_ctrl2" },
649
650 { SX9360_REG_AFE_CTRL1, SX9360_REG_AFE_CTRL1_RESFILTIN_0OHMS, "afe_ctrl0" },
651 { SX9360_REG_AFE_PARAM0_PHR, SX9360_REG_AFE_PARAM0_RSVD |
652 SX9360_REG_AFE_PARAM0_RESOLUTION_128, "afe_param0_phr" },
653 { SX9360_REG_AFE_PARAM1_PHR, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF |
654 SX9360_REG_AFE_PARAM1_FREQ_83_33HZ, "afe_param1_phr" },
655 { SX9360_REG_AFE_PARAM0_PHM, SX9360_REG_AFE_PARAM0_RSVD |
656 SX9360_REG_AFE_PARAM0_RESOLUTION_128, "afe_param0_phm" },
657 { SX9360_REG_AFE_PARAM1_PHM, SX9360_REG_AFE_PARAM1_AGAIN_PHM_6PF |
658 SX9360_REG_AFE_PARAM1_FREQ_83_33HZ, "afe_param1_phm" },
659
660 { SX9360_REG_PROX_CTRL0_PHR, SX9360_REG_PROX_CTRL0_GAIN_1 |
661 SX9360_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl0_phr" },
662 { SX9360_REG_PROX_CTRL0_PHM, SX9360_REG_PROX_CTRL0_GAIN_1 |
663 SX9360_REG_PROX_CTRL0_RAWFILT_1P50, "prox_ctrl0_phm" },
664 { SX9360_REG_PROX_CTRL1, SX9360_REG_PROX_CTRL1_AVGNEG_THRESH_16K, "prox_ctrl1" },
665 { SX9360_REG_PROX_CTRL2, SX9360_REG_PROX_CTRL2_AVGDEB_2SAMPLES |
666 SX9360_REG_PROX_CTRL2_AVGPOS_THRESH_16K, "prox_ctrl2" },
667 { SX9360_REG_PROX_CTRL3, SX9360_REG_PROX_CTRL3_AVGNEG_FILT_2 |
668 SX9360_REG_PROX_CTRL3_AVGPOS_FILT_256, "prox_ctrl3" },
669 { SX9360_REG_PROX_CTRL4, 0x00, "prox_ctrl4" },
670 { SX9360_REG_PROX_CTRL5, SX9360_REG_PROX_CTRL5_PROXTHRESH_32, "prox_ctrl5" },
671 };
672
673 /* Activate all channels and perform an initial compensation. */
sx9360_init_compensation(struct iio_dev * indio_dev)674 static int sx9360_init_compensation(struct iio_dev *indio_dev)
675 {
676 struct sx_common_data *data = iio_priv(indio_dev);
677 unsigned int val;
678 int ret;
679
680 /* run the compensation phase on all channels */
681 ret = regmap_set_bits(data->regmap, SX9360_REG_STAT,
682 SX9360_REG_STAT_COMPSTAT_MASK);
683 if (ret)
684 return ret;
685
686 return regmap_read_poll_timeout(data->regmap, SX9360_REG_STAT, val,
687 !(val & SX9360_REG_STAT_COMPSTAT_MASK),
688 20000, 2000000);
689 }
690
691 static const struct sx_common_reg_default *
sx9360_get_default_reg(struct device * dev,int idx,struct sx_common_reg_default * reg_def)692 sx9360_get_default_reg(struct device *dev, int idx,
693 struct sx_common_reg_default *reg_def)
694 {
695 u32 raw = 0, pos = 0;
696 int ret;
697
698 memcpy(reg_def, &sx9360_default_regs[idx], sizeof(*reg_def));
699 switch (reg_def->reg) {
700 case SX9360_REG_AFE_CTRL1:
701 ret = device_property_read_u32(dev,
702 "semtech,input-precharge-resistor-ohms",
703 &raw);
704 if (ret)
705 break;
706
707 reg_def->def &= ~SX9360_REG_AFE_CTRL1_RESFILTIN_MASK;
708 reg_def->def |= FIELD_PREP(SX9360_REG_AFE_CTRL1_RESFILTIN_MASK,
709 raw / 2000);
710 break;
711 case SX9360_REG_AFE_PARAM0_PHR:
712 case SX9360_REG_AFE_PARAM0_PHM:
713 ret = device_property_read_u32(dev, "semtech,resolution", &raw);
714 if (ret)
715 break;
716
717 raw = ilog2(raw) - 3;
718
719 reg_def->def &= ~SX9360_REG_AFE_PARAM0_RESOLUTION_MASK;
720 reg_def->def |= FIELD_PREP(SX9360_REG_AFE_PARAM0_RESOLUTION_MASK, raw);
721 break;
722 case SX9360_REG_PROX_CTRL0_PHR:
723 case SX9360_REG_PROX_CTRL0_PHM:
724 ret = device_property_read_u32(dev, "semtech,proxraw-strength", &raw);
725 if (ret)
726 break;
727
728 reg_def->def &= ~SX9360_REG_PROX_CTRL0_RAWFILT_MASK;
729 reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL0_RAWFILT_MASK, raw);
730 break;
731 case SX9360_REG_PROX_CTRL3:
732 ret = device_property_read_u32(dev, "semtech,avg-pos-strength",
733 &pos);
734 if (ret)
735 break;
736
737 /* Powers of 2, except for a gap between 16 and 64 */
738 raw = clamp(ilog2(pos), 3, 11) - (pos >= 32 ? 4 : 3);
739 reg_def->def &= ~SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK;
740 reg_def->def |= FIELD_PREP(SX9360_REG_PROX_CTRL3_AVGPOS_FILT_MASK, raw);
741 break;
742 }
743
744 return reg_def;
745 }
746
sx9360_check_whoami(struct device * dev,struct iio_dev * indio_dev)747 static int sx9360_check_whoami(struct device *dev, struct iio_dev *indio_dev)
748 {
749 /*
750 * Only one sensor for this driver. Assuming the device tree
751 * is correct, just set the sensor name.
752 */
753 indio_dev->name = "sx9360";
754 return 0;
755 }
756
757 static const struct sx_common_chip_info sx9360_chip_info = {
758 .reg_stat = SX9360_REG_STAT,
759 .reg_irq_msk = SX9360_REG_IRQ_MSK,
760 .reg_enable_chan = SX9360_REG_GNRL_CTRL0,
761 .reg_reset = SX9360_REG_RESET,
762
763 .mask_enable_chan = SX9360_REG_GNRL_CTRL0_PHEN_MASK,
764 .stat_offset = 2,
765 .num_channels = SX9360_NUM_CHANNELS,
766 .num_default_regs = ARRAY_SIZE(sx9360_default_regs),
767
768 .ops = {
769 .read_prox_data = sx9360_read_prox_data,
770 .check_whoami = sx9360_check_whoami,
771 .init_compensation = sx9360_init_compensation,
772 .wait_for_sample = sx9360_wait_for_sample,
773 .get_default_reg = sx9360_get_default_reg,
774 },
775
776 .iio_channels = sx9360_channels,
777 .num_iio_channels = ARRAY_SIZE(sx9360_channels),
778 .iio_info = {
779 .read_raw = sx9360_read_raw,
780 .read_avail = sx9360_read_avail,
781 .read_label = sx9360_read_label,
782 .read_event_value = sx9360_read_event_val,
783 .write_event_value = sx9360_write_event_val,
784 .write_raw = sx9360_write_raw,
785 .read_event_config = sx_common_read_event_config,
786 .write_event_config = sx_common_write_event_config,
787 },
788 };
789
sx9360_probe(struct i2c_client * client)790 static int sx9360_probe(struct i2c_client *client)
791 {
792 return sx_common_probe(client, &sx9360_chip_info, &sx9360_regmap_config);
793 }
794
sx9360_suspend(struct device * dev)795 static int sx9360_suspend(struct device *dev)
796 {
797 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
798 unsigned int regval;
799 int ret;
800
801 disable_irq_nosync(data->client->irq);
802
803 guard(mutex)(&data->mutex);
804 ret = regmap_read(data->regmap, SX9360_REG_GNRL_CTRL0, ®val);
805 if (ret < 0)
806 return ret;
807
808 data->suspend_ctrl =
809 FIELD_GET(SX9360_REG_GNRL_CTRL0_PHEN_MASK, regval);
810
811
812 /* Disable all phases, send the device to sleep. */
813 return regmap_write(data->regmap, SX9360_REG_GNRL_CTRL0, 0);
814 }
815
sx9360_resume(struct device * dev)816 static int sx9360_resume(struct device *dev)
817 {
818 struct sx_common_data *data = iio_priv(dev_get_drvdata(dev));
819
820 scoped_guard(mutex, &data->mutex) {
821 int ret = regmap_update_bits(data->regmap,
822 SX9360_REG_GNRL_CTRL0,
823 SX9360_REG_GNRL_CTRL0_PHEN_MASK,
824 data->suspend_ctrl);
825 if (ret)
826 return ret;
827 }
828 enable_irq(data->client->irq);
829 return 0;
830 }
831
832 static DEFINE_SIMPLE_DEV_PM_OPS(sx9360_pm_ops, sx9360_suspend, sx9360_resume);
833
834 static const struct acpi_device_id sx9360_acpi_match[] = {
835 { "STH9360", SX9360_WHOAMI_VALUE },
836 { "SAMM0208", SX9360_WHOAMI_VALUE },
837 { }
838 };
839 MODULE_DEVICE_TABLE(acpi, sx9360_acpi_match);
840
841 static const struct of_device_id sx9360_of_match[] = {
842 { .compatible = "semtech,sx9360", (void *)SX9360_WHOAMI_VALUE },
843 { }
844 };
845 MODULE_DEVICE_TABLE(of, sx9360_of_match);
846
847 static const struct i2c_device_id sx9360_id[] = {
848 {"sx9360", SX9360_WHOAMI_VALUE },
849 { }
850 };
851 MODULE_DEVICE_TABLE(i2c, sx9360_id);
852
853 static struct i2c_driver sx9360_driver = {
854 .driver = {
855 .name = "sx9360",
856 .acpi_match_table = sx9360_acpi_match,
857 .of_match_table = sx9360_of_match,
858 .pm = pm_sleep_ptr(&sx9360_pm_ops),
859
860 /*
861 * Lots of i2c transfers in probe + over 200 ms waiting in
862 * sx9360_init_compensation() mean a slow probe; prefer async
863 * so we don't delay boot if we're builtin to the kernel.
864 */
865 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
866 },
867 .probe = sx9360_probe,
868 .id_table = sx9360_id,
869 };
870 module_i2c_driver(sx9360_driver);
871
872 MODULE_AUTHOR("Gwendal Grignou <gwendal@chromium.org>");
873 MODULE_DESCRIPTION("Driver for Semtech SX9360 proximity sensor");
874 MODULE_LICENSE("GPL v2");
875 MODULE_IMPORT_NS("SEMTECH_PROX");
876