1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * AMD MP2 common macros and structures
4  *
5  * Copyright (c) 2022, Advanced Micro Devices, Inc.
6  * All Rights Reserved.
7  *
8  * Author: Basavaraj Natikar <Basavaraj.Natikar@amd.com>
9  */
10 #ifndef AMD_SFH_COMMON_H
11 #define AMD_SFH_COMMON_H
12 
13 #include <linux/pci.h>
14 #include "amd_sfh_hid.h"
15 
16 #define PCI_DEVICE_ID_AMD_MP2		0x15E4
17 #define PCI_DEVICE_ID_AMD_MP2_1_1	0x164A
18 
19 #define AMD_C2P_MSG(regno) (0x10500 + ((regno) * 4))
20 #define AMD_P2C_MSG(regno) (0x10680 + ((regno) * 4))
21 
22 #define AMD_C2P_MSG_V1(regno) (0x10900 + ((regno) * 4))
23 #define AMD_P2C_MSG_V1(regno) (0x10500 + ((regno) * 4))
24 
25 #define SENSOR_ENABLED			4
26 #define SENSOR_DISABLED			5
27 
28 #define AMD_SFH_IDLE_LOOP		200
29 
30 enum cmd_id {
31 	NO_OP,
32 	ENABLE_SENSOR,
33 	DISABLE_SENSOR,
34 	STOP_ALL_SENSORS = 8,
35 };
36 
37 struct amd_mp2_sensor_info {
38 	u8 sensor_idx;
39 	u32 period;
40 	dma_addr_t dma_address;
41 };
42 
43 struct sfh_dev_status {
44 	bool is_hpd_present;
45 	bool is_hpd_enabled;
46 	bool is_als_present;
47 	bool is_sra_present;
48 };
49 
50 struct amd_mp2_dev {
51 	struct pci_dev *pdev;
52 	struct amdtp_cl_data *cl_data;
53 	void __iomem *mmio;
54 	void __iomem *vsbase;
55 	const struct amd_sfh1_1_ops *sfh1_1_ops;
56 	struct amd_mp2_ops *mp2_ops;
57 	struct amd_input_data in_data;
58 	/* mp2 active control status */
59 	u32 mp2_acs;
60 	struct sfh_dev_status dev_en;
61 	struct work_struct work;
62 	u8 init_done;
63 	u8 rver;
64 };
65 
66 struct amd_mp2_ops {
67 	void (*start)(struct amd_mp2_dev *privdata, struct amd_mp2_sensor_info info);
68 	void (*stop)(struct amd_mp2_dev *privdata, u16 sensor_idx);
69 	void (*stop_all)(struct amd_mp2_dev *privdata);
70 	int (*response)(struct amd_mp2_dev *mp2, u8 sid, u32 sensor_sts);
71 	void (*clear_intr)(struct amd_mp2_dev *privdata);
72 	int (*init_intr)(struct amd_mp2_dev *privdata);
73 	int (*discovery_status)(struct amd_mp2_dev *privdata);
74 	void (*suspend)(struct amd_mp2_dev *mp2);
75 	void (*resume)(struct amd_mp2_dev *mp2);
76 	void (*remove)(void *privdata);
77 	int (*get_rep_desc)(int sensor_idx, u8 rep_desc[]);
78 	u32 (*get_desc_sz)(int sensor_idx, int descriptor_name);
79 	u8 (*get_feat_rep)(int sensor_idx, int report_id, u8 *feature_report);
80 	u8 (*get_in_rep)(u8 current_index, int sensor_idx, int report_id,
81 			 struct amd_input_data *in_data);
82 };
83 
84 void amd_sfh_work(struct work_struct *work);
85 void amd_sfh_work_buffer(struct work_struct *work);
86 void amd_sfh_clear_intr_v2(struct amd_mp2_dev *privdata);
87 int amd_sfh_irq_init_v2(struct amd_mp2_dev *privdata);
88 void amd_sfh_clear_intr(struct amd_mp2_dev *privdata);
89 int amd_sfh_irq_init(struct amd_mp2_dev *privdata);
90 
amd_get_c2p_val(struct amd_mp2_dev * mp2,u32 idx)91 static inline u64 amd_get_c2p_val(struct amd_mp2_dev *mp2, u32 idx)
92 {
93 	return mp2->rver == 1 ? AMD_C2P_MSG_V1(idx) :  AMD_C2P_MSG(idx);
94 }
95 
amd_get_p2c_val(struct amd_mp2_dev * mp2,u32 idx)96 static inline u64 amd_get_p2c_val(struct amd_mp2_dev *mp2, u32 idx)
97 {
98 	return mp2->rver == 1 ? AMD_P2C_MSG_V1(idx) :  AMD_P2C_MSG(idx);
99 }
100 #endif
101