1 /* SPDX-License-Identifier: MIT */
2 /*
3 * Copyright © 2022 Intel Corporation
4 */
5 #ifndef _XE_SA_H_
6 #define _XE_SA_H_
7
8 #include <linux/sizes.h>
9 #include <linux/types.h>
10 #include "xe_sa_types.h"
11
12 struct dma_fence;
13 struct xe_tile;
14
15 struct xe_sa_manager *__xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 guard, u32 align);
16 struct drm_suballoc *__xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size, gfp_t gfp);
17
xe_sa_bo_manager_init(struct xe_tile * tile,u32 size,u32 align)18 static inline struct xe_sa_manager *xe_sa_bo_manager_init(struct xe_tile *tile, u32 size, u32 align)
19 {
20 return __xe_sa_bo_manager_init(tile, size, SZ_4K, align);
21 }
22
23 /**
24 * xe_sa_bo_new() - Make a suballocation.
25 * @sa_manager: the &xe_sa_manager
26 * @size: number of bytes we want to suballocate
27 *
28 * Try to make a suballocation of size @size.
29 *
30 * Return: a &drm_suballoc, or an ERR_PTR.
31 */
xe_sa_bo_new(struct xe_sa_manager * sa_manager,u32 size)32 static inline struct drm_suballoc *xe_sa_bo_new(struct xe_sa_manager *sa_manager, u32 size)
33 {
34 return __xe_sa_bo_new(sa_manager, size, GFP_KERNEL);
35 }
36
37 void xe_sa_bo_flush_write(struct drm_suballoc *sa_bo);
38 void xe_sa_bo_free(struct drm_suballoc *sa_bo, struct dma_fence *fence);
39
40 static inline struct xe_sa_manager *
to_xe_sa_manager(struct drm_suballoc_manager * mng)41 to_xe_sa_manager(struct drm_suballoc_manager *mng)
42 {
43 return container_of(mng, struct xe_sa_manager, base);
44 }
45
xe_sa_bo_gpu_addr(struct drm_suballoc * sa)46 static inline u64 xe_sa_bo_gpu_addr(struct drm_suballoc *sa)
47 {
48 return to_xe_sa_manager(sa->manager)->gpu_addr +
49 drm_suballoc_soffset(sa);
50 }
51
xe_sa_bo_cpu_addr(struct drm_suballoc * sa)52 static inline void *xe_sa_bo_cpu_addr(struct drm_suballoc *sa)
53 {
54 return to_xe_sa_manager(sa->manager)->cpu_ptr +
55 drm_suballoc_soffset(sa);
56 }
57
58 #endif
59