1 /*
2 * Copyright 2012 Red Hat Inc.
3 * Parts based on xf86-video-ast
4 * Copyright (c) 2005 ASPEED Technology Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 *
26 */
27 /*
28 * Authors: Dave Airlie <airlied@redhat.com>
29 */
30
31 #include <linux/delay.h>
32 #include <linux/export.h>
33 #include <linux/pci.h>
34
35 #include <drm/drm_atomic.h>
36 #include <drm/drm_atomic_helper.h>
37 #include <drm/drm_crtc.h>
38 #include <drm/drm_damage_helper.h>
39 #include <drm/drm_format_helper.h>
40 #include <drm/drm_fourcc.h>
41 #include <drm/drm_gem_atomic_helper.h>
42 #include <drm/drm_gem_framebuffer_helper.h>
43 #include <drm/drm_gem_shmem_helper.h>
44 #include <drm/drm_managed.h>
45 #include <drm/drm_panic.h>
46 #include <drm/drm_probe_helper.h>
47
48 #include "ast_drv.h"
49 #include "ast_tables.h"
50 #include "ast_vbios.h"
51
52 #define AST_LUT_SIZE 256
53
ast_load_palette_index(struct ast_device * ast,u8 index,u8 red,u8 green,u8 blue)54 static inline void ast_load_palette_index(struct ast_device *ast,
55 u8 index, u8 red, u8 green,
56 u8 blue)
57 {
58 ast_io_write8(ast, AST_IO_VGADWR, index);
59 ast_io_read8(ast, AST_IO_VGASRI);
60 ast_io_write8(ast, AST_IO_VGAPDR, red);
61 ast_io_read8(ast, AST_IO_VGASRI);
62 ast_io_write8(ast, AST_IO_VGAPDR, green);
63 ast_io_read8(ast, AST_IO_VGASRI);
64 ast_io_write8(ast, AST_IO_VGAPDR, blue);
65 ast_io_read8(ast, AST_IO_VGASRI);
66 }
67
ast_crtc_set_gamma_linear(struct ast_device * ast,const struct drm_format_info * format)68 static void ast_crtc_set_gamma_linear(struct ast_device *ast,
69 const struct drm_format_info *format)
70 {
71 int i;
72
73 switch (format->format) {
74 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */
75 case DRM_FORMAT_RGB565:
76 case DRM_FORMAT_XRGB8888:
77 for (i = 0; i < AST_LUT_SIZE; i++)
78 ast_load_palette_index(ast, i, i, i, i);
79 break;
80 default:
81 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n",
82 &format->format);
83 break;
84 }
85 }
86
ast_crtc_set_gamma(struct ast_device * ast,const struct drm_format_info * format,struct drm_color_lut * lut)87 static void ast_crtc_set_gamma(struct ast_device *ast,
88 const struct drm_format_info *format,
89 struct drm_color_lut *lut)
90 {
91 int i;
92
93 switch (format->format) {
94 case DRM_FORMAT_C8: /* In this case, gamma table is used as color palette */
95 case DRM_FORMAT_RGB565:
96 case DRM_FORMAT_XRGB8888:
97 for (i = 0; i < AST_LUT_SIZE; i++)
98 ast_load_palette_index(ast, i,
99 lut[i].red >> 8,
100 lut[i].green >> 8,
101 lut[i].blue >> 8);
102 break;
103 default:
104 drm_warn_once(&ast->base, "Unsupported format %p4cc for gamma correction\n",
105 &format->format);
106 break;
107 }
108 }
109
ast_set_vbios_color_reg(struct ast_device * ast,const struct drm_format_info * format,const struct ast_vbios_enhtable * vmode)110 static void ast_set_vbios_color_reg(struct ast_device *ast,
111 const struct drm_format_info *format,
112 const struct ast_vbios_enhtable *vmode)
113 {
114 u32 color_index;
115
116 switch (format->cpp[0]) {
117 case 1:
118 color_index = VGAModeIndex - 1;
119 break;
120 case 2:
121 color_index = HiCModeIndex;
122 break;
123 case 3:
124 case 4:
125 color_index = TrueCModeIndex;
126 break;
127 default:
128 return;
129 }
130
131 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8c, (u8)((color_index & 0x0f) << 4));
132
133 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00);
134
135 if (vmode->flags & NewModeInfo) {
136 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8);
137 ast_set_index_reg(ast, AST_IO_VGACRI, 0x92, format->cpp[0] * 8);
138 }
139 }
140
ast_set_vbios_mode_reg(struct ast_device * ast,const struct drm_display_mode * adjusted_mode,const struct ast_vbios_enhtable * vmode)141 static void ast_set_vbios_mode_reg(struct ast_device *ast,
142 const struct drm_display_mode *adjusted_mode,
143 const struct ast_vbios_enhtable *vmode)
144 {
145 u32 refresh_rate_index, mode_id;
146
147 refresh_rate_index = vmode->refresh_rate_index;
148 mode_id = vmode->mode_id;
149
150 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8d, refresh_rate_index & 0xff);
151 ast_set_index_reg(ast, AST_IO_VGACRI, 0x8e, mode_id & 0xff);
152
153 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0x00);
154
155 if (vmode->flags & NewModeInfo) {
156 ast_set_index_reg(ast, AST_IO_VGACRI, 0x91, 0xa8);
157 ast_set_index_reg(ast, AST_IO_VGACRI, 0x93, adjusted_mode->clock / 1000);
158 ast_set_index_reg(ast, AST_IO_VGACRI, 0x94, adjusted_mode->crtc_hdisplay);
159 ast_set_index_reg(ast, AST_IO_VGACRI, 0x95, adjusted_mode->crtc_hdisplay >> 8);
160 ast_set_index_reg(ast, AST_IO_VGACRI, 0x96, adjusted_mode->crtc_vdisplay);
161 ast_set_index_reg(ast, AST_IO_VGACRI, 0x97, adjusted_mode->crtc_vdisplay >> 8);
162 }
163 }
164
ast_set_std_reg(struct ast_device * ast,struct drm_display_mode * mode,const struct ast_vbios_stdtable * stdtable)165 static void ast_set_std_reg(struct ast_device *ast,
166 struct drm_display_mode *mode,
167 const struct ast_vbios_stdtable *stdtable)
168 {
169 u32 i;
170 u8 jreg;
171
172 jreg = stdtable->misc;
173 ast_io_write8(ast, AST_IO_VGAMR_W, jreg);
174
175 /* Set SEQ; except Screen Disable field */
176 ast_set_index_reg(ast, AST_IO_VGASRI, 0x00, 0x03);
177 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0x20, stdtable->seq[0]);
178 for (i = 1; i < 4; i++) {
179 jreg = stdtable->seq[i];
180 ast_set_index_reg(ast, AST_IO_VGASRI, (i + 1), jreg);
181 }
182
183 /* Set CRTC; except base address and offset */
184 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00);
185 for (i = 0; i < 12; i++)
186 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);
187 for (i = 14; i < 19; i++)
188 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);
189 for (i = 20; i < 25; i++)
190 ast_set_index_reg(ast, AST_IO_VGACRI, i, stdtable->crtc[i]);
191
192 /* set AR */
193 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R);
194 for (i = 0; i < 20; i++) {
195 jreg = stdtable->ar[i];
196 ast_io_write8(ast, AST_IO_VGAARI_W, (u8)i);
197 ast_io_write8(ast, AST_IO_VGAARI_W, jreg);
198 }
199 ast_io_write8(ast, AST_IO_VGAARI_W, 0x14);
200 ast_io_write8(ast, AST_IO_VGAARI_W, 0x00);
201
202 jreg = ast_io_read8(ast, AST_IO_VGAIR1_R);
203 ast_io_write8(ast, AST_IO_VGAARI_W, 0x20);
204
205 /* Set GR */
206 for (i = 0; i < 9; i++)
207 ast_set_index_reg(ast, AST_IO_VGAGRI, i, stdtable->gr[i]);
208 }
209
ast_set_crtc_reg(struct ast_device * ast,struct drm_display_mode * mode,const struct ast_vbios_enhtable * vmode)210 static void ast_set_crtc_reg(struct ast_device *ast,
211 struct drm_display_mode *mode,
212 const struct ast_vbios_enhtable *vmode)
213 {
214 u8 jreg05 = 0, jreg07 = 0, jreg09 = 0, jregAC = 0, jregAD = 0, jregAE = 0;
215 u16 temp, precache = 0;
216
217 if ((IS_AST_GEN6(ast) || IS_AST_GEN7(ast)) &&
218 (vmode->flags & AST2500PreCatchCRT))
219 precache = 40;
220
221 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x00);
222
223 temp = (mode->crtc_htotal >> 3) - 5;
224 if (temp & 0x100)
225 jregAC |= 0x01; /* HT D[8] */
226 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x00, 0x00, temp);
227
228 temp = (mode->crtc_hdisplay >> 3) - 1;
229 if (temp & 0x100)
230 jregAC |= 0x04; /* HDE D[8] */
231 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x01, 0x00, temp);
232
233 temp = (mode->crtc_hblank_start >> 3) - 1;
234 if (temp & 0x100)
235 jregAC |= 0x10; /* HBS D[8] */
236 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x02, 0x00, temp);
237
238 temp = ((mode->crtc_hblank_end >> 3) - 1) & 0x7f;
239 if (temp & 0x20)
240 jreg05 |= 0x80; /* HBE D[5] */
241 if (temp & 0x40)
242 jregAD |= 0x01; /* HBE D[5] */
243 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x03, 0xE0, (temp & 0x1f));
244
245 temp = ((mode->crtc_hsync_start-precache) >> 3) - 1;
246 if (temp & 0x100)
247 jregAC |= 0x40; /* HRS D[5] */
248 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x04, 0x00, temp);
249
250 temp = (((mode->crtc_hsync_end-precache) >> 3) - 1) & 0x3f;
251 if (temp & 0x20)
252 jregAD |= 0x04; /* HRE D[5] */
253 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x05, 0x60, (u8)((temp & 0x1f) | jreg05));
254
255 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAC, 0x00, jregAC);
256 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAD, 0x00, jregAD);
257
258 // Workaround for HSync Time non octave pixels (1920x1080@60Hz HSync 44 pixels);
259 if (IS_AST_GEN7(ast) && (mode->crtc_vdisplay == 1080))
260 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x02);
261 else
262 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xFC, 0xFD, 0x00);
263
264 /* vert timings */
265 temp = (mode->crtc_vtotal) - 2;
266 if (temp & 0x100)
267 jreg07 |= 0x01;
268 if (temp & 0x200)
269 jreg07 |= 0x20;
270 if (temp & 0x400)
271 jregAE |= 0x01;
272 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x06, 0x00, temp);
273
274 temp = (mode->crtc_vsync_start) - 1;
275 if (temp & 0x100)
276 jreg07 |= 0x04;
277 if (temp & 0x200)
278 jreg07 |= 0x80;
279 if (temp & 0x400)
280 jregAE |= 0x08;
281 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x10, 0x00, temp);
282
283 temp = (mode->crtc_vsync_end - 1) & 0x3f;
284 if (temp & 0x10)
285 jregAE |= 0x20;
286 if (temp & 0x20)
287 jregAE |= 0x40;
288 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x70, temp & 0xf);
289
290 temp = mode->crtc_vdisplay - 1;
291 if (temp & 0x100)
292 jreg07 |= 0x02;
293 if (temp & 0x200)
294 jreg07 |= 0x40;
295 if (temp & 0x400)
296 jregAE |= 0x02;
297 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x12, 0x00, temp);
298
299 temp = mode->crtc_vblank_start - 1;
300 if (temp & 0x100)
301 jreg07 |= 0x08;
302 if (temp & 0x200)
303 jreg09 |= 0x20;
304 if (temp & 0x400)
305 jregAE |= 0x04;
306 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x15, 0x00, temp);
307
308 temp = mode->crtc_vblank_end - 1;
309 if (temp & 0x100)
310 jregAE |= 0x10;
311 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x16, 0x00, temp);
312
313 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x07, 0x00, jreg07);
314 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x09, 0xdf, jreg09);
315 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xAE, 0x00, (jregAE | 0x80));
316
317 if (precache)
318 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x80);
319 else
320 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0x3f, 0x00);
321
322 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0x11, 0x7f, 0x80);
323 }
324
ast_set_offset_reg(struct ast_device * ast,struct drm_framebuffer * fb)325 static void ast_set_offset_reg(struct ast_device *ast,
326 struct drm_framebuffer *fb)
327 {
328 u16 offset;
329
330 offset = fb->pitches[0] >> 3;
331 ast_set_index_reg(ast, AST_IO_VGACRI, 0x13, (offset & 0xff));
332 ast_set_index_reg(ast, AST_IO_VGACRI, 0xb0, (offset >> 8) & 0x3f);
333 }
334
ast_set_dclk_reg(struct ast_device * ast,struct drm_display_mode * mode,const struct ast_vbios_enhtable * vmode)335 static void ast_set_dclk_reg(struct ast_device *ast,
336 struct drm_display_mode *mode,
337 const struct ast_vbios_enhtable *vmode)
338 {
339 const struct ast_vbios_dclk_info *clk_info;
340
341 if (IS_AST_GEN6(ast) || IS_AST_GEN7(ast))
342 clk_info = &dclk_table_ast2500[vmode->dclk_index];
343 else
344 clk_info = &dclk_table[vmode->dclk_index];
345
346 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc0, 0x00, clk_info->param1);
347 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xc1, 0x00, clk_info->param2);
348 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xbb, 0x0f,
349 (clk_info->param3 & 0xc0) |
350 ((clk_info->param3 & 0x3) << 4));
351 }
352
ast_set_color_reg(struct ast_device * ast,const struct drm_format_info * format)353 static void ast_set_color_reg(struct ast_device *ast,
354 const struct drm_format_info *format)
355 {
356 u8 jregA0 = 0, jregA3 = 0, jregA8 = 0;
357
358 switch (format->cpp[0] * 8) {
359 case 8:
360 jregA0 = 0x70;
361 jregA3 = 0x01;
362 jregA8 = 0x00;
363 break;
364 case 15:
365 case 16:
366 jregA0 = 0x70;
367 jregA3 = 0x04;
368 jregA8 = 0x02;
369 break;
370 case 32:
371 jregA0 = 0x70;
372 jregA3 = 0x08;
373 jregA8 = 0x02;
374 break;
375 }
376
377 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa0, 0x8f, jregA0);
378 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa3, 0xf0, jregA3);
379 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xa8, 0xfd, jregA8);
380 }
381
ast_set_crtthd_reg(struct ast_device * ast)382 static void ast_set_crtthd_reg(struct ast_device *ast)
383 {
384 /* Set Threshold */
385 if (IS_AST_GEN7(ast)) {
386 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0xe0);
387 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0xa0);
388 } else if (IS_AST_GEN6(ast) || IS_AST_GEN5(ast) || IS_AST_GEN4(ast)) {
389 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x78);
390 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x60);
391 } else if (IS_AST_GEN3(ast) || IS_AST_GEN2(ast)) {
392 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x3f);
393 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x2f);
394 } else {
395 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa7, 0x2f);
396 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa6, 0x1f);
397 }
398 }
399
ast_set_sync_reg(struct ast_device * ast,struct drm_display_mode * mode,const struct ast_vbios_enhtable * vmode)400 static void ast_set_sync_reg(struct ast_device *ast,
401 struct drm_display_mode *mode,
402 const struct ast_vbios_enhtable *vmode)
403 {
404 u8 jreg;
405
406 jreg = ast_io_read8(ast, AST_IO_VGAMR_R);
407 jreg &= ~0xC0;
408 if (vmode->flags & NVSync)
409 jreg |= 0x80;
410 if (vmode->flags & NHSync)
411 jreg |= 0x40;
412 ast_io_write8(ast, AST_IO_VGAMR_W, jreg);
413 }
414
ast_set_start_address_crt1(struct ast_device * ast,unsigned int offset)415 static void ast_set_start_address_crt1(struct ast_device *ast,
416 unsigned int offset)
417 {
418 u32 addr;
419
420 addr = offset >> 2;
421 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0d, (u8)(addr & 0xff));
422 ast_set_index_reg(ast, AST_IO_VGACRI, 0x0c, (u8)((addr >> 8) & 0xff));
423 ast_set_index_reg(ast, AST_IO_VGACRI, 0xaf, (u8)((addr >> 16) & 0xff));
424
425 }
426
ast_wait_for_vretrace(struct ast_device * ast)427 static void ast_wait_for_vretrace(struct ast_device *ast)
428 {
429 unsigned long timeout = jiffies + HZ;
430 u8 vgair1;
431
432 do {
433 vgair1 = ast_io_read8(ast, AST_IO_VGAIR1_R);
434 } while (!(vgair1 & AST_IO_VGAIR1_VREFRESH) && time_before(jiffies, timeout));
435 }
436
437 /*
438 * Planes
439 */
440
ast_plane_init(struct drm_device * dev,struct ast_plane * ast_plane,void __iomem * vaddr,u64 offset,unsigned long size,uint32_t possible_crtcs,const struct drm_plane_funcs * funcs,const uint32_t * formats,unsigned int format_count,const uint64_t * format_modifiers,enum drm_plane_type type)441 int ast_plane_init(struct drm_device *dev, struct ast_plane *ast_plane,
442 void __iomem *vaddr, u64 offset, unsigned long size,
443 uint32_t possible_crtcs,
444 const struct drm_plane_funcs *funcs,
445 const uint32_t *formats, unsigned int format_count,
446 const uint64_t *format_modifiers,
447 enum drm_plane_type type)
448 {
449 struct drm_plane *plane = &ast_plane->base;
450
451 ast_plane->vaddr = vaddr;
452 ast_plane->offset = offset;
453 ast_plane->size = size;
454
455 return drm_universal_plane_init(dev, plane, possible_crtcs, funcs,
456 formats, format_count, format_modifiers,
457 type, NULL);
458 }
459
460 /*
461 * Primary plane
462 */
463
464 static const uint32_t ast_primary_plane_formats[] = {
465 DRM_FORMAT_XRGB8888,
466 DRM_FORMAT_RGB565,
467 DRM_FORMAT_C8,
468 };
469
ast_primary_plane_helper_atomic_check(struct drm_plane * plane,struct drm_atomic_state * state)470 static int ast_primary_plane_helper_atomic_check(struct drm_plane *plane,
471 struct drm_atomic_state *state)
472 {
473 struct drm_device *dev = plane->dev;
474 struct drm_plane_state *new_plane_state = drm_atomic_get_new_plane_state(state, plane);
475 struct drm_crtc_state *new_crtc_state = NULL;
476 struct ast_crtc_state *new_ast_crtc_state;
477 int ret;
478
479 if (new_plane_state->crtc)
480 new_crtc_state = drm_atomic_get_new_crtc_state(state, new_plane_state->crtc);
481
482 ret = drm_atomic_helper_check_plane_state(new_plane_state, new_crtc_state,
483 DRM_PLANE_NO_SCALING,
484 DRM_PLANE_NO_SCALING,
485 false, true);
486 if (ret) {
487 return ret;
488 } else if (!new_plane_state->visible) {
489 if (drm_WARN_ON(dev, new_plane_state->crtc)) /* cannot legally happen */
490 return -EINVAL;
491 else
492 return 0;
493 }
494
495 new_ast_crtc_state = to_ast_crtc_state(new_crtc_state);
496
497 new_ast_crtc_state->format = new_plane_state->fb->format;
498
499 return 0;
500 }
501
ast_handle_damage(struct ast_plane * ast_plane,struct iosys_map * src,struct drm_framebuffer * fb,const struct drm_rect * clip)502 static void ast_handle_damage(struct ast_plane *ast_plane, struct iosys_map *src,
503 struct drm_framebuffer *fb,
504 const struct drm_rect *clip)
505 {
506 struct iosys_map dst = IOSYS_MAP_INIT_VADDR_IOMEM(ast_plane->vaddr);
507
508 iosys_map_incr(&dst, drm_fb_clip_offset(fb->pitches[0], fb->format, clip));
509 drm_fb_memcpy(&dst, fb->pitches, src, fb, clip);
510 }
511
ast_primary_plane_helper_atomic_update(struct drm_plane * plane,struct drm_atomic_state * state)512 static void ast_primary_plane_helper_atomic_update(struct drm_plane *plane,
513 struct drm_atomic_state *state)
514 {
515 struct drm_device *dev = plane->dev;
516 struct ast_device *ast = to_ast_device(dev);
517 struct drm_plane_state *plane_state = drm_atomic_get_new_plane_state(state, plane);
518 struct drm_shadow_plane_state *shadow_plane_state = to_drm_shadow_plane_state(plane_state);
519 struct drm_framebuffer *fb = plane_state->fb;
520 struct drm_plane_state *old_plane_state = drm_atomic_get_old_plane_state(state, plane);
521 struct drm_framebuffer *old_fb = old_plane_state->fb;
522 struct ast_plane *ast_plane = to_ast_plane(plane);
523 struct drm_crtc *crtc = plane_state->crtc;
524 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
525 struct drm_rect damage;
526 struct drm_atomic_helper_damage_iter iter;
527
528 if (!old_fb || (fb->format != old_fb->format) || crtc_state->mode_changed) {
529 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
530
531 ast_set_color_reg(ast, fb->format);
532 ast_set_vbios_color_reg(ast, fb->format, ast_crtc_state->vmode);
533 }
534
535 drm_atomic_helper_damage_iter_init(&iter, old_plane_state, plane_state);
536 drm_atomic_for_each_plane_damage(&iter, &damage) {
537 ast_handle_damage(ast_plane, shadow_plane_state->data, fb, &damage);
538 }
539
540 /*
541 * Some BMCs stop scanning out the video signal after the driver
542 * reprogrammed the offset. This stalls display output for several
543 * seconds and makes the display unusable. Therefore only update
544 * the offset if it changes.
545 */
546 if (!old_fb || old_fb->pitches[0] != fb->pitches[0])
547 ast_set_offset_reg(ast, fb);
548 }
549
ast_primary_plane_helper_atomic_enable(struct drm_plane * plane,struct drm_atomic_state * state)550 static void ast_primary_plane_helper_atomic_enable(struct drm_plane *plane,
551 struct drm_atomic_state *state)
552 {
553 struct ast_device *ast = to_ast_device(plane->dev);
554 struct ast_plane *ast_plane = to_ast_plane(plane);
555
556 /*
557 * Some BMCs stop scanning out the video signal after the driver
558 * reprogrammed the scanout address. This stalls display
559 * output for several seconds and makes the display unusable.
560 * Therefore only reprogram the address after enabling the plane.
561 */
562 ast_set_start_address_crt1(ast, (u32)ast_plane->offset);
563 }
564
ast_primary_plane_helper_atomic_disable(struct drm_plane * plane,struct drm_atomic_state * state)565 static void ast_primary_plane_helper_atomic_disable(struct drm_plane *plane,
566 struct drm_atomic_state *state)
567 {
568 /*
569 * Keep this empty function to avoid calling
570 * atomic_update when disabling the plane.
571 */
572 }
573
ast_primary_plane_helper_get_scanout_buffer(struct drm_plane * plane,struct drm_scanout_buffer * sb)574 static int ast_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,
575 struct drm_scanout_buffer *sb)
576 {
577 struct ast_plane *ast_plane = to_ast_plane(plane);
578
579 if (plane->state && plane->state->fb && ast_plane->vaddr) {
580 sb->format = plane->state->fb->format;
581 sb->width = plane->state->fb->width;
582 sb->height = plane->state->fb->height;
583 sb->pitch[0] = plane->state->fb->pitches[0];
584 iosys_map_set_vaddr_iomem(&sb->map[0], ast_plane->vaddr);
585 return 0;
586 }
587 return -ENODEV;
588 }
589
590 static const struct drm_plane_helper_funcs ast_primary_plane_helper_funcs = {
591 DRM_GEM_SHADOW_PLANE_HELPER_FUNCS,
592 .atomic_check = ast_primary_plane_helper_atomic_check,
593 .atomic_update = ast_primary_plane_helper_atomic_update,
594 .atomic_enable = ast_primary_plane_helper_atomic_enable,
595 .atomic_disable = ast_primary_plane_helper_atomic_disable,
596 .get_scanout_buffer = ast_primary_plane_helper_get_scanout_buffer,
597 };
598
599 static const struct drm_plane_funcs ast_primary_plane_funcs = {
600 .update_plane = drm_atomic_helper_update_plane,
601 .disable_plane = drm_atomic_helper_disable_plane,
602 .destroy = drm_plane_cleanup,
603 DRM_GEM_SHADOW_PLANE_FUNCS,
604 };
605
ast_primary_plane_init(struct ast_device * ast)606 static int ast_primary_plane_init(struct ast_device *ast)
607 {
608 struct drm_device *dev = &ast->base;
609 struct ast_plane *ast_primary_plane = &ast->primary_plane;
610 struct drm_plane *primary_plane = &ast_primary_plane->base;
611 void __iomem *vaddr = ast->vram;
612 u64 offset = 0; /* with shmem, the primary plane is always at offset 0 */
613 unsigned long cursor_size = roundup(AST_HWC_SIZE + AST_HWC_SIGNATURE_SIZE, PAGE_SIZE);
614 unsigned long size = ast->vram_fb_available - cursor_size;
615 int ret;
616
617 ret = ast_plane_init(dev, ast_primary_plane, vaddr, offset, size,
618 0x01, &ast_primary_plane_funcs,
619 ast_primary_plane_formats, ARRAY_SIZE(ast_primary_plane_formats),
620 NULL, DRM_PLANE_TYPE_PRIMARY);
621 if (ret) {
622 drm_err(dev, "ast_plane_init() failed: %d\n", ret);
623 return ret;
624 }
625 drm_plane_helper_add(primary_plane, &ast_primary_plane_helper_funcs);
626 drm_plane_enable_fb_damage_clips(primary_plane);
627
628 return 0;
629 }
630
631 /*
632 * CRTC
633 */
634
635 static enum drm_mode_status
ast_crtc_helper_mode_valid(struct drm_crtc * crtc,const struct drm_display_mode * mode)636 ast_crtc_helper_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
637 {
638 struct ast_device *ast = to_ast_device(crtc->dev);
639 const struct ast_vbios_enhtable *vmode;
640
641 vmode = ast_vbios_find_mode(ast, mode);
642 if (!vmode)
643 return MODE_NOMODE;
644
645 return MODE_OK;
646 }
647
ast_crtc_helper_mode_set_nofb(struct drm_crtc * crtc)648 static void ast_crtc_helper_mode_set_nofb(struct drm_crtc *crtc)
649 {
650 struct drm_device *dev = crtc->dev;
651 struct ast_device *ast = to_ast_device(dev);
652 struct drm_crtc_state *crtc_state = crtc->state;
653 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
654 const struct ast_vbios_stdtable *std_table = ast_crtc_state->std_table;
655 const struct ast_vbios_enhtable *vmode = ast_crtc_state->vmode;
656 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
657
658 /*
659 * Ensure that no scanout takes place before reprogramming mode
660 * and format registers.
661 *
662 * TODO: Get vblank interrupts working and remove this line.
663 */
664 ast_wait_for_vretrace(ast);
665
666 ast_set_vbios_mode_reg(ast, adjusted_mode, vmode);
667 ast_set_index_reg(ast, AST_IO_VGACRI, 0xa1, 0x06);
668 ast_set_std_reg(ast, adjusted_mode, std_table);
669 ast_set_crtc_reg(ast, adjusted_mode, vmode);
670 ast_set_dclk_reg(ast, adjusted_mode, vmode);
671 ast_set_crtthd_reg(ast);
672 ast_set_sync_reg(ast, adjusted_mode, vmode);
673 }
674
ast_crtc_helper_atomic_check(struct drm_crtc * crtc,struct drm_atomic_state * state)675 static int ast_crtc_helper_atomic_check(struct drm_crtc *crtc,
676 struct drm_atomic_state *state)
677 {
678 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
679 struct drm_display_mode *adjusted_mode = &crtc_state->adjusted_mode;
680 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
681 struct ast_crtc_state *old_ast_crtc_state = to_ast_crtc_state(old_crtc_state);
682 struct drm_device *dev = crtc->dev;
683 struct ast_device *ast = to_ast_device(dev);
684 struct ast_crtc_state *ast_state;
685 const struct drm_format_info *format;
686 const struct ast_vbios_enhtable *vmode;
687 unsigned int hborder = 0;
688 unsigned int vborder = 0;
689 int ret;
690
691 if (!crtc_state->enable)
692 return 0;
693
694 ret = drm_atomic_helper_check_crtc_primary_plane(crtc_state);
695 if (ret)
696 return ret;
697
698 ast_state = to_ast_crtc_state(crtc_state);
699
700 format = ast_state->format;
701 if (drm_WARN_ON_ONCE(dev, !format))
702 return -EINVAL; /* BUG: We didn't set format in primary check(). */
703
704 /*
705 * The gamma LUT has to be reloaded after changing the primary
706 * plane's color format.
707 */
708 if (old_ast_crtc_state->format != format)
709 crtc_state->color_mgmt_changed = true;
710
711 if (crtc_state->color_mgmt_changed && crtc_state->gamma_lut) {
712 if (crtc_state->gamma_lut->length !=
713 AST_LUT_SIZE * sizeof(struct drm_color_lut)) {
714 drm_err(dev, "Wrong size for gamma_lut %zu\n",
715 crtc_state->gamma_lut->length);
716 return -EINVAL;
717 }
718 }
719
720 /*
721 * Set register tables.
722 *
723 * TODO: These tables mix all kinds of fields and should
724 * probably be resolved into various helper functions.
725 */
726 switch (format->format) {
727 case DRM_FORMAT_C8:
728 ast_state->std_table = &vbios_stdtable[VGAModeIndex];
729 break;
730 case DRM_FORMAT_RGB565:
731 ast_state->std_table = &vbios_stdtable[HiCModeIndex];
732 break;
733 case DRM_FORMAT_RGB888:
734 case DRM_FORMAT_XRGB8888:
735 ast_state->std_table = &vbios_stdtable[TrueCModeIndex];
736 break;
737 default:
738 return -EINVAL;
739 }
740
741 /*
742 * Find the VBIOS mode and adjust the DRM display mode accordingly
743 * if a full modeset is required. Otherwise keep the existing values.
744 */
745 if (drm_atomic_crtc_needs_modeset(crtc_state)) {
746 vmode = ast_vbios_find_mode(ast, &crtc_state->mode);
747 if (!vmode)
748 return -EINVAL;
749 ast_state->vmode = vmode;
750
751 if (vmode->flags & HBorder)
752 hborder = 8;
753 if (vmode->flags & VBorder)
754 vborder = 8;
755
756 adjusted_mode->crtc_hdisplay = vmode->hde;
757 adjusted_mode->crtc_hblank_start = vmode->hde + hborder;
758 adjusted_mode->crtc_hblank_end = vmode->ht - hborder;
759 adjusted_mode->crtc_hsync_start = vmode->hde + hborder + vmode->hfp;
760 adjusted_mode->crtc_hsync_end = vmode->hde + hborder + vmode->hfp + vmode->hsync;
761 adjusted_mode->crtc_htotal = vmode->ht;
762
763 adjusted_mode->crtc_vdisplay = vmode->vde;
764 adjusted_mode->crtc_vblank_start = vmode->vde + vborder;
765 adjusted_mode->crtc_vblank_end = vmode->vt - vborder;
766 adjusted_mode->crtc_vsync_start = vmode->vde + vborder + vmode->vfp;
767 adjusted_mode->crtc_vsync_end = vmode->vde + vborder + vmode->vfp + vmode->vsync;
768 adjusted_mode->crtc_vtotal = vmode->vt;
769 }
770
771 return 0;
772 }
773
774 static void
ast_crtc_helper_atomic_flush(struct drm_crtc * crtc,struct drm_atomic_state * state)775 ast_crtc_helper_atomic_flush(struct drm_crtc *crtc,
776 struct drm_atomic_state *state)
777 {
778 struct drm_crtc_state *crtc_state = drm_atomic_get_new_crtc_state(state,
779 crtc);
780 struct drm_device *dev = crtc->dev;
781 struct ast_device *ast = to_ast_device(dev);
782 struct ast_crtc_state *ast_crtc_state = to_ast_crtc_state(crtc_state);
783
784 /*
785 * The gamma LUT has to be reloaded after changing the primary
786 * plane's color format.
787 */
788 if (crtc_state->enable && crtc_state->color_mgmt_changed) {
789 if (crtc_state->gamma_lut)
790 ast_crtc_set_gamma(ast,
791 ast_crtc_state->format,
792 crtc_state->gamma_lut->data);
793 else
794 ast_crtc_set_gamma_linear(ast, ast_crtc_state->format);
795 }
796 }
797
ast_crtc_helper_atomic_enable(struct drm_crtc * crtc,struct drm_atomic_state * state)798 static void ast_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state)
799 {
800 struct ast_device *ast = to_ast_device(crtc->dev);
801
802 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, 0x00);
803 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, 0x00);
804 }
805
ast_crtc_helper_atomic_disable(struct drm_crtc * crtc,struct drm_atomic_state * state)806 static void ast_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state)
807 {
808 struct drm_crtc_state *old_crtc_state = drm_atomic_get_old_crtc_state(state, crtc);
809 struct ast_device *ast = to_ast_device(crtc->dev);
810 u8 vgacrb6;
811
812 ast_set_index_reg_mask(ast, AST_IO_VGASRI, 0x01, 0xdf, AST_IO_VGASR1_SD);
813
814 vgacrb6 = AST_IO_VGACRB6_VSYNC_OFF |
815 AST_IO_VGACRB6_HSYNC_OFF;
816 ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xfc, vgacrb6);
817
818 /*
819 * HW cursors require the underlying primary plane and CRTC to
820 * display a valid mode and image. This is not the case during
821 * full modeset operations. So we temporarily disable any active
822 * plane, including the HW cursor. Each plane's atomic_update()
823 * helper will re-enable it if necessary.
824 *
825 * We only do this during *full* modesets. It does not affect
826 * simple pageflips on the planes.
827 */
828 drm_atomic_helper_disable_planes_on_crtc(old_crtc_state, false);
829 }
830
831 static const struct drm_crtc_helper_funcs ast_crtc_helper_funcs = {
832 .mode_valid = ast_crtc_helper_mode_valid,
833 .mode_set_nofb = ast_crtc_helper_mode_set_nofb,
834 .atomic_check = ast_crtc_helper_atomic_check,
835 .atomic_flush = ast_crtc_helper_atomic_flush,
836 .atomic_enable = ast_crtc_helper_atomic_enable,
837 .atomic_disable = ast_crtc_helper_atomic_disable,
838 };
839
ast_crtc_reset(struct drm_crtc * crtc)840 static void ast_crtc_reset(struct drm_crtc *crtc)
841 {
842 struct ast_crtc_state *ast_state =
843 kzalloc(sizeof(*ast_state), GFP_KERNEL);
844
845 if (crtc->state)
846 crtc->funcs->atomic_destroy_state(crtc, crtc->state);
847
848 if (ast_state)
849 __drm_atomic_helper_crtc_reset(crtc, &ast_state->base);
850 else
851 __drm_atomic_helper_crtc_reset(crtc, NULL);
852 }
853
854 static struct drm_crtc_state *
ast_crtc_atomic_duplicate_state(struct drm_crtc * crtc)855 ast_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
856 {
857 struct ast_crtc_state *new_ast_state, *ast_state;
858 struct drm_device *dev = crtc->dev;
859
860 if (drm_WARN_ON(dev, !crtc->state))
861 return NULL;
862
863 new_ast_state = kmalloc(sizeof(*new_ast_state), GFP_KERNEL);
864 if (!new_ast_state)
865 return NULL;
866 __drm_atomic_helper_crtc_duplicate_state(crtc, &new_ast_state->base);
867
868 ast_state = to_ast_crtc_state(crtc->state);
869
870 new_ast_state->format = ast_state->format;
871 new_ast_state->std_table = ast_state->std_table;
872 new_ast_state->vmode = ast_state->vmode;
873
874 return &new_ast_state->base;
875 }
876
ast_crtc_atomic_destroy_state(struct drm_crtc * crtc,struct drm_crtc_state * state)877 static void ast_crtc_atomic_destroy_state(struct drm_crtc *crtc,
878 struct drm_crtc_state *state)
879 {
880 struct ast_crtc_state *ast_state = to_ast_crtc_state(state);
881
882 __drm_atomic_helper_crtc_destroy_state(&ast_state->base);
883 kfree(ast_state);
884 }
885
886 static const struct drm_crtc_funcs ast_crtc_funcs = {
887 .reset = ast_crtc_reset,
888 .destroy = drm_crtc_cleanup,
889 .set_config = drm_atomic_helper_set_config,
890 .page_flip = drm_atomic_helper_page_flip,
891 .atomic_duplicate_state = ast_crtc_atomic_duplicate_state,
892 .atomic_destroy_state = ast_crtc_atomic_destroy_state,
893 };
894
ast_crtc_init(struct ast_device * ast)895 static int ast_crtc_init(struct ast_device *ast)
896 {
897 struct drm_device *dev = &ast->base;
898 struct drm_crtc *crtc = &ast->crtc;
899 int ret;
900
901 ret = drm_crtc_init_with_planes(dev, crtc, &ast->primary_plane.base,
902 &ast->cursor_plane.base.base, &ast_crtc_funcs,
903 NULL);
904 if (ret)
905 return ret;
906
907 drm_mode_crtc_set_gamma_size(crtc, AST_LUT_SIZE);
908 drm_crtc_enable_color_mgmt(crtc, 0, false, AST_LUT_SIZE);
909
910 drm_crtc_helper_add(crtc, &ast_crtc_helper_funcs);
911
912 return 0;
913 }
914
915 /*
916 * Mode config
917 */
918
ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state * state)919 static void ast_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state)
920 {
921 struct ast_device *ast = to_ast_device(state->dev);
922
923 /*
924 * Concurrent operations could possibly trigger a call to
925 * drm_connector_helper_funcs.get_modes by trying to read the
926 * display modes. Protect access to I/O registers by acquiring
927 * the I/O-register lock. Released in atomic_flush().
928 */
929 mutex_lock(&ast->modeset_lock);
930 drm_atomic_helper_commit_tail(state);
931 mutex_unlock(&ast->modeset_lock);
932 }
933
934 static const struct drm_mode_config_helper_funcs ast_mode_config_helper_funcs = {
935 .atomic_commit_tail = ast_mode_config_helper_atomic_commit_tail,
936 };
937
ast_mode_config_mode_valid(struct drm_device * dev,const struct drm_display_mode * mode)938 static enum drm_mode_status ast_mode_config_mode_valid(struct drm_device *dev,
939 const struct drm_display_mode *mode)
940 {
941 static const unsigned long max_bpp = 4; /* DRM_FORMAT_XRGB8888 */
942 struct ast_device *ast = to_ast_device(dev);
943 unsigned long fbsize, fbpages, max_fbpages;
944
945 max_fbpages = (ast->vram_fb_available) >> PAGE_SHIFT;
946
947 fbsize = mode->hdisplay * mode->vdisplay * max_bpp;
948 fbpages = DIV_ROUND_UP(fbsize, PAGE_SIZE);
949
950 if (fbpages > max_fbpages)
951 return MODE_MEM;
952
953 return MODE_OK;
954 }
955
956 static const struct drm_mode_config_funcs ast_mode_config_funcs = {
957 .fb_create = drm_gem_fb_create_with_dirty,
958 .mode_valid = ast_mode_config_mode_valid,
959 .atomic_check = drm_atomic_helper_check,
960 .atomic_commit = drm_atomic_helper_commit,
961 };
962
ast_mode_config_init(struct ast_device * ast)963 int ast_mode_config_init(struct ast_device *ast)
964 {
965 struct drm_device *dev = &ast->base;
966 int ret;
967
968 ret = drmm_mutex_init(dev, &ast->modeset_lock);
969 if (ret)
970 return ret;
971
972 ret = drmm_mode_config_init(dev);
973 if (ret)
974 return ret;
975
976 dev->mode_config.funcs = &ast_mode_config_funcs;
977 dev->mode_config.min_width = 0;
978 dev->mode_config.min_height = 0;
979 dev->mode_config.preferred_depth = 24;
980
981 if (ast->support_fullhd) {
982 dev->mode_config.max_width = 1920;
983 dev->mode_config.max_height = 2048;
984 } else {
985 dev->mode_config.max_width = 1600;
986 dev->mode_config.max_height = 1200;
987 }
988
989 dev->mode_config.helper_private = &ast_mode_config_helper_funcs;
990
991 ret = ast_primary_plane_init(ast);
992 if (ret)
993 return ret;
994
995 ret = ast_cursor_plane_init(ast);
996 if (ret)
997 return ret;
998
999 ret = ast_crtc_init(ast);
1000 if (ret)
1001 return ret;
1002
1003 switch (ast->tx_chip) {
1004 case AST_TX_NONE:
1005 ret = ast_vga_output_init(ast);
1006 break;
1007 case AST_TX_SIL164:
1008 ret = ast_sil164_output_init(ast);
1009 break;
1010 case AST_TX_DP501:
1011 ret = ast_dp501_output_init(ast);
1012 break;
1013 case AST_TX_ASTDP:
1014 ret = ast_astdp_output_init(ast);
1015 break;
1016 }
1017 if (ret)
1018 return ret;
1019
1020 drm_mode_config_reset(dev);
1021
1022 ret = drmm_kms_helper_poll_init(dev);
1023 if (ret)
1024 return ret;
1025
1026 return 0;
1027 }
1028