1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2018 IBM Corporation
3 
4 #include <linux/clk.h>
5 #include <linux/dma-mapping.h>
6 #include <linux/irq.h>
7 #include <linux/mfd/syscon.h>
8 #include <linux/module.h>
9 #include <linux/mod_devicetable.h>
10 #include <linux/of_reserved_mem.h>
11 #include <linux/platform_device.h>
12 #include <linux/property.h>
13 #include <linux/regmap.h>
14 #include <linux/reset.h>
15 
16 #include <drm/clients/drm_client_setup.h>
17 #include <drm/drm_atomic_helper.h>
18 #include <drm/drm_device.h>
19 #include <drm/drm_fbdev_dma.h>
20 #include <drm/drm_gem_dma_helper.h>
21 #include <drm/drm_gem_framebuffer_helper.h>
22 #include <drm/drm_module.h>
23 #include <drm/drm_probe_helper.h>
24 #include <drm/drm_simple_kms_helper.h>
25 #include <drm/drm_vblank.h>
26 #include <drm/drm_drv.h>
27 
28 #include "aspeed_gfx.h"
29 
30 /**
31  * DOC: ASPEED GFX Driver
32  *
33  * This driver is for the ASPEED BMC SoC's 'GFX' display hardware, also called
34  * the 'SOC Display Controller' in the datasheet. This driver runs on the ARM
35  * based BMC systems, unlike the ast driver which runs on a host CPU and is for
36  * a PCIe graphics device.
37  *
38  * The AST2500 supports a total of 3 output paths:
39  *
40  *   1. VGA output, the output target can choose either or both to the DAC
41  *   or DVO interface.
42  *
43  *   2. Graphics CRT output, the output target can choose either or both to
44  *   the DAC or DVO interface.
45  *
46  *   3. Video input from DVO, the video input can be used for video engine
47  *   capture or DAC display output.
48  *
49  * Output options are selected in SCU2C.
50  *
51  * The "VGA mode" device is the PCI attached controller. The "Graphics CRT"
52  * is the ARM's internal display controller.
53  *
54  * The driver only supports a simple configuration consisting of a 40MHz
55  * pixel clock, fixed by hardware limitations, and the VGA output path.
56  *
57  * The driver was written with the 'AST2500 Software Programming Guide' v17,
58  * which is available under NDA from ASPEED.
59  */
60 
61 struct aspeed_gfx_config {
62 	u32 dac_reg;		/* DAC register in SCU */
63 	u32 int_clear_reg;	/* Interrupt clear register */
64 	u32 vga_scratch_reg;	/* VGA scratch register in SCU */
65 	u32 throd_val;		/* Default Threshold Seting */
66 	u32 scan_line_max;	/* Max memory size of one scan line */
67 };
68 
69 static const struct aspeed_gfx_config ast2400_config = {
70 	.dac_reg = 0x2c,
71 	.int_clear_reg = 0x60,
72 	.vga_scratch_reg = 0x50,
73 	.throd_val = CRT_THROD_LOW(0x1e) | CRT_THROD_HIGH(0x12),
74 	.scan_line_max = 64,
75 };
76 
77 static const struct aspeed_gfx_config ast2500_config = {
78 	.dac_reg = 0x2c,
79 	.int_clear_reg = 0x60,
80 	.vga_scratch_reg = 0x50,
81 	.throd_val = CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3c),
82 	.scan_line_max = 128,
83 };
84 
85 static const struct aspeed_gfx_config ast2600_config = {
86 	.dac_reg = 0xc0,
87 	.int_clear_reg = 0x68,
88 	.vga_scratch_reg = 0x50,
89 	.throd_val = CRT_THROD_LOW(0x50) | CRT_THROD_HIGH(0x70),
90 	.scan_line_max = 128,
91 };
92 
93 static const struct of_device_id aspeed_gfx_match[] = {
94 	{ .compatible = "aspeed,ast2400-gfx", .data = &ast2400_config },
95 	{ .compatible = "aspeed,ast2500-gfx", .data = &ast2500_config },
96 	{ .compatible = "aspeed,ast2600-gfx", .data = &ast2600_config },
97 	{ },
98 };
99 MODULE_DEVICE_TABLE(of, aspeed_gfx_match);
100 
101 static const struct drm_mode_config_funcs aspeed_gfx_mode_config_funcs = {
102 	.fb_create		= drm_gem_fb_create,
103 	.atomic_check		= drm_atomic_helper_check,
104 	.atomic_commit		= drm_atomic_helper_commit,
105 };
106 
aspeed_gfx_setup_mode_config(struct drm_device * drm)107 static int aspeed_gfx_setup_mode_config(struct drm_device *drm)
108 {
109 	int ret;
110 
111 	ret = drmm_mode_config_init(drm);
112 	if (ret)
113 		return ret;
114 
115 	drm->mode_config.min_width = 0;
116 	drm->mode_config.min_height = 0;
117 	drm->mode_config.max_width = 800;
118 	drm->mode_config.max_height = 600;
119 	drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs;
120 
121 	return ret;
122 }
123 
aspeed_gfx_irq_handler(int irq,void * data)124 static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
125 {
126 	struct drm_device *drm = data;
127 	struct aspeed_gfx *priv = to_aspeed_gfx(drm);
128 	u32 reg;
129 
130 	reg = readl(priv->base + CRT_CTRL1);
131 
132 	if (reg & CRT_CTRL_VERTICAL_INTR_STS) {
133 		drm_crtc_handle_vblank(&priv->pipe.crtc);
134 		writel(reg, priv->base + priv->int_clr_reg);
135 		return IRQ_HANDLED;
136 	}
137 
138 	return IRQ_NONE;
139 }
140 
aspeed_gfx_load(struct drm_device * drm)141 static int aspeed_gfx_load(struct drm_device *drm)
142 {
143 	struct platform_device *pdev = to_platform_device(drm->dev);
144 	struct aspeed_gfx *priv = to_aspeed_gfx(drm);
145 	struct device_node *np = pdev->dev.of_node;
146 	const struct aspeed_gfx_config *config;
147 	int ret;
148 
149 	priv->base = devm_platform_ioremap_resource(pdev, 0);
150 	if (IS_ERR(priv->base))
151 		return PTR_ERR(priv->base);
152 
153 	config = device_get_match_data(&pdev->dev);
154 	if (!config)
155 		return -EINVAL;
156 
157 	priv->dac_reg = config->dac_reg;
158 	priv->int_clr_reg = config->int_clear_reg;
159 	priv->vga_scratch_reg = config->vga_scratch_reg;
160 	priv->throd_val = config->throd_val;
161 	priv->scan_line_max = config->scan_line_max;
162 
163 	priv->scu = syscon_regmap_lookup_by_phandle(np, "syscon");
164 	if (IS_ERR(priv->scu)) {
165 		priv->scu = syscon_regmap_lookup_by_compatible("aspeed,ast2500-scu");
166 		if (IS_ERR(priv->scu)) {
167 			dev_err(&pdev->dev, "failed to find SCU regmap\n");
168 			return PTR_ERR(priv->scu);
169 		}
170 	}
171 
172 	ret = of_reserved_mem_device_init(drm->dev);
173 	if (ret) {
174 		dev_err(&pdev->dev,
175 			"failed to initialize reserved mem: %d\n", ret);
176 		return ret;
177 	}
178 
179 	ret = dma_set_mask_and_coherent(drm->dev, DMA_BIT_MASK(32));
180 	if (ret) {
181 		dev_err(&pdev->dev, "failed to set DMA mask: %d\n", ret);
182 		return ret;
183 	}
184 
185 	priv->rst = devm_reset_control_get_exclusive(&pdev->dev, NULL);
186 	if (IS_ERR(priv->rst)) {
187 		dev_err(&pdev->dev,
188 			"missing or invalid reset controller device tree entry");
189 		return PTR_ERR(priv->rst);
190 	}
191 	reset_control_deassert(priv->rst);
192 
193 	priv->clk = devm_clk_get(drm->dev, NULL);
194 	if (IS_ERR(priv->clk)) {
195 		dev_err(&pdev->dev,
196 			"missing or invalid clk device tree entry");
197 		return PTR_ERR(priv->clk);
198 	}
199 	clk_prepare_enable(priv->clk);
200 
201 	/* Sanitize control registers */
202 	writel(0, priv->base + CRT_CTRL1);
203 	writel(0, priv->base + CRT_CTRL2);
204 
205 	ret = aspeed_gfx_setup_mode_config(drm);
206 	if (ret < 0)
207 		return ret;
208 
209 	ret = drm_vblank_init(drm, 1);
210 	if (ret < 0) {
211 		dev_err(drm->dev, "Failed to initialise vblank\n");
212 		return ret;
213 	}
214 
215 	ret = aspeed_gfx_create_output(drm);
216 	if (ret < 0) {
217 		dev_err(drm->dev, "Failed to create outputs\n");
218 		return ret;
219 	}
220 
221 	ret = aspeed_gfx_create_pipe(drm);
222 	if (ret < 0) {
223 		dev_err(drm->dev, "Cannot setup simple display pipe\n");
224 		return ret;
225 	}
226 
227 	ret = devm_request_irq(drm->dev, platform_get_irq(pdev, 0),
228 			       aspeed_gfx_irq_handler, 0, "aspeed gfx", drm);
229 	if (ret < 0) {
230 		dev_err(drm->dev, "Failed to install IRQ handler\n");
231 		return ret;
232 	}
233 
234 	drm_mode_config_reset(drm);
235 
236 	return 0;
237 }
238 
aspeed_gfx_unload(struct drm_device * drm)239 static void aspeed_gfx_unload(struct drm_device *drm)
240 {
241 	drm_kms_helper_poll_fini(drm);
242 }
243 
244 DEFINE_DRM_GEM_DMA_FOPS(fops);
245 
246 static const struct drm_driver aspeed_gfx_driver = {
247 	.driver_features        = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
248 	DRM_GEM_DMA_DRIVER_OPS,
249 	DRM_FBDEV_DMA_DRIVER_OPS,
250 	.fops = &fops,
251 	.name = "aspeed-gfx-drm",
252 	.desc = "ASPEED GFX DRM",
253 	.major = 1,
254 	.minor = 0,
255 };
256 
dac_mux_store(struct device * dev,struct device_attribute * attr,const char * buf,size_t count)257 static ssize_t dac_mux_store(struct device *dev, struct device_attribute *attr,
258 			     const char *buf, size_t count)
259 {
260 	struct aspeed_gfx *priv = dev_get_drvdata(dev);
261 	u32 val;
262 	int rc;
263 
264 	rc = kstrtou32(buf, 0, &val);
265 	if (rc)
266 		return rc;
267 
268 	if (val > 3)
269 		return -EINVAL;
270 
271 	rc = regmap_update_bits(priv->scu, priv->dac_reg, 0x30000, val << 16);
272 	if (rc < 0)
273 		return 0;
274 
275 	return count;
276 }
277 
dac_mux_show(struct device * dev,struct device_attribute * attr,char * buf)278 static ssize_t dac_mux_show(struct device *dev, struct device_attribute *attr, char *buf)
279 {
280 	struct aspeed_gfx *priv = dev_get_drvdata(dev);
281 	u32 reg;
282 	int rc;
283 
284 	rc = regmap_read(priv->scu, priv->dac_reg, &reg);
285 	if (rc)
286 		return rc;
287 
288 	return sprintf(buf, "%u\n", (reg >> 16) & 0x3);
289 }
290 static DEVICE_ATTR_RW(dac_mux);
291 
292 static ssize_t
vga_pw_show(struct device * dev,struct device_attribute * attr,char * buf)293 vga_pw_show(struct device *dev, struct device_attribute *attr, char *buf)
294 {
295 	struct aspeed_gfx *priv = dev_get_drvdata(dev);
296 	u32 reg;
297 	int rc;
298 
299 	rc = regmap_read(priv->scu, priv->vga_scratch_reg, &reg);
300 	if (rc)
301 		return rc;
302 
303 	return sprintf(buf, "%u\n", reg);
304 }
305 static DEVICE_ATTR_RO(vga_pw);
306 
307 static struct attribute *aspeed_sysfs_entries[] = {
308 	&dev_attr_vga_pw.attr,
309 	&dev_attr_dac_mux.attr,
310 	NULL,
311 };
312 
313 static struct attribute_group aspeed_sysfs_attr_group = {
314 	.attrs = aspeed_sysfs_entries,
315 };
316 
aspeed_gfx_probe(struct platform_device * pdev)317 static int aspeed_gfx_probe(struct platform_device *pdev)
318 {
319 	struct aspeed_gfx *priv;
320 	int ret;
321 
322 	priv = devm_drm_dev_alloc(&pdev->dev, &aspeed_gfx_driver,
323 				  struct aspeed_gfx, drm);
324 	if (IS_ERR(priv))
325 		return PTR_ERR(priv);
326 
327 	ret = aspeed_gfx_load(&priv->drm);
328 	if (ret)
329 		return ret;
330 
331 	platform_set_drvdata(pdev, priv);
332 
333 	ret = sysfs_create_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
334 	if (ret)
335 		return ret;
336 
337 	ret = drm_dev_register(&priv->drm, 0);
338 	if (ret)
339 		goto err_unload;
340 
341 	drm_client_setup(&priv->drm, NULL);
342 	return 0;
343 
344 err_unload:
345 	sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
346 	aspeed_gfx_unload(&priv->drm);
347 
348 	return ret;
349 }
350 
aspeed_gfx_remove(struct platform_device * pdev)351 static void aspeed_gfx_remove(struct platform_device *pdev)
352 {
353 	struct drm_device *drm = platform_get_drvdata(pdev);
354 
355 	sysfs_remove_group(&pdev->dev.kobj, &aspeed_sysfs_attr_group);
356 	drm_dev_unregister(drm);
357 	aspeed_gfx_unload(drm);
358 	drm_atomic_helper_shutdown(drm);
359 }
360 
aspeed_gfx_shutdown(struct platform_device * pdev)361 static void aspeed_gfx_shutdown(struct platform_device *pdev)
362 {
363 	drm_atomic_helper_shutdown(platform_get_drvdata(pdev));
364 }
365 
366 static struct platform_driver aspeed_gfx_platform_driver = {
367 	.probe		= aspeed_gfx_probe,
368 	.remove		= aspeed_gfx_remove,
369 	.shutdown	= aspeed_gfx_shutdown,
370 	.driver = {
371 		.name = "aspeed_gfx",
372 		.of_match_table = aspeed_gfx_match,
373 	},
374 };
375 
376 drm_module_platform_driver(aspeed_gfx_platform_driver);
377 
378 MODULE_AUTHOR("Joel Stanley <joel@jms.id.au>");
379 MODULE_DESCRIPTION("ASPEED BMC DRM/KMS driver");
380 MODULE_LICENSE("GPL");
381