1 /*
2 * Copyright 2012-15 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: AMD
23 *
24 */
25
26 #include "dm_services.h"
27
28 #include "atom.h"
29
30 #include "include/bios_parser_types.h"
31
32 #include "../command_table_helper.h"
33
signal_type_to_atom_dig_mode(enum signal_type s)34 static uint8_t signal_type_to_atom_dig_mode(enum signal_type s)
35 {
36 uint8_t atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP;
37
38 switch (s) {
39 case SIGNAL_TYPE_DISPLAY_PORT:
40 case SIGNAL_TYPE_EDP:
41 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP;
42 break;
43 case SIGNAL_TYPE_LVDS:
44 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_LVDS;
45 break;
46 case SIGNAL_TYPE_DVI_SINGLE_LINK:
47 case SIGNAL_TYPE_DVI_DUAL_LINK:
48 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DVI;
49 break;
50 case SIGNAL_TYPE_HDMI_TYPE_A:
51 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_HDMI;
52 break;
53 case SIGNAL_TYPE_DISPLAY_PORT_MST:
54 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DP_MST;
55 break;
56 default:
57 atom_dig_mode = ATOM_TRANSMITTER_DIGMODE_V5_DVI;
58 break;
59 }
60
61 return atom_dig_mode;
62 }
63
hpd_sel_to_atom(enum hpd_source_id id)64 static uint8_t hpd_sel_to_atom(enum hpd_source_id id)
65 {
66 uint8_t atom_hpd_sel = 0;
67
68 switch (id) {
69 case HPD_SOURCEID1:
70 atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD1_SEL;
71 break;
72 case HPD_SOURCEID2:
73 atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD2_SEL;
74 break;
75 case HPD_SOURCEID3:
76 atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD3_SEL;
77 break;
78 case HPD_SOURCEID4:
79 atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD4_SEL;
80 break;
81 case HPD_SOURCEID5:
82 atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD5_SEL;
83 break;
84 case HPD_SOURCEID6:
85 atom_hpd_sel = ATOM_TRANSMITTER_CONFIG_V5_HPD6_SEL;
86 break;
87 case HPD_SOURCEID_UNKNOWN:
88 default:
89 atom_hpd_sel = 0;
90 break;
91 }
92 return atom_hpd_sel >> 4;
93 }
94
dig_encoder_sel_to_atom(enum engine_id id)95 static uint8_t dig_encoder_sel_to_atom(enum engine_id id)
96 {
97 /* On any ASIC after DCE80, we manually program the DIG_FE
98 * selection (see connect_dig_be_to_fe function of the link
99 * encoder), so translation should always return 0 (no FE).
100 */
101
102 return 0;
103 }
104
clock_source_id_to_atom(enum clock_source_id id,uint32_t * atom_pll_id)105 static bool clock_source_id_to_atom(
106 enum clock_source_id id,
107 uint32_t *atom_pll_id)
108 {
109 bool result = true;
110
111 if (atom_pll_id != NULL)
112 switch (id) {
113 case CLOCK_SOURCE_ID_PLL0:
114 *atom_pll_id = ATOM_PPLL0;
115 break;
116 case CLOCK_SOURCE_ID_PLL1:
117 *atom_pll_id = ATOM_PPLL1;
118 break;
119 case CLOCK_SOURCE_ID_PLL2:
120 *atom_pll_id = ATOM_PPLL2;
121 break;
122 case CLOCK_SOURCE_ID_EXTERNAL:
123 *atom_pll_id = ATOM_PPLL_INVALID;
124 break;
125 case CLOCK_SOURCE_ID_DFS:
126 *atom_pll_id = ATOM_EXT_PLL1;
127 break;
128 case CLOCK_SOURCE_ID_VCE:
129 /* for VCE encoding,
130 * we need to pass in ATOM_PPLL_INVALID
131 */
132 *atom_pll_id = ATOM_PPLL_INVALID;
133 break;
134 case CLOCK_SOURCE_ID_DP_DTO:
135 /* When programming DP DTO PLL ID should be invalid */
136 *atom_pll_id = ATOM_PPLL_INVALID;
137 break;
138 case CLOCK_SOURCE_ID_UNDEFINED:
139 /* Should not happen */
140 *atom_pll_id = ATOM_PPLL_INVALID;
141 result = false;
142 break;
143 default:
144 result = false;
145 break;
146 }
147
148 return result;
149 }
150
encoder_action_to_atom(enum bp_encoder_control_action action)151 static uint8_t encoder_action_to_atom(enum bp_encoder_control_action action)
152 {
153 uint8_t atom_action = 0;
154
155 switch (action) {
156 case ENCODER_CONTROL_ENABLE:
157 atom_action = ATOM_ENABLE;
158 break;
159 case ENCODER_CONTROL_DISABLE:
160 atom_action = ATOM_DISABLE;
161 break;
162 case ENCODER_CONTROL_SETUP:
163 atom_action = ATOM_ENCODER_CMD_SETUP;
164 break;
165 case ENCODER_CONTROL_INIT:
166 atom_action = ATOM_ENCODER_INIT;
167 break;
168 default:
169 BREAK_TO_DEBUGGER(); /* Unhandle action in driver.!! */
170 break;
171 }
172
173 return atom_action;
174 }
175
disp_power_gating_action_to_atom(enum bp_pipe_control_action action)176 static uint8_t disp_power_gating_action_to_atom(
177 enum bp_pipe_control_action action)
178 {
179 uint8_t atom_pipe_action = 0;
180
181 switch (action) {
182 case ASIC_PIPE_DISABLE:
183 atom_pipe_action = ATOM_DISABLE;
184 break;
185 case ASIC_PIPE_ENABLE:
186 atom_pipe_action = ATOM_ENABLE;
187 break;
188 case ASIC_PIPE_INIT:
189 atom_pipe_action = ATOM_INIT;
190 break;
191 default:
192 ASSERT_CRITICAL(false); /* Unhandle action in driver! */
193 break;
194 }
195
196 return atom_pipe_action;
197 }
198
199 /* function table */
200 static const struct command_table_helper command_table_helper_funcs = {
201 .controller_id_to_atom = dal_cmd_table_helper_controller_id_to_atom,
202 .encoder_action_to_atom = encoder_action_to_atom,
203 .engine_bp_to_atom = engine_bp_to_atom,
204 .clock_source_id_to_atom = clock_source_id_to_atom,
205 .clock_source_id_to_atom_phy_clk_src_id =
206 clock_source_id_to_atom_phy_clk_src_id,
207 .signal_type_to_atom_dig_mode = signal_type_to_atom_dig_mode,
208 .hpd_sel_to_atom = hpd_sel_to_atom,
209 .dig_encoder_sel_to_atom = dig_encoder_sel_to_atom,
210 .phy_id_to_atom = phy_id_to_atom,
211 .disp_power_gating_action_to_atom = disp_power_gating_action_to_atom,
212 .assign_control_parameter = NULL,
213 .clock_source_id_to_ref_clk_src = NULL,
214 .transmitter_bp_to_atom = NULL,
215 .encoder_id_to_atom = dal_cmd_table_helper_encoder_id_to_atom,
216 .encoder_mode_bp_to_atom = dal_cmd_table_helper_encoder_mode_bp_to_atom,
217 };
218
219 /*
220 * dal_cmd_tbl_helper_dce110_get_table
221 *
222 * @brief
223 * Initialize command table helper functions
224 *
225 * @param
226 * const struct command_table_helper **h - [out] struct of functions
227 *
228 */
dal_cmd_tbl_helper_dce110_get_table(void)229 const struct command_table_helper *dal_cmd_tbl_helper_dce110_get_table(void)
230 {
231 return &command_table_helper_funcs;
232 }
233