1 /*
2  * Copyright 2019 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "amdgpu_dm_hdcp.h"
27 #include "amdgpu.h"
28 #include "amdgpu_dm.h"
29 #include "dm_helpers.h"
30 #include <drm/display/drm_hdcp_helper.h>
31 #include "hdcp_psp.h"
32 
33 /*
34  * If the SRM version being loaded is less than or equal to the
35  * currently loaded SRM, psp will return 0xFFFF as the version
36  */
37 #define PSP_SRM_VERSION_MAX 0xFFFF
38 
39 static bool
lp_write_i2c(void * handle,uint32_t address,const uint8_t * data,uint32_t size)40 lp_write_i2c(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
41 {
42 	struct dc_link *link = handle;
43 	struct i2c_payload i2c_payloads[] = {{true, address, size, (void *)data} };
44 	struct i2c_command cmd = {i2c_payloads, 1, I2C_COMMAND_ENGINE_HW,
45 				  link->dc->caps.i2c_speed_in_khz};
46 
47 	return dm_helpers_submit_i2c(link->ctx, link, &cmd);
48 }
49 
50 static bool
lp_read_i2c(void * handle,uint32_t address,uint8_t offset,uint8_t * data,uint32_t size)51 lp_read_i2c(void *handle, uint32_t address, uint8_t offset, uint8_t *data, uint32_t size)
52 {
53 	struct dc_link *link = handle;
54 
55 	struct i2c_payload i2c_payloads[] = {{true, address, 1, &offset},
56 					     {false, address, size, data} };
57 	struct i2c_command cmd = {i2c_payloads, 2, I2C_COMMAND_ENGINE_HW,
58 				  link->dc->caps.i2c_speed_in_khz};
59 
60 	return dm_helpers_submit_i2c(link->ctx, link, &cmd);
61 }
62 
63 static bool
lp_write_dpcd(void * handle,uint32_t address,const uint8_t * data,uint32_t size)64 lp_write_dpcd(void *handle, uint32_t address, const uint8_t *data, uint32_t size)
65 {
66 	struct dc_link *link = handle;
67 
68 	return dm_helpers_dp_write_dpcd(link->ctx, link, address, data, size);
69 }
70 
71 static bool
lp_read_dpcd(void * handle,uint32_t address,uint8_t * data,uint32_t size)72 lp_read_dpcd(void *handle, uint32_t address, uint8_t *data, uint32_t size)
73 {
74 	struct dc_link *link = handle;
75 
76 	return dm_helpers_dp_read_dpcd(link->ctx, link, address, data, size);
77 }
78 
psp_get_srm(struct psp_context * psp,uint32_t * srm_version,uint32_t * srm_size)79 static uint8_t *psp_get_srm(struct psp_context *psp, uint32_t *srm_version, uint32_t *srm_size)
80 {
81 	struct ta_hdcp_shared_memory *hdcp_cmd;
82 
83 	if (!psp->hdcp_context.context.initialized) {
84 		DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
85 		return NULL;
86 	}
87 
88 	hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.context.mem_context.shared_buf;
89 	memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
90 
91 	hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_GET_SRM;
92 	psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
93 
94 	if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS)
95 		return NULL;
96 
97 	*srm_version = hdcp_cmd->out_msg.hdcp_get_srm.srm_version;
98 	*srm_size = hdcp_cmd->out_msg.hdcp_get_srm.srm_buf_size;
99 
100 	return hdcp_cmd->out_msg.hdcp_get_srm.srm_buf;
101 }
102 
psp_set_srm(struct psp_context * psp,u8 * srm,uint32_t srm_size,uint32_t * srm_version)103 static int psp_set_srm(struct psp_context *psp,
104 		       u8 *srm, uint32_t srm_size, uint32_t *srm_version)
105 {
106 	struct ta_hdcp_shared_memory *hdcp_cmd;
107 
108 	if (!psp->hdcp_context.context.initialized) {
109 		DRM_WARN("Failed to get hdcp srm. HDCP TA is not initialized.");
110 		return -EINVAL;
111 	}
112 
113 	hdcp_cmd = (struct ta_hdcp_shared_memory *)psp->hdcp_context.context.mem_context.shared_buf;
114 	memset(hdcp_cmd, 0, sizeof(struct ta_hdcp_shared_memory));
115 
116 	memcpy(hdcp_cmd->in_msg.hdcp_set_srm.srm_buf, srm, srm_size);
117 	hdcp_cmd->in_msg.hdcp_set_srm.srm_buf_size = srm_size;
118 	hdcp_cmd->cmd_id = TA_HDCP_COMMAND__HDCP_SET_SRM;
119 
120 	psp_hdcp_invoke(psp, hdcp_cmd->cmd_id);
121 
122 	if (hdcp_cmd->hdcp_status != TA_HDCP_STATUS__SUCCESS ||
123 	    hdcp_cmd->out_msg.hdcp_set_srm.valid_signature != 1 ||
124 	    hdcp_cmd->out_msg.hdcp_set_srm.srm_version == PSP_SRM_VERSION_MAX)
125 		return -EINVAL;
126 
127 	*srm_version = hdcp_cmd->out_msg.hdcp_set_srm.srm_version;
128 	return 0;
129 }
130 
process_output(struct hdcp_workqueue * hdcp_work)131 static void process_output(struct hdcp_workqueue *hdcp_work)
132 {
133 	struct mod_hdcp_output output = hdcp_work->output;
134 
135 	if (output.callback_stop)
136 		cancel_delayed_work(&hdcp_work->callback_dwork);
137 
138 	if (output.callback_needed)
139 		schedule_delayed_work(&hdcp_work->callback_dwork,
140 				      msecs_to_jiffies(output.callback_delay));
141 
142 	if (output.watchdog_timer_stop)
143 		cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
144 
145 	if (output.watchdog_timer_needed)
146 		schedule_delayed_work(&hdcp_work->watchdog_timer_dwork,
147 				      msecs_to_jiffies(output.watchdog_timer_delay));
148 
149 	schedule_delayed_work(&hdcp_work->property_validate_dwork, msecs_to_jiffies(0));
150 }
151 
link_lock(struct hdcp_workqueue * work,bool lock)152 static void link_lock(struct hdcp_workqueue *work, bool lock)
153 {
154 	int i = 0;
155 
156 	for (i = 0; i < work->max_link; i++) {
157 		if (lock)
158 			mutex_lock(&work[i].mutex);
159 		else
160 			mutex_unlock(&work[i].mutex);
161 	}
162 }
163 
hdcp_update_display(struct hdcp_workqueue * hdcp_work,unsigned int link_index,struct amdgpu_dm_connector * aconnector,u8 content_type,bool enable_encryption)164 void hdcp_update_display(struct hdcp_workqueue *hdcp_work,
165 			 unsigned int link_index,
166 			 struct amdgpu_dm_connector *aconnector,
167 			 u8 content_type,
168 			 bool enable_encryption)
169 {
170 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
171 	struct mod_hdcp_link_adjustment link_adjust;
172 	struct mod_hdcp_display_adjustment display_adjust;
173 	unsigned int conn_index = aconnector->base.index;
174 
175 	guard(mutex)(&hdcp_w->mutex);
176 	drm_connector_get(&aconnector->base);
177 	if (hdcp_w->aconnector[conn_index])
178 		drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
179 	hdcp_w->aconnector[conn_index] = aconnector;
180 
181 	memset(&link_adjust, 0, sizeof(link_adjust));
182 	memset(&display_adjust, 0, sizeof(display_adjust));
183 
184 	if (enable_encryption) {
185 		/* Explicitly set the saved SRM as sysfs call will be after we already enabled hdcp
186 		 * (s3 resume case)
187 		 */
188 		if (hdcp_work->srm_size > 0)
189 			psp_set_srm(hdcp_work->hdcp.config.psp.handle, hdcp_work->srm,
190 				    hdcp_work->srm_size,
191 				    &hdcp_work->srm_version);
192 
193 		display_adjust.disable = MOD_HDCP_DISPLAY_NOT_DISABLE;
194 
195 		link_adjust.auth_delay = 2;
196 
197 		if (content_type == DRM_MODE_HDCP_CONTENT_TYPE0) {
198 			link_adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_0;
199 		} else if (content_type == DRM_MODE_HDCP_CONTENT_TYPE1) {
200 			link_adjust.hdcp1.disable = 1;
201 			link_adjust.hdcp2.force_type = MOD_HDCP_FORCE_TYPE_1;
202 		}
203 
204 		schedule_delayed_work(&hdcp_w->property_validate_dwork,
205 				      msecs_to_jiffies(DRM_HDCP_CHECK_PERIOD_MS));
206 	} else {
207 		display_adjust.disable = MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
208 		hdcp_w->encryption_status[conn_index] = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
209 		cancel_delayed_work(&hdcp_w->property_validate_dwork);
210 	}
211 
212 	mod_hdcp_update_display(&hdcp_w->hdcp, conn_index, &link_adjust, &display_adjust, &hdcp_w->output);
213 
214 	process_output(hdcp_w);
215 }
216 
hdcp_remove_display(struct hdcp_workqueue * hdcp_work,unsigned int link_index,struct amdgpu_dm_connector * aconnector)217 static void hdcp_remove_display(struct hdcp_workqueue *hdcp_work,
218 				unsigned int link_index,
219 			 struct amdgpu_dm_connector *aconnector)
220 {
221 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
222 	struct drm_connector_state *conn_state = aconnector->base.state;
223 	unsigned int conn_index = aconnector->base.index;
224 
225 	guard(mutex)(&hdcp_w->mutex);
226 
227 	/* the removal of display will invoke auth reset -> hdcp destroy and
228 	 * we'd expect the Content Protection (CP) property changed back to
229 	 * DESIRED if at the time ENABLED. CP property change should occur
230 	 * before the element removed from linked list.
231 	 */
232 	if (conn_state && conn_state->content_protection == DRM_MODE_CONTENT_PROTECTION_ENABLED) {
233 		conn_state->content_protection = DRM_MODE_CONTENT_PROTECTION_DESIRED;
234 
235 		DRM_DEBUG_DRIVER("[HDCP_DM] display %d, CP 2 -> 1, type %u, DPMS %u\n",
236 				 aconnector->base.index, conn_state->hdcp_content_type,
237 				 aconnector->base.dpms);
238 	}
239 
240 	mod_hdcp_remove_display(&hdcp_w->hdcp, aconnector->base.index, &hdcp_w->output);
241 	if (hdcp_w->aconnector[conn_index]) {
242 		drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
243 		hdcp_w->aconnector[conn_index] = NULL;
244 	}
245 	process_output(hdcp_w);
246 }
247 
hdcp_reset_display(struct hdcp_workqueue * hdcp_work,unsigned int link_index)248 void hdcp_reset_display(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
249 {
250 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
251 	unsigned int conn_index;
252 
253 	guard(mutex)(&hdcp_w->mutex);
254 
255 	mod_hdcp_reset_connection(&hdcp_w->hdcp,  &hdcp_w->output);
256 
257 	cancel_delayed_work(&hdcp_w->property_validate_dwork);
258 
259 	for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX; conn_index++) {
260 		hdcp_w->encryption_status[conn_index] =
261 			MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
262 		if (hdcp_w->aconnector[conn_index]) {
263 			drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
264 			hdcp_w->aconnector[conn_index] = NULL;
265 		}
266 	}
267 
268 	process_output(hdcp_w);
269 }
270 
hdcp_handle_cpirq(struct hdcp_workqueue * hdcp_work,unsigned int link_index)271 void hdcp_handle_cpirq(struct hdcp_workqueue *hdcp_work, unsigned int link_index)
272 {
273 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
274 
275 	schedule_work(&hdcp_w->cpirq_work);
276 }
277 
event_callback(struct work_struct * work)278 static void event_callback(struct work_struct *work)
279 {
280 	struct hdcp_workqueue *hdcp_work;
281 
282 	hdcp_work = container_of(to_delayed_work(work), struct hdcp_workqueue,
283 				 callback_dwork);
284 
285 	guard(mutex)(&hdcp_work->mutex);
286 
287 	cancel_delayed_work(&hdcp_work->callback_dwork);
288 
289 	mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CALLBACK,
290 			       &hdcp_work->output);
291 
292 	process_output(hdcp_work);
293 }
294 
event_property_update(struct work_struct * work)295 static void event_property_update(struct work_struct *work)
296 {
297 	struct hdcp_workqueue *hdcp_work = container_of(work, struct hdcp_workqueue,
298 							property_update_work);
299 	struct amdgpu_dm_connector *aconnector = NULL;
300 	struct drm_device *dev;
301 	long ret;
302 	unsigned int conn_index;
303 	struct drm_connector *connector;
304 	struct drm_connector_state *conn_state;
305 
306 	for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX; conn_index++) {
307 		aconnector = hdcp_work->aconnector[conn_index];
308 
309 		if (!aconnector)
310 			continue;
311 
312 		connector = &aconnector->base;
313 
314 		/* check if display connected */
315 		if (connector->status != connector_status_connected)
316 			continue;
317 
318 		conn_state = aconnector->base.state;
319 
320 		if (!conn_state)
321 			continue;
322 
323 		dev = connector->dev;
324 
325 		if (!dev)
326 			continue;
327 
328 		drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
329 		guard(mutex)(&hdcp_work->mutex);
330 
331 		if (conn_state->commit) {
332 			ret = wait_for_completion_interruptible_timeout(&conn_state->commit->hw_done,
333 									10 * HZ);
334 			if (ret == 0) {
335 				DRM_ERROR("HDCP state unknown! Setting it to DESIRED\n");
336 				hdcp_work->encryption_status[conn_index] =
337 					MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
338 			}
339 		}
340 		if (hdcp_work->encryption_status[conn_index] !=
341 			MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF) {
342 			if (conn_state->hdcp_content_type ==
343 				DRM_MODE_HDCP_CONTENT_TYPE0 &&
344 				hdcp_work->encryption_status[conn_index] <=
345 				MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE0_ON) {
346 				DRM_DEBUG_DRIVER("[HDCP_DM] DRM_MODE_CONTENT_PROTECTION_ENABLED\n");
347 				drm_hdcp_update_content_protection(connector,
348 								   DRM_MODE_CONTENT_PROTECTION_ENABLED);
349 			} else if (conn_state->hdcp_content_type ==
350 					DRM_MODE_HDCP_CONTENT_TYPE1 &&
351 					hdcp_work->encryption_status[conn_index] ==
352 					MOD_HDCP_ENCRYPTION_STATUS_HDCP2_TYPE1_ON) {
353 				drm_hdcp_update_content_protection(connector,
354 								   DRM_MODE_CONTENT_PROTECTION_ENABLED);
355 			}
356 		} else {
357 			DRM_DEBUG_DRIVER("[HDCP_DM] DRM_MODE_CONTENT_PROTECTION_DESIRED\n");
358 			drm_hdcp_update_content_protection(connector,
359 							   DRM_MODE_CONTENT_PROTECTION_DESIRED);
360 		}
361 		drm_modeset_unlock(&dev->mode_config.connection_mutex);
362 	}
363 }
364 
event_property_validate(struct work_struct * work)365 static void event_property_validate(struct work_struct *work)
366 {
367 	struct hdcp_workqueue *hdcp_work =
368 		container_of(to_delayed_work(work), struct hdcp_workqueue, property_validate_dwork);
369 	struct mod_hdcp_display_query query;
370 	struct amdgpu_dm_connector *aconnector;
371 	unsigned int conn_index;
372 
373 	guard(mutex)(&hdcp_work->mutex);
374 
375 	for (conn_index = 0; conn_index < AMDGPU_DM_MAX_DISPLAY_INDEX;
376 	     conn_index++) {
377 		aconnector = hdcp_work->aconnector[conn_index];
378 
379 		if (!aconnector)
380 			continue;
381 
382 		/* check if display connected */
383 		if (aconnector->base.status != connector_status_connected)
384 			continue;
385 
386 		if (!aconnector->base.state)
387 			continue;
388 
389 		query.encryption_status = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
390 		mod_hdcp_query_display(&hdcp_work->hdcp, aconnector->base.index,
391 				       &query);
392 
393 		DRM_DEBUG_DRIVER("[HDCP_DM] disp %d, connector->CP %u, (query, work): (%d, %d)\n",
394 				 aconnector->base.index,
395 			aconnector->base.state->content_protection,
396 			query.encryption_status,
397 			hdcp_work->encryption_status[conn_index]);
398 
399 		if (query.encryption_status !=
400 		    hdcp_work->encryption_status[conn_index]) {
401 			DRM_DEBUG_DRIVER("[HDCP_DM] encryption_status change from %x to %x\n",
402 					 hdcp_work->encryption_status[conn_index],
403 					 query.encryption_status);
404 
405 			hdcp_work->encryption_status[conn_index] =
406 				query.encryption_status;
407 
408 			DRM_DEBUG_DRIVER("[HDCP_DM] trigger property_update_work\n");
409 
410 			schedule_work(&hdcp_work->property_update_work);
411 		}
412 	}
413 }
414 
event_watchdog_timer(struct work_struct * work)415 static void event_watchdog_timer(struct work_struct *work)
416 {
417 	struct hdcp_workqueue *hdcp_work;
418 
419 	hdcp_work = container_of(to_delayed_work(work),
420 				 struct hdcp_workqueue,
421 				      watchdog_timer_dwork);
422 
423 	guard(mutex)(&hdcp_work->mutex);
424 
425 	cancel_delayed_work(&hdcp_work->watchdog_timer_dwork);
426 
427 	mod_hdcp_process_event(&hdcp_work->hdcp,
428 			       MOD_HDCP_EVENT_WATCHDOG_TIMEOUT,
429 			       &hdcp_work->output);
430 
431 	process_output(hdcp_work);
432 }
433 
event_cpirq(struct work_struct * work)434 static void event_cpirq(struct work_struct *work)
435 {
436 	struct hdcp_workqueue *hdcp_work;
437 
438 	hdcp_work = container_of(work, struct hdcp_workqueue, cpirq_work);
439 
440 	guard(mutex)(&hdcp_work->mutex);
441 
442 	mod_hdcp_process_event(&hdcp_work->hdcp, MOD_HDCP_EVENT_CPIRQ, &hdcp_work->output);
443 
444 	process_output(hdcp_work);
445 }
446 
hdcp_destroy(struct kobject * kobj,struct hdcp_workqueue * hdcp_work)447 void hdcp_destroy(struct kobject *kobj, struct hdcp_workqueue *hdcp_work)
448 {
449 	int i = 0;
450 
451 	for (i = 0; i < hdcp_work->max_link; i++) {
452 		cancel_delayed_work_sync(&hdcp_work[i].callback_dwork);
453 		cancel_delayed_work_sync(&hdcp_work[i].watchdog_timer_dwork);
454 		cancel_delayed_work_sync(&hdcp_work[i].property_validate_dwork);
455 	}
456 
457 	sysfs_remove_bin_file(kobj, &hdcp_work[0].attr);
458 	kfree(hdcp_work->srm);
459 	kfree(hdcp_work->srm_temp);
460 	kfree(hdcp_work);
461 }
462 
enable_assr(void * handle,struct dc_link * link)463 static bool enable_assr(void *handle, struct dc_link *link)
464 {
465 	struct hdcp_workqueue *hdcp_work = handle;
466 	struct mod_hdcp hdcp = hdcp_work->hdcp;
467 	struct psp_context *psp = hdcp.config.psp.handle;
468 	struct ta_dtm_shared_memory *dtm_cmd;
469 
470 	if (!psp->dtm_context.context.initialized) {
471 		DRM_INFO("Failed to enable ASSR, DTM TA is not initialized.");
472 		return false;
473 	}
474 
475 	dtm_cmd = (struct ta_dtm_shared_memory *)psp->dtm_context.context.mem_context.shared_buf;
476 
477 	guard(mutex)(&psp->dtm_context.mutex);
478 	memset(dtm_cmd, 0, sizeof(struct ta_dtm_shared_memory));
479 
480 	dtm_cmd->cmd_id = TA_DTM_COMMAND__TOPOLOGY_ASSR_ENABLE;
481 	dtm_cmd->dtm_in_message.topology_assr_enable.display_topology_dig_be_index =
482 		link->link_enc_hw_inst;
483 	dtm_cmd->dtm_status = TA_DTM_STATUS__GENERIC_FAILURE;
484 
485 	psp_dtm_invoke(psp, dtm_cmd->cmd_id);
486 
487 	if (dtm_cmd->dtm_status != TA_DTM_STATUS__SUCCESS) {
488 		DRM_INFO("Failed to enable ASSR");
489 		return false;
490 	}
491 
492 	return true;
493 }
494 
update_config(void * handle,struct cp_psp_stream_config * config)495 static void update_config(void *handle, struct cp_psp_stream_config *config)
496 {
497 	struct hdcp_workqueue *hdcp_work = handle;
498 	struct amdgpu_dm_connector *aconnector = config->dm_stream_ctx;
499 	int link_index = aconnector->dc_link->link_index;
500 	unsigned int conn_index = aconnector->base.index;
501 	struct mod_hdcp_display *display = &hdcp_work[link_index].display;
502 	struct mod_hdcp_link *link = &hdcp_work[link_index].link;
503 	struct hdcp_workqueue *hdcp_w = &hdcp_work[link_index];
504 	struct dc_sink *sink = NULL;
505 	bool link_is_hdcp14 = false;
506 
507 	if (config->dpms_off) {
508 		hdcp_remove_display(hdcp_work, link_index, aconnector);
509 		return;
510 	}
511 
512 	memset(display, 0, sizeof(*display));
513 	memset(link, 0, sizeof(*link));
514 
515 	display->index = aconnector->base.index;
516 	display->state = MOD_HDCP_DISPLAY_ACTIVE;
517 
518 	if (aconnector->dc_sink)
519 		sink = aconnector->dc_sink;
520 	else if (aconnector->dc_em_sink)
521 		sink = aconnector->dc_em_sink;
522 
523 	if (sink)
524 		link->mode = mod_hdcp_signal_type_to_operation_mode(sink->sink_signal);
525 
526 	display->controller = CONTROLLER_ID_D0 + config->otg_inst;
527 	display->dig_fe = config->dig_fe;
528 	link->dig_be = config->dig_be;
529 	link->ddc_line = aconnector->dc_link->ddc_hw_inst + 1;
530 	display->stream_enc_idx = config->stream_enc_idx;
531 	link->link_enc_idx = config->link_enc_idx;
532 	link->dio_output_id = config->dio_output_idx;
533 	link->phy_idx = config->phy_idx;
534 
535 	if (sink)
536 		link_is_hdcp14 = dc_link_is_hdcp14(aconnector->dc_link, sink->sink_signal);
537 	link->hdcp_supported_informational = link_is_hdcp14;
538 	link->dp.rev = aconnector->dc_link->dpcd_caps.dpcd_rev.raw;
539 	link->dp.assr_enabled = config->assr_enabled;
540 	link->dp.mst_enabled = config->mst_enabled;
541 	link->dp.dp2_enabled = config->dp2_enabled;
542 	link->dp.usb4_enabled = config->usb4_enabled;
543 	display->adjust.disable = MOD_HDCP_DISPLAY_DISABLE_AUTHENTICATION;
544 	link->adjust.auth_delay = 2;
545 	link->adjust.hdcp1.disable = 0;
546 	hdcp_w->encryption_status[display->index] = MOD_HDCP_ENCRYPTION_STATUS_HDCP_OFF;
547 
548 	DRM_DEBUG_DRIVER("[HDCP_DM] display %d, CP %d, type %d\n", aconnector->base.index,
549 			 (!!aconnector->base.state) ?
550 			 aconnector->base.state->content_protection : -1,
551 			 (!!aconnector->base.state) ?
552 			 aconnector->base.state->hdcp_content_type : -1);
553 
554 	guard(mutex)(&hdcp_w->mutex);
555 
556 	mod_hdcp_add_display(&hdcp_w->hdcp, link, display, &hdcp_w->output);
557 	drm_connector_get(&aconnector->base);
558 	if (hdcp_w->aconnector[conn_index])
559 		drm_connector_put(&hdcp_w->aconnector[conn_index]->base);
560 	hdcp_w->aconnector[conn_index] = aconnector;
561 	process_output(hdcp_w);
562 }
563 
564 /**
565  * DOC: Add sysfs interface for set/get srm
566  *
567  * NOTE: From the usermodes prospective you only need to call write *ONCE*, the kernel
568  *      will automatically call once or twice depending on the size
569  *
570  * call: "cat file > /sys/class/drm/card0/device/hdcp_srm" from usermode no matter what the size is
571  *
572  * The kernel can only send PAGE_SIZE at once and since MAX_SRM_FILE(5120) > PAGE_SIZE(4096),
573  * srm_data_write can be called multiple times.
574  *
575  * sysfs interface doesn't tell us the size we will get so we are sending partial SRMs to psp and on
576  * the last call we will send the full SRM. PSP will fail on every call before the last.
577  *
578  * This means we don't know if the SRM is good until the last call. And because of this
579  * limitation we cannot throw errors early as it will stop the kernel from writing to sysfs
580  *
581  * Example 1:
582  *	Good SRM size = 5096
583  *	first call to write 4096 -> PSP fails
584  *	Second call to write 1000 -> PSP Pass -> SRM is set
585  *
586  * Example 2:
587  *	Bad SRM size = 4096
588  *	first call to write 4096 -> PSP fails (This is the same as above, but we don't know if this
589  *	is the last call)
590  *
591  * Solution?:
592  *	1: Parse the SRM? -> It is signed so we don't know the EOF
593  *	2: We can have another sysfs that passes the size before calling set. -> simpler solution
594  *	below
595  *
596  * Easy Solution:
597  * Always call get after Set to verify if set was successful.
598  * +----------------------+
599  * |   Why it works:      |
600  * +----------------------+
601  * PSP will only update its srm if its older than the one we are trying to load.
602  * Always do set first than get.
603  *	-if we try to "1. SET" a older version PSP will reject it and we can "2. GET" the newer
604  *	version and save it
605  *
606  *	-if we try to "1. SET" a newer version PSP will accept it and we can "2. GET" the
607  *	same(newer) version back and save it
608  *
609  *	-if we try to "1. SET" a newer version and PSP rejects it. That means the format is
610  *	incorrect/corrupted and we should correct our SRM by getting it from PSP
611  */
srm_data_write(struct file * filp,struct kobject * kobj,const struct bin_attribute * bin_attr,char * buffer,loff_t pos,size_t count)612 static ssize_t srm_data_write(struct file *filp, struct kobject *kobj,
613 			      const struct bin_attribute *bin_attr, char *buffer,
614 			      loff_t pos, size_t count)
615 {
616 	struct hdcp_workqueue *work;
617 	u32 srm_version = 0;
618 
619 	work = container_of(bin_attr, struct hdcp_workqueue, attr);
620 	link_lock(work, true);
621 
622 	memcpy(work->srm_temp + pos, buffer, count);
623 
624 	if (!psp_set_srm(work->hdcp.config.psp.handle, work->srm_temp, pos + count, &srm_version)) {
625 		DRM_DEBUG_DRIVER("HDCP SRM SET version 0x%X", srm_version);
626 		memcpy(work->srm, work->srm_temp, pos + count);
627 		work->srm_size = pos + count;
628 		work->srm_version = srm_version;
629 	}
630 
631 	link_lock(work, false);
632 
633 	return count;
634 }
635 
srm_data_read(struct file * filp,struct kobject * kobj,const struct bin_attribute * bin_attr,char * buffer,loff_t pos,size_t count)636 static ssize_t srm_data_read(struct file *filp, struct kobject *kobj,
637 			     const struct bin_attribute *bin_attr, char *buffer,
638 			     loff_t pos, size_t count)
639 {
640 	struct hdcp_workqueue *work;
641 	u8 *srm = NULL;
642 	u32 srm_version;
643 	u32 srm_size;
644 	size_t ret = count;
645 
646 	work = container_of(bin_attr, struct hdcp_workqueue, attr);
647 
648 	link_lock(work, true);
649 
650 	srm = psp_get_srm(work->hdcp.config.psp.handle, &srm_version, &srm_size);
651 
652 	if (!srm) {
653 		ret = -EINVAL;
654 		goto ret;
655 	}
656 
657 	if (pos >= srm_size)
658 		ret = 0;
659 
660 	if (srm_size - pos < count) {
661 		memcpy(buffer, srm + pos, srm_size - pos);
662 		ret = srm_size - pos;
663 		goto ret;
664 	}
665 
666 	memcpy(buffer, srm + pos, count);
667 
668 ret:
669 	link_lock(work, false);
670 	return ret;
671 }
672 
673 /* From the hdcp spec (5.Renewability) SRM needs to be stored in a non-volatile memory.
674  *
675  * For example,
676  *	if Application "A" sets the SRM (ver 2) and we reboot/suspend and later when Application "B"
677  *	needs to use HDCP, the version in PSP should be SRM(ver 2). So SRM should be persistent
678  *	across boot/reboots/suspend/resume/shutdown
679  *
680  * Currently when the system goes down (suspend/shutdown) the SRM is cleared from PSP. For HDCP
681  * we need to make the SRM persistent.
682  *
683  * -PSP owns the checking of SRM but doesn't have the ability to store it in a non-volatile memory.
684  * -The kernel cannot write to the file systems.
685  * -So we need usermode to do this for us, which is why an interface for usermode is needed
686  *
687  *
688  *
689  * Usermode can read/write to/from PSP using the sysfs interface
690  * For example:
691  *	to save SRM from PSP to storage : cat /sys/class/drm/card0/device/hdcp_srm > srmfile
692  *	to load from storage to PSP: cat srmfile > /sys/class/drm/card0/device/hdcp_srm
693  */
694 static const struct bin_attribute data_attr = {
695 	.attr = {.name = "hdcp_srm", .mode = 0664},
696 	.size = PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE, /* Limit SRM size */
697 	.write_new = srm_data_write,
698 	.read_new = srm_data_read,
699 };
700 
hdcp_create_workqueue(struct amdgpu_device * adev,struct cp_psp * cp_psp,struct dc * dc)701 struct hdcp_workqueue *hdcp_create_workqueue(struct amdgpu_device *adev,
702 					     struct cp_psp *cp_psp, struct dc *dc)
703 {
704 	int max_caps = dc->caps.max_links;
705 	struct hdcp_workqueue *hdcp_work;
706 	int i = 0;
707 
708 	hdcp_work = kcalloc(max_caps, sizeof(*hdcp_work), GFP_KERNEL);
709 	if (ZERO_OR_NULL_PTR(hdcp_work))
710 		return NULL;
711 
712 	hdcp_work->srm = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE,
713 				 sizeof(*hdcp_work->srm), GFP_KERNEL);
714 
715 	if (!hdcp_work->srm)
716 		goto fail_alloc_context;
717 
718 	hdcp_work->srm_temp = kcalloc(PSP_HDCP_SRM_FIRST_GEN_MAX_SIZE,
719 				      sizeof(*hdcp_work->srm_temp), GFP_KERNEL);
720 
721 	if (!hdcp_work->srm_temp)
722 		goto fail_alloc_context;
723 
724 	hdcp_work->max_link = max_caps;
725 
726 	for (i = 0; i < max_caps; i++) {
727 		mutex_init(&hdcp_work[i].mutex);
728 
729 		INIT_WORK(&hdcp_work[i].cpirq_work, event_cpirq);
730 		INIT_WORK(&hdcp_work[i].property_update_work, event_property_update);
731 		INIT_DELAYED_WORK(&hdcp_work[i].callback_dwork, event_callback);
732 		INIT_DELAYED_WORK(&hdcp_work[i].watchdog_timer_dwork, event_watchdog_timer);
733 		INIT_DELAYED_WORK(&hdcp_work[i].property_validate_dwork, event_property_validate);
734 
735 		hdcp_work[i].hdcp.config.psp.handle = &adev->psp;
736 		if (dc->ctx->dce_version == DCN_VERSION_3_1 ||
737 		    dc->ctx->dce_version == DCN_VERSION_3_14 ||
738 		    dc->ctx->dce_version == DCN_VERSION_3_15 ||
739 		    dc->ctx->dce_version == DCN_VERSION_3_5 ||
740 		    dc->ctx->dce_version == DCN_VERSION_3_51 ||
741 		    dc->ctx->dce_version == DCN_VERSION_3_6 ||
742 		    dc->ctx->dce_version == DCN_VERSION_3_16)
743 			hdcp_work[i].hdcp.config.psp.caps.dtm_v3_supported = 1;
744 		hdcp_work[i].hdcp.config.ddc.handle = dc_get_link_at_index(dc, i);
745 		hdcp_work[i].hdcp.config.ddc.funcs.write_i2c = lp_write_i2c;
746 		hdcp_work[i].hdcp.config.ddc.funcs.read_i2c = lp_read_i2c;
747 		hdcp_work[i].hdcp.config.ddc.funcs.write_dpcd = lp_write_dpcd;
748 		hdcp_work[i].hdcp.config.ddc.funcs.read_dpcd = lp_read_dpcd;
749 
750 		memset(hdcp_work[i].aconnector, 0,
751 		       sizeof(struct amdgpu_dm_connector *) *
752 			       AMDGPU_DM_MAX_DISPLAY_INDEX);
753 		memset(hdcp_work[i].encryption_status, 0,
754 		       sizeof(enum mod_hdcp_encryption_status) *
755 			       AMDGPU_DM_MAX_DISPLAY_INDEX);
756 	}
757 
758 	cp_psp->funcs.update_stream_config = update_config;
759 	cp_psp->funcs.enable_assr = enable_assr;
760 	cp_psp->handle = hdcp_work;
761 
762 	/* File created at /sys/class/drm/card0/device/hdcp_srm*/
763 	hdcp_work[0].attr = data_attr;
764 	sysfs_bin_attr_init(&hdcp_work[0].attr);
765 
766 	if (sysfs_create_bin_file(&adev->dev->kobj, &hdcp_work[0].attr))
767 		DRM_WARN("Failed to create device file hdcp_srm");
768 
769 	return hdcp_work;
770 
771 fail_alloc_context:
772 	kfree(hdcp_work->srm);
773 	kfree(hdcp_work->srm_temp);
774 	kfree(hdcp_work);
775 
776 	return NULL;
777 }
778 
779