1 // SPDX-License-Identifier: GPL-2.0 OR MIT
2 /*
3 * Copyright 2014-2022 Advanced Micro Devices, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
21 * OTHER DEALINGS IN THE SOFTWARE.
22 */
23
24 #include <linux/types.h>
25 #include <linux/kernel.h>
26 #include <linux/pci.h>
27 #include <linux/errno.h>
28 #include <linux/acpi.h>
29 #include <linux/hash.h>
30 #include <linux/cpufreq.h>
31 #include <linux/log2.h>
32 #include <linux/dmi.h>
33 #include <linux/atomic.h>
34 #include <linux/crc16.h>
35
36 #include "kfd_priv.h"
37 #include "kfd_crat.h"
38 #include "kfd_topology.h"
39 #include "kfd_device_queue_manager.h"
40 #include "kfd_svm.h"
41 #include "kfd_debug.h"
42 #include "amdgpu_amdkfd.h"
43 #include "amdgpu_ras.h"
44 #include "amdgpu.h"
45
46 /* topology_device_list - Master list of all topology devices */
47 static struct list_head topology_device_list;
48 static struct kfd_system_properties sys_props;
49
50 static DECLARE_RWSEM(topology_lock);
51 static uint32_t topology_crat_proximity_domain;
52
kfd_topology_device_by_proximity_domain_no_lock(uint32_t proximity_domain)53 struct kfd_topology_device *kfd_topology_device_by_proximity_domain_no_lock(
54 uint32_t proximity_domain)
55 {
56 struct kfd_topology_device *top_dev;
57 struct kfd_topology_device *device = NULL;
58
59 list_for_each_entry(top_dev, &topology_device_list, list)
60 if (top_dev->proximity_domain == proximity_domain) {
61 device = top_dev;
62 break;
63 }
64
65 return device;
66 }
67
kfd_topology_device_by_proximity_domain(uint32_t proximity_domain)68 struct kfd_topology_device *kfd_topology_device_by_proximity_domain(
69 uint32_t proximity_domain)
70 {
71 struct kfd_topology_device *device = NULL;
72
73 down_read(&topology_lock);
74
75 device = kfd_topology_device_by_proximity_domain_no_lock(
76 proximity_domain);
77 up_read(&topology_lock);
78
79 return device;
80 }
81
kfd_topology_device_by_id(uint32_t gpu_id)82 struct kfd_topology_device *kfd_topology_device_by_id(uint32_t gpu_id)
83 {
84 struct kfd_topology_device *top_dev = NULL;
85 struct kfd_topology_device *ret = NULL;
86
87 down_read(&topology_lock);
88
89 list_for_each_entry(top_dev, &topology_device_list, list)
90 if (top_dev->gpu_id == gpu_id) {
91 ret = top_dev;
92 break;
93 }
94
95 up_read(&topology_lock);
96
97 return ret;
98 }
99
kfd_device_by_id(uint32_t gpu_id)100 struct kfd_node *kfd_device_by_id(uint32_t gpu_id)
101 {
102 struct kfd_topology_device *top_dev;
103
104 top_dev = kfd_topology_device_by_id(gpu_id);
105 if (!top_dev)
106 return NULL;
107
108 return top_dev->gpu;
109 }
110
111 /* Called with write topology_lock acquired */
kfd_release_topology_device(struct kfd_topology_device * dev)112 static void kfd_release_topology_device(struct kfd_topology_device *dev)
113 {
114 struct kfd_mem_properties *mem;
115 struct kfd_cache_properties *cache;
116 struct kfd_iolink_properties *iolink;
117 struct kfd_iolink_properties *p2plink;
118 struct kfd_perf_properties *perf;
119
120 list_del(&dev->list);
121
122 while (dev->mem_props.next != &dev->mem_props) {
123 mem = container_of(dev->mem_props.next,
124 struct kfd_mem_properties, list);
125 list_del(&mem->list);
126 kfree(mem);
127 }
128
129 while (dev->cache_props.next != &dev->cache_props) {
130 cache = container_of(dev->cache_props.next,
131 struct kfd_cache_properties, list);
132 list_del(&cache->list);
133 kfree(cache);
134 }
135
136 while (dev->io_link_props.next != &dev->io_link_props) {
137 iolink = container_of(dev->io_link_props.next,
138 struct kfd_iolink_properties, list);
139 list_del(&iolink->list);
140 kfree(iolink);
141 }
142
143 while (dev->p2p_link_props.next != &dev->p2p_link_props) {
144 p2plink = container_of(dev->p2p_link_props.next,
145 struct kfd_iolink_properties, list);
146 list_del(&p2plink->list);
147 kfree(p2plink);
148 }
149
150 while (dev->perf_props.next != &dev->perf_props) {
151 perf = container_of(dev->perf_props.next,
152 struct kfd_perf_properties, list);
153 list_del(&perf->list);
154 kfree(perf);
155 }
156
157 kfree(dev);
158 }
159
kfd_release_topology_device_list(struct list_head * device_list)160 void kfd_release_topology_device_list(struct list_head *device_list)
161 {
162 struct kfd_topology_device *dev;
163
164 while (!list_empty(device_list)) {
165 dev = list_first_entry(device_list,
166 struct kfd_topology_device, list);
167 kfd_release_topology_device(dev);
168 }
169 }
170
kfd_release_live_view(void)171 static void kfd_release_live_view(void)
172 {
173 kfd_release_topology_device_list(&topology_device_list);
174 memset(&sys_props, 0, sizeof(sys_props));
175 }
176
kfd_create_topology_device(struct list_head * device_list)177 struct kfd_topology_device *kfd_create_topology_device(
178 struct list_head *device_list)
179 {
180 struct kfd_topology_device *dev;
181
182 dev = kfd_alloc_struct(dev);
183 if (!dev) {
184 pr_err("No memory to allocate a topology device");
185 return NULL;
186 }
187
188 INIT_LIST_HEAD(&dev->mem_props);
189 INIT_LIST_HEAD(&dev->cache_props);
190 INIT_LIST_HEAD(&dev->io_link_props);
191 INIT_LIST_HEAD(&dev->p2p_link_props);
192 INIT_LIST_HEAD(&dev->perf_props);
193
194 list_add_tail(&dev->list, device_list);
195
196 return dev;
197 }
198
199
200 #define sysfs_show_gen_prop(buffer, offs, fmt, ...) \
201 (offs += snprintf(buffer+offs, PAGE_SIZE-offs, \
202 fmt, __VA_ARGS__))
203 #define sysfs_show_32bit_prop(buffer, offs, name, value) \
204 sysfs_show_gen_prop(buffer, offs, "%s %u\n", name, value)
205 #define sysfs_show_64bit_prop(buffer, offs, name, value) \
206 sysfs_show_gen_prop(buffer, offs, "%s %llu\n", name, value)
207 #define sysfs_show_32bit_val(buffer, offs, value) \
208 sysfs_show_gen_prop(buffer, offs, "%u\n", value)
209 #define sysfs_show_str_val(buffer, offs, value) \
210 sysfs_show_gen_prop(buffer, offs, "%s\n", value)
211
sysprops_show(struct kobject * kobj,struct attribute * attr,char * buffer)212 static ssize_t sysprops_show(struct kobject *kobj, struct attribute *attr,
213 char *buffer)
214 {
215 int offs = 0;
216
217 /* Making sure that the buffer is an empty string */
218 buffer[0] = 0;
219
220 if (attr == &sys_props.attr_genid) {
221 sysfs_show_32bit_val(buffer, offs,
222 sys_props.generation_count);
223 } else if (attr == &sys_props.attr_props) {
224 sysfs_show_64bit_prop(buffer, offs, "platform_oem",
225 sys_props.platform_oem);
226 sysfs_show_64bit_prop(buffer, offs, "platform_id",
227 sys_props.platform_id);
228 sysfs_show_64bit_prop(buffer, offs, "platform_rev",
229 sys_props.platform_rev);
230 } else {
231 offs = -EINVAL;
232 }
233
234 return offs;
235 }
236
kfd_topology_kobj_release(struct kobject * kobj)237 static void kfd_topology_kobj_release(struct kobject *kobj)
238 {
239 kfree(kobj);
240 }
241
242 static const struct sysfs_ops sysprops_ops = {
243 .show = sysprops_show,
244 };
245
246 static const struct kobj_type sysprops_type = {
247 .release = kfd_topology_kobj_release,
248 .sysfs_ops = &sysprops_ops,
249 };
250
iolink_show(struct kobject * kobj,struct attribute * attr,char * buffer)251 static ssize_t iolink_show(struct kobject *kobj, struct attribute *attr,
252 char *buffer)
253 {
254 int offs = 0;
255 struct kfd_iolink_properties *iolink;
256
257 /* Making sure that the buffer is an empty string */
258 buffer[0] = 0;
259
260 iolink = container_of(attr, struct kfd_iolink_properties, attr);
261 if (iolink->gpu && kfd_devcgroup_check_permission(iolink->gpu))
262 return -EPERM;
263 sysfs_show_32bit_prop(buffer, offs, "type", iolink->iolink_type);
264 sysfs_show_32bit_prop(buffer, offs, "version_major", iolink->ver_maj);
265 sysfs_show_32bit_prop(buffer, offs, "version_minor", iolink->ver_min);
266 sysfs_show_32bit_prop(buffer, offs, "node_from", iolink->node_from);
267 sysfs_show_32bit_prop(buffer, offs, "node_to", iolink->node_to);
268 sysfs_show_32bit_prop(buffer, offs, "weight", iolink->weight);
269 sysfs_show_32bit_prop(buffer, offs, "min_latency", iolink->min_latency);
270 sysfs_show_32bit_prop(buffer, offs, "max_latency", iolink->max_latency);
271 sysfs_show_32bit_prop(buffer, offs, "min_bandwidth",
272 iolink->min_bandwidth);
273 sysfs_show_32bit_prop(buffer, offs, "max_bandwidth",
274 iolink->max_bandwidth);
275 sysfs_show_32bit_prop(buffer, offs, "recommended_transfer_size",
276 iolink->rec_transfer_size);
277 sysfs_show_32bit_prop(buffer, offs, "recommended_sdma_engine_id_mask",
278 iolink->rec_sdma_eng_id_mask);
279 sysfs_show_32bit_prop(buffer, offs, "flags", iolink->flags);
280
281 return offs;
282 }
283
284 static const struct sysfs_ops iolink_ops = {
285 .show = iolink_show,
286 };
287
288 static const struct kobj_type iolink_type = {
289 .release = kfd_topology_kobj_release,
290 .sysfs_ops = &iolink_ops,
291 };
292
mem_show(struct kobject * kobj,struct attribute * attr,char * buffer)293 static ssize_t mem_show(struct kobject *kobj, struct attribute *attr,
294 char *buffer)
295 {
296 int offs = 0;
297 struct kfd_mem_properties *mem;
298
299 /* Making sure that the buffer is an empty string */
300 buffer[0] = 0;
301
302 mem = container_of(attr, struct kfd_mem_properties, attr);
303 if (mem->gpu && kfd_devcgroup_check_permission(mem->gpu))
304 return -EPERM;
305 sysfs_show_32bit_prop(buffer, offs, "heap_type", mem->heap_type);
306 sysfs_show_64bit_prop(buffer, offs, "size_in_bytes",
307 mem->size_in_bytes);
308 sysfs_show_32bit_prop(buffer, offs, "flags", mem->flags);
309 sysfs_show_32bit_prop(buffer, offs, "width", mem->width);
310 sysfs_show_32bit_prop(buffer, offs, "mem_clk_max",
311 mem->mem_clk_max);
312
313 return offs;
314 }
315
316 static const struct sysfs_ops mem_ops = {
317 .show = mem_show,
318 };
319
320 static const struct kobj_type mem_type = {
321 .release = kfd_topology_kobj_release,
322 .sysfs_ops = &mem_ops,
323 };
324
kfd_cache_show(struct kobject * kobj,struct attribute * attr,char * buffer)325 static ssize_t kfd_cache_show(struct kobject *kobj, struct attribute *attr,
326 char *buffer)
327 {
328 int offs = 0;
329 uint32_t i, j;
330 struct kfd_cache_properties *cache;
331
332 /* Making sure that the buffer is an empty string */
333 buffer[0] = 0;
334 cache = container_of(attr, struct kfd_cache_properties, attr);
335 if (cache->gpu && kfd_devcgroup_check_permission(cache->gpu))
336 return -EPERM;
337 sysfs_show_32bit_prop(buffer, offs, "processor_id_low",
338 cache->processor_id_low);
339 sysfs_show_32bit_prop(buffer, offs, "level", cache->cache_level);
340 sysfs_show_32bit_prop(buffer, offs, "size", cache->cache_size);
341 sysfs_show_32bit_prop(buffer, offs, "cache_line_size",
342 cache->cacheline_size);
343 sysfs_show_32bit_prop(buffer, offs, "cache_lines_per_tag",
344 cache->cachelines_per_tag);
345 sysfs_show_32bit_prop(buffer, offs, "association", cache->cache_assoc);
346 sysfs_show_32bit_prop(buffer, offs, "latency", cache->cache_latency);
347 sysfs_show_32bit_prop(buffer, offs, "type", cache->cache_type);
348
349 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "sibling_map ");
350 for (i = 0; i < cache->sibling_map_size; i++)
351 for (j = 0; j < sizeof(cache->sibling_map[0])*8; j++)
352 /* Check each bit */
353 offs += snprintf(buffer+offs, PAGE_SIZE-offs, "%d,",
354 (cache->sibling_map[i] >> j) & 1);
355
356 /* Replace the last "," with end of line */
357 buffer[offs-1] = '\n';
358 return offs;
359 }
360
361 static const struct sysfs_ops cache_ops = {
362 .show = kfd_cache_show,
363 };
364
365 static const struct kobj_type cache_type = {
366 .release = kfd_topology_kobj_release,
367 .sysfs_ops = &cache_ops,
368 };
369
370 /****** Sysfs of Performance Counters ******/
371
372 struct kfd_perf_attr {
373 struct kobj_attribute attr;
374 uint32_t data;
375 };
376
perf_show(struct kobject * kobj,struct kobj_attribute * attrs,char * buf)377 static ssize_t perf_show(struct kobject *kobj, struct kobj_attribute *attrs,
378 char *buf)
379 {
380 int offs = 0;
381 struct kfd_perf_attr *attr;
382
383 buf[0] = 0;
384 attr = container_of(attrs, struct kfd_perf_attr, attr);
385 if (!attr->data) /* invalid data for PMC */
386 return 0;
387 else
388 return sysfs_show_32bit_val(buf, offs, attr->data);
389 }
390
391 #define KFD_PERF_DESC(_name, _data) \
392 { \
393 .attr = __ATTR(_name, 0444, perf_show, NULL), \
394 .data = _data, \
395 }
396
397 static struct kfd_perf_attr perf_attr_iommu[] = {
398 KFD_PERF_DESC(max_concurrent, 0),
399 KFD_PERF_DESC(num_counters, 0),
400 KFD_PERF_DESC(counter_ids, 0),
401 };
402 /****************************************/
403
node_show(struct kobject * kobj,struct attribute * attr,char * buffer)404 static ssize_t node_show(struct kobject *kobj, struct attribute *attr,
405 char *buffer)
406 {
407 int offs = 0;
408 struct kfd_topology_device *dev;
409 uint32_t log_max_watch_addr;
410
411 /* Making sure that the buffer is an empty string */
412 buffer[0] = 0;
413
414 if (strcmp(attr->name, "gpu_id") == 0) {
415 dev = container_of(attr, struct kfd_topology_device,
416 attr_gpuid);
417 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu))
418 return -EPERM;
419 return sysfs_show_32bit_val(buffer, offs, dev->gpu_id);
420 }
421
422 if (strcmp(attr->name, "name") == 0) {
423 dev = container_of(attr, struct kfd_topology_device,
424 attr_name);
425
426 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu))
427 return -EPERM;
428 return sysfs_show_str_val(buffer, offs, dev->node_props.name);
429 }
430
431 dev = container_of(attr, struct kfd_topology_device,
432 attr_props);
433 if (dev->gpu && kfd_devcgroup_check_permission(dev->gpu))
434 return -EPERM;
435 sysfs_show_32bit_prop(buffer, offs, "cpu_cores_count",
436 dev->node_props.cpu_cores_count);
437 sysfs_show_32bit_prop(buffer, offs, "simd_count",
438 dev->gpu ? dev->node_props.simd_count : 0);
439 sysfs_show_32bit_prop(buffer, offs, "mem_banks_count",
440 dev->node_props.mem_banks_count);
441 sysfs_show_32bit_prop(buffer, offs, "caches_count",
442 dev->node_props.caches_count);
443 sysfs_show_32bit_prop(buffer, offs, "io_links_count",
444 dev->node_props.io_links_count);
445 sysfs_show_32bit_prop(buffer, offs, "p2p_links_count",
446 dev->node_props.p2p_links_count);
447 sysfs_show_32bit_prop(buffer, offs, "cpu_core_id_base",
448 dev->node_props.cpu_core_id_base);
449 sysfs_show_32bit_prop(buffer, offs, "simd_id_base",
450 dev->node_props.simd_id_base);
451 sysfs_show_32bit_prop(buffer, offs, "max_waves_per_simd",
452 dev->node_props.max_waves_per_simd);
453 sysfs_show_32bit_prop(buffer, offs, "lds_size_in_kb",
454 dev->node_props.lds_size_in_kb);
455 sysfs_show_32bit_prop(buffer, offs, "gds_size_in_kb",
456 dev->node_props.gds_size_in_kb);
457 sysfs_show_32bit_prop(buffer, offs, "num_gws",
458 dev->node_props.num_gws);
459 sysfs_show_32bit_prop(buffer, offs, "wave_front_size",
460 dev->node_props.wave_front_size);
461 sysfs_show_32bit_prop(buffer, offs, "array_count",
462 dev->gpu ? (dev->node_props.array_count *
463 NUM_XCC(dev->gpu->xcc_mask)) : 0);
464 sysfs_show_32bit_prop(buffer, offs, "simd_arrays_per_engine",
465 dev->node_props.simd_arrays_per_engine);
466 sysfs_show_32bit_prop(buffer, offs, "cu_per_simd_array",
467 dev->node_props.cu_per_simd_array);
468 sysfs_show_32bit_prop(buffer, offs, "simd_per_cu",
469 dev->node_props.simd_per_cu);
470 sysfs_show_32bit_prop(buffer, offs, "max_slots_scratch_cu",
471 dev->node_props.max_slots_scratch_cu);
472 sysfs_show_32bit_prop(buffer, offs, "gfx_target_version",
473 dev->node_props.gfx_target_version);
474 sysfs_show_32bit_prop(buffer, offs, "vendor_id",
475 dev->node_props.vendor_id);
476 sysfs_show_32bit_prop(buffer, offs, "device_id",
477 dev->node_props.device_id);
478 sysfs_show_32bit_prop(buffer, offs, "location_id",
479 dev->node_props.location_id);
480 sysfs_show_32bit_prop(buffer, offs, "domain",
481 dev->node_props.domain);
482 sysfs_show_32bit_prop(buffer, offs, "drm_render_minor",
483 dev->node_props.drm_render_minor);
484 sysfs_show_64bit_prop(buffer, offs, "hive_id",
485 dev->node_props.hive_id);
486 sysfs_show_32bit_prop(buffer, offs, "num_sdma_engines",
487 dev->node_props.num_sdma_engines);
488 sysfs_show_32bit_prop(buffer, offs, "num_sdma_xgmi_engines",
489 dev->node_props.num_sdma_xgmi_engines);
490 sysfs_show_32bit_prop(buffer, offs, "num_sdma_queues_per_engine",
491 dev->node_props.num_sdma_queues_per_engine);
492 sysfs_show_32bit_prop(buffer, offs, "num_cp_queues",
493 dev->node_props.num_cp_queues);
494
495 if (dev->gpu) {
496 log_max_watch_addr =
497 __ilog2_u32(dev->gpu->kfd->device_info.num_of_watch_points);
498
499 if (log_max_watch_addr) {
500 dev->node_props.capability |=
501 HSA_CAP_WATCH_POINTS_SUPPORTED;
502
503 dev->node_props.capability |=
504 ((log_max_watch_addr <<
505 HSA_CAP_WATCH_POINTS_TOTALBITS_SHIFT) &
506 HSA_CAP_WATCH_POINTS_TOTALBITS_MASK);
507 }
508
509 if (dev->gpu->adev->asic_type == CHIP_TONGA)
510 dev->node_props.capability |=
511 HSA_CAP_AQL_QUEUE_DOUBLE_MAP;
512
513 sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_fcompute",
514 dev->node_props.max_engine_clk_fcompute);
515
516 sysfs_show_64bit_prop(buffer, offs, "local_mem_size", 0ULL);
517
518 sysfs_show_32bit_prop(buffer, offs, "fw_version",
519 dev->gpu->kfd->mec_fw_version);
520 sysfs_show_32bit_prop(buffer, offs, "capability",
521 dev->node_props.capability);
522 sysfs_show_32bit_prop(buffer, offs, "capability2",
523 dev->node_props.capability2);
524 sysfs_show_64bit_prop(buffer, offs, "debug_prop",
525 dev->node_props.debug_prop);
526 sysfs_show_32bit_prop(buffer, offs, "sdma_fw_version",
527 dev->gpu->kfd->sdma_fw_version);
528 sysfs_show_64bit_prop(buffer, offs, "unique_id",
529 dev->gpu->adev->unique_id);
530 sysfs_show_32bit_prop(buffer, offs, "num_xcc",
531 NUM_XCC(dev->gpu->xcc_mask));
532 }
533
534 return sysfs_show_32bit_prop(buffer, offs, "max_engine_clk_ccompute",
535 cpufreq_quick_get_max(0)/1000);
536 }
537
538 static const struct sysfs_ops node_ops = {
539 .show = node_show,
540 };
541
542 static const struct kobj_type node_type = {
543 .release = kfd_topology_kobj_release,
544 .sysfs_ops = &node_ops,
545 };
546
kfd_remove_sysfs_file(struct kobject * kobj,struct attribute * attr)547 static void kfd_remove_sysfs_file(struct kobject *kobj, struct attribute *attr)
548 {
549 sysfs_remove_file(kobj, attr);
550 kobject_del(kobj);
551 kobject_put(kobj);
552 }
553
kfd_remove_sysfs_node_entry(struct kfd_topology_device * dev)554 static void kfd_remove_sysfs_node_entry(struct kfd_topology_device *dev)
555 {
556 struct kfd_iolink_properties *p2plink;
557 struct kfd_iolink_properties *iolink;
558 struct kfd_cache_properties *cache;
559 struct kfd_mem_properties *mem;
560 struct kfd_perf_properties *perf;
561
562 if (dev->kobj_iolink) {
563 list_for_each_entry(iolink, &dev->io_link_props, list)
564 if (iolink->kobj) {
565 kfd_remove_sysfs_file(iolink->kobj,
566 &iolink->attr);
567 iolink->kobj = NULL;
568 }
569 kobject_del(dev->kobj_iolink);
570 kobject_put(dev->kobj_iolink);
571 dev->kobj_iolink = NULL;
572 }
573
574 if (dev->kobj_p2plink) {
575 list_for_each_entry(p2plink, &dev->p2p_link_props, list)
576 if (p2plink->kobj) {
577 kfd_remove_sysfs_file(p2plink->kobj,
578 &p2plink->attr);
579 p2plink->kobj = NULL;
580 }
581 kobject_del(dev->kobj_p2plink);
582 kobject_put(dev->kobj_p2plink);
583 dev->kobj_p2plink = NULL;
584 }
585
586 if (dev->kobj_cache) {
587 list_for_each_entry(cache, &dev->cache_props, list)
588 if (cache->kobj) {
589 kfd_remove_sysfs_file(cache->kobj,
590 &cache->attr);
591 cache->kobj = NULL;
592 }
593 kobject_del(dev->kobj_cache);
594 kobject_put(dev->kobj_cache);
595 dev->kobj_cache = NULL;
596 }
597
598 if (dev->kobj_mem) {
599 list_for_each_entry(mem, &dev->mem_props, list)
600 if (mem->kobj) {
601 kfd_remove_sysfs_file(mem->kobj, &mem->attr);
602 mem->kobj = NULL;
603 }
604 kobject_del(dev->kobj_mem);
605 kobject_put(dev->kobj_mem);
606 dev->kobj_mem = NULL;
607 }
608
609 if (dev->kobj_perf) {
610 list_for_each_entry(perf, &dev->perf_props, list) {
611 kfree(perf->attr_group);
612 perf->attr_group = NULL;
613 }
614 kobject_del(dev->kobj_perf);
615 kobject_put(dev->kobj_perf);
616 dev->kobj_perf = NULL;
617 }
618
619 if (dev->kobj_node) {
620 sysfs_remove_file(dev->kobj_node, &dev->attr_gpuid);
621 sysfs_remove_file(dev->kobj_node, &dev->attr_name);
622 sysfs_remove_file(dev->kobj_node, &dev->attr_props);
623 kobject_del(dev->kobj_node);
624 kobject_put(dev->kobj_node);
625 dev->kobj_node = NULL;
626 }
627 }
628
kfd_build_sysfs_node_entry(struct kfd_topology_device * dev,uint32_t id)629 static int kfd_build_sysfs_node_entry(struct kfd_topology_device *dev,
630 uint32_t id)
631 {
632 struct kfd_iolink_properties *p2plink;
633 struct kfd_iolink_properties *iolink;
634 struct kfd_cache_properties *cache;
635 struct kfd_mem_properties *mem;
636 struct kfd_perf_properties *perf;
637 int ret;
638 uint32_t i, num_attrs;
639 struct attribute **attrs;
640
641 if (WARN_ON(dev->kobj_node))
642 return -EEXIST;
643
644 /*
645 * Creating the sysfs folders
646 */
647 dev->kobj_node = kfd_alloc_struct(dev->kobj_node);
648 if (!dev->kobj_node)
649 return -ENOMEM;
650
651 ret = kobject_init_and_add(dev->kobj_node, &node_type,
652 sys_props.kobj_nodes, "%d", id);
653 if (ret < 0) {
654 kobject_put(dev->kobj_node);
655 return ret;
656 }
657
658 dev->kobj_mem = kobject_create_and_add("mem_banks", dev->kobj_node);
659 if (!dev->kobj_mem)
660 return -ENOMEM;
661
662 dev->kobj_cache = kobject_create_and_add("caches", dev->kobj_node);
663 if (!dev->kobj_cache)
664 return -ENOMEM;
665
666 dev->kobj_iolink = kobject_create_and_add("io_links", dev->kobj_node);
667 if (!dev->kobj_iolink)
668 return -ENOMEM;
669
670 dev->kobj_p2plink = kobject_create_and_add("p2p_links", dev->kobj_node);
671 if (!dev->kobj_p2plink)
672 return -ENOMEM;
673
674 dev->kobj_perf = kobject_create_and_add("perf", dev->kobj_node);
675 if (!dev->kobj_perf)
676 return -ENOMEM;
677
678 /*
679 * Creating sysfs files for node properties
680 */
681 dev->attr_gpuid.name = "gpu_id";
682 dev->attr_gpuid.mode = KFD_SYSFS_FILE_MODE;
683 sysfs_attr_init(&dev->attr_gpuid);
684 dev->attr_name.name = "name";
685 dev->attr_name.mode = KFD_SYSFS_FILE_MODE;
686 sysfs_attr_init(&dev->attr_name);
687 dev->attr_props.name = "properties";
688 dev->attr_props.mode = KFD_SYSFS_FILE_MODE;
689 sysfs_attr_init(&dev->attr_props);
690 ret = sysfs_create_file(dev->kobj_node, &dev->attr_gpuid);
691 if (ret < 0)
692 return ret;
693 ret = sysfs_create_file(dev->kobj_node, &dev->attr_name);
694 if (ret < 0)
695 return ret;
696 ret = sysfs_create_file(dev->kobj_node, &dev->attr_props);
697 if (ret < 0)
698 return ret;
699
700 i = 0;
701 list_for_each_entry(mem, &dev->mem_props, list) {
702 mem->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
703 if (!mem->kobj)
704 return -ENOMEM;
705 ret = kobject_init_and_add(mem->kobj, &mem_type,
706 dev->kobj_mem, "%d", i);
707 if (ret < 0) {
708 kobject_put(mem->kobj);
709 return ret;
710 }
711
712 mem->attr.name = "properties";
713 mem->attr.mode = KFD_SYSFS_FILE_MODE;
714 sysfs_attr_init(&mem->attr);
715 ret = sysfs_create_file(mem->kobj, &mem->attr);
716 if (ret < 0)
717 return ret;
718 i++;
719 }
720
721 i = 0;
722 list_for_each_entry(cache, &dev->cache_props, list) {
723 cache->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
724 if (!cache->kobj)
725 return -ENOMEM;
726 ret = kobject_init_and_add(cache->kobj, &cache_type,
727 dev->kobj_cache, "%d", i);
728 if (ret < 0) {
729 kobject_put(cache->kobj);
730 return ret;
731 }
732
733 cache->attr.name = "properties";
734 cache->attr.mode = KFD_SYSFS_FILE_MODE;
735 sysfs_attr_init(&cache->attr);
736 ret = sysfs_create_file(cache->kobj, &cache->attr);
737 if (ret < 0)
738 return ret;
739 i++;
740 }
741
742 i = 0;
743 list_for_each_entry(iolink, &dev->io_link_props, list) {
744 iolink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
745 if (!iolink->kobj)
746 return -ENOMEM;
747 ret = kobject_init_and_add(iolink->kobj, &iolink_type,
748 dev->kobj_iolink, "%d", i);
749 if (ret < 0) {
750 kobject_put(iolink->kobj);
751 return ret;
752 }
753
754 iolink->attr.name = "properties";
755 iolink->attr.mode = KFD_SYSFS_FILE_MODE;
756 sysfs_attr_init(&iolink->attr);
757 ret = sysfs_create_file(iolink->kobj, &iolink->attr);
758 if (ret < 0)
759 return ret;
760 i++;
761 }
762
763 i = 0;
764 list_for_each_entry(p2plink, &dev->p2p_link_props, list) {
765 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
766 if (!p2plink->kobj)
767 return -ENOMEM;
768 ret = kobject_init_and_add(p2plink->kobj, &iolink_type,
769 dev->kobj_p2plink, "%d", i);
770 if (ret < 0) {
771 kobject_put(p2plink->kobj);
772 return ret;
773 }
774
775 p2plink->attr.name = "properties";
776 p2plink->attr.mode = KFD_SYSFS_FILE_MODE;
777 sysfs_attr_init(&p2plink->attr);
778 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr);
779 if (ret < 0)
780 return ret;
781 i++;
782 }
783
784 /* All hardware blocks have the same number of attributes. */
785 num_attrs = ARRAY_SIZE(perf_attr_iommu);
786 list_for_each_entry(perf, &dev->perf_props, list) {
787 perf->attr_group = kzalloc(sizeof(struct kfd_perf_attr)
788 * num_attrs + sizeof(struct attribute_group),
789 GFP_KERNEL);
790 if (!perf->attr_group)
791 return -ENOMEM;
792
793 attrs = (struct attribute **)(perf->attr_group + 1);
794 if (!strcmp(perf->block_name, "iommu")) {
795 /* Information of IOMMU's num_counters and counter_ids is shown
796 * under /sys/bus/event_source/devices/amd_iommu. We don't
797 * duplicate here.
798 */
799 perf_attr_iommu[0].data = perf->max_concurrent;
800 for (i = 0; i < num_attrs; i++)
801 attrs[i] = &perf_attr_iommu[i].attr.attr;
802 }
803 perf->attr_group->name = perf->block_name;
804 perf->attr_group->attrs = attrs;
805 ret = sysfs_create_group(dev->kobj_perf, perf->attr_group);
806 if (ret < 0)
807 return ret;
808 }
809
810 return 0;
811 }
812
813 /* Called with write topology lock acquired */
kfd_build_sysfs_node_tree(void)814 static int kfd_build_sysfs_node_tree(void)
815 {
816 struct kfd_topology_device *dev;
817 int ret;
818 uint32_t i = 0;
819
820 list_for_each_entry(dev, &topology_device_list, list) {
821 ret = kfd_build_sysfs_node_entry(dev, i);
822 if (ret < 0)
823 return ret;
824 i++;
825 }
826
827 return 0;
828 }
829
830 /* Called with write topology lock acquired */
kfd_remove_sysfs_node_tree(void)831 static void kfd_remove_sysfs_node_tree(void)
832 {
833 struct kfd_topology_device *dev;
834
835 list_for_each_entry(dev, &topology_device_list, list)
836 kfd_remove_sysfs_node_entry(dev);
837 }
838
kfd_topology_update_sysfs(void)839 static int kfd_topology_update_sysfs(void)
840 {
841 int ret;
842
843 if (!sys_props.kobj_topology) {
844 sys_props.kobj_topology =
845 kfd_alloc_struct(sys_props.kobj_topology);
846 if (!sys_props.kobj_topology)
847 return -ENOMEM;
848
849 ret = kobject_init_and_add(sys_props.kobj_topology,
850 &sysprops_type, &kfd_device->kobj,
851 "topology");
852 if (ret < 0) {
853 kobject_put(sys_props.kobj_topology);
854 return ret;
855 }
856
857 sys_props.kobj_nodes = kobject_create_and_add("nodes",
858 sys_props.kobj_topology);
859 if (!sys_props.kobj_nodes)
860 return -ENOMEM;
861
862 sys_props.attr_genid.name = "generation_id";
863 sys_props.attr_genid.mode = KFD_SYSFS_FILE_MODE;
864 sysfs_attr_init(&sys_props.attr_genid);
865 ret = sysfs_create_file(sys_props.kobj_topology,
866 &sys_props.attr_genid);
867 if (ret < 0)
868 return ret;
869
870 sys_props.attr_props.name = "system_properties";
871 sys_props.attr_props.mode = KFD_SYSFS_FILE_MODE;
872 sysfs_attr_init(&sys_props.attr_props);
873 ret = sysfs_create_file(sys_props.kobj_topology,
874 &sys_props.attr_props);
875 if (ret < 0)
876 return ret;
877 }
878
879 kfd_remove_sysfs_node_tree();
880
881 return kfd_build_sysfs_node_tree();
882 }
883
kfd_topology_release_sysfs(void)884 static void kfd_topology_release_sysfs(void)
885 {
886 kfd_remove_sysfs_node_tree();
887 if (sys_props.kobj_topology) {
888 sysfs_remove_file(sys_props.kobj_topology,
889 &sys_props.attr_genid);
890 sysfs_remove_file(sys_props.kobj_topology,
891 &sys_props.attr_props);
892 if (sys_props.kobj_nodes) {
893 kobject_del(sys_props.kobj_nodes);
894 kobject_put(sys_props.kobj_nodes);
895 sys_props.kobj_nodes = NULL;
896 }
897 kobject_del(sys_props.kobj_topology);
898 kobject_put(sys_props.kobj_topology);
899 sys_props.kobj_topology = NULL;
900 }
901 }
902
903 /* Called with write topology_lock acquired */
kfd_topology_update_device_list(struct list_head * temp_list,struct list_head * master_list)904 static void kfd_topology_update_device_list(struct list_head *temp_list,
905 struct list_head *master_list)
906 {
907 while (!list_empty(temp_list)) {
908 list_move_tail(temp_list->next, master_list);
909 sys_props.num_devices++;
910 }
911 }
912
kfd_debug_print_topology(void)913 static void kfd_debug_print_topology(void)
914 {
915 struct kfd_topology_device *dev;
916
917 down_read(&topology_lock);
918
919 dev = list_last_entry(&topology_device_list,
920 struct kfd_topology_device, list);
921 if (dev) {
922 if (dev->node_props.cpu_cores_count &&
923 dev->node_props.simd_count) {
924 pr_info("Topology: Add APU node [0x%0x:0x%0x]\n",
925 dev->node_props.device_id,
926 dev->node_props.vendor_id);
927 } else if (dev->node_props.cpu_cores_count)
928 pr_info("Topology: Add CPU node\n");
929 else if (dev->node_props.simd_count)
930 pr_info("Topology: Add dGPU node [0x%0x:0x%0x]\n",
931 dev->node_props.device_id,
932 dev->node_props.vendor_id);
933 }
934 up_read(&topology_lock);
935 }
936
937 /* Helper function for intializing platform_xx members of
938 * kfd_system_properties. Uses OEM info from the last CPU/APU node.
939 */
kfd_update_system_properties(void)940 static void kfd_update_system_properties(void)
941 {
942 struct kfd_topology_device *dev;
943
944 down_read(&topology_lock);
945 dev = list_last_entry(&topology_device_list,
946 struct kfd_topology_device, list);
947 if (dev) {
948 sys_props.platform_id = dev->oem_id64;
949 sys_props.platform_oem = *((uint64_t *)dev->oem_table_id);
950 sys_props.platform_rev = dev->oem_revision;
951 }
952 up_read(&topology_lock);
953 }
954
find_system_memory(const struct dmi_header * dm,void * private)955 static void find_system_memory(const struct dmi_header *dm, void *private)
956 {
957 struct dmi_mem_device *memdev = container_of(dm, struct dmi_mem_device, header);
958 struct kfd_mem_properties *mem;
959 struct kfd_topology_device *kdev =
960 (struct kfd_topology_device *)private;
961
962 if (memdev->header.type != DMI_ENTRY_MEM_DEVICE)
963 return;
964 if (memdev->header.length < sizeof(struct dmi_mem_device))
965 return;
966
967 list_for_each_entry(mem, &kdev->mem_props, list) {
968 if (memdev->total_width != 0xFFFF && memdev->total_width != 0)
969 mem->width = memdev->total_width;
970 if (memdev->speed != 0)
971 mem->mem_clk_max = memdev->speed;
972 }
973 }
974
975 /* kfd_add_non_crat_information - Add information that is not currently
976 * defined in CRAT but is necessary for KFD topology
977 * @dev - topology device to which addition info is added
978 */
kfd_add_non_crat_information(struct kfd_topology_device * kdev)979 static void kfd_add_non_crat_information(struct kfd_topology_device *kdev)
980 {
981 /* Check if CPU only node. */
982 if (!kdev->gpu) {
983 /* Add system memory information */
984 dmi_walk(find_system_memory, kdev);
985 }
986 /* TODO: For GPU node, rearrange code from kfd_topology_add_device */
987 }
988
kfd_topology_init(void)989 int kfd_topology_init(void)
990 {
991 void *crat_image = NULL;
992 size_t image_size = 0;
993 int ret;
994 struct list_head temp_topology_device_list;
995 int cpu_only_node = 0;
996 struct kfd_topology_device *kdev;
997 int proximity_domain;
998
999 /* topology_device_list - Master list of all topology devices
1000 * temp_topology_device_list - temporary list created while parsing CRAT
1001 * or VCRAT. Once parsing is complete the contents of list is moved to
1002 * topology_device_list
1003 */
1004
1005 /* Initialize the head for the both the lists */
1006 INIT_LIST_HEAD(&topology_device_list);
1007 INIT_LIST_HEAD(&temp_topology_device_list);
1008 init_rwsem(&topology_lock);
1009
1010 memset(&sys_props, 0, sizeof(sys_props));
1011
1012 /* Proximity domains in ACPI CRAT tables start counting at
1013 * 0. The same should be true for virtual CRAT tables created
1014 * at this stage. GPUs added later in kfd_topology_add_device
1015 * use a counter.
1016 */
1017 proximity_domain = 0;
1018
1019 ret = kfd_create_crat_image_virtual(&crat_image, &image_size,
1020 COMPUTE_UNIT_CPU, NULL,
1021 proximity_domain);
1022 cpu_only_node = 1;
1023 if (ret) {
1024 pr_err("Error creating VCRAT table for CPU\n");
1025 return ret;
1026 }
1027
1028 ret = kfd_parse_crat_table(crat_image,
1029 &temp_topology_device_list,
1030 proximity_domain);
1031 if (ret) {
1032 pr_err("Error parsing VCRAT table for CPU\n");
1033 goto err;
1034 }
1035
1036 kdev = list_first_entry(&temp_topology_device_list,
1037 struct kfd_topology_device, list);
1038
1039 down_write(&topology_lock);
1040 kfd_topology_update_device_list(&temp_topology_device_list,
1041 &topology_device_list);
1042 topology_crat_proximity_domain = sys_props.num_devices-1;
1043 ret = kfd_topology_update_sysfs();
1044 up_write(&topology_lock);
1045
1046 if (!ret) {
1047 sys_props.generation_count++;
1048 kfd_update_system_properties();
1049 kfd_debug_print_topology();
1050 } else
1051 pr_err("Failed to update topology in sysfs ret=%d\n", ret);
1052
1053 /* For nodes with GPU, this information gets added
1054 * when GPU is detected (kfd_topology_add_device).
1055 */
1056 if (cpu_only_node) {
1057 /* Add additional information to CPU only node created above */
1058 down_write(&topology_lock);
1059 kdev = list_first_entry(&topology_device_list,
1060 struct kfd_topology_device, list);
1061 up_write(&topology_lock);
1062 kfd_add_non_crat_information(kdev);
1063 }
1064
1065 err:
1066 kfd_destroy_crat_image(crat_image);
1067 return ret;
1068 }
1069
kfd_topology_shutdown(void)1070 void kfd_topology_shutdown(void)
1071 {
1072 down_write(&topology_lock);
1073 kfd_topology_release_sysfs();
1074 kfd_release_live_view();
1075 up_write(&topology_lock);
1076 }
1077
kfd_generate_gpu_id(struct kfd_node * gpu)1078 static uint32_t kfd_generate_gpu_id(struct kfd_node *gpu)
1079 {
1080 uint32_t gpu_id;
1081 uint32_t buf[8];
1082 uint64_t local_mem_size;
1083 struct kfd_topology_device *dev;
1084 bool is_unique;
1085 uint8_t *crc_buf;
1086
1087 if (!gpu)
1088 return 0;
1089
1090 crc_buf = (uint8_t *)&buf;
1091 local_mem_size = gpu->local_mem_info.local_mem_size_private +
1092 gpu->local_mem_info.local_mem_size_public;
1093 buf[0] = gpu->adev->pdev->devfn;
1094 buf[1] = gpu->adev->pdev->subsystem_vendor |
1095 (gpu->adev->pdev->subsystem_device << 16);
1096 buf[2] = pci_domain_nr(gpu->adev->pdev->bus);
1097 buf[3] = gpu->adev->pdev->device;
1098 buf[4] = gpu->adev->pdev->bus->number;
1099 buf[5] = lower_32_bits(local_mem_size);
1100 buf[6] = upper_32_bits(local_mem_size);
1101 buf[7] = (ffs(gpu->xcc_mask) - 1) | (NUM_XCC(gpu->xcc_mask) << 16);
1102
1103 gpu_id = crc16(0, crc_buf, sizeof(buf)) &
1104 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1);
1105
1106 /* There is a very small possibility when generating a
1107 * 16 (KFD_GPU_ID_HASH_WIDTH) bit value from 8 word buffer
1108 * that the value could be 0 or non-unique. So, check if
1109 * it is unique and non-zero. If not unique increment till
1110 * unique one is found. In case of overflow, restart from 1
1111 */
1112
1113 down_read(&topology_lock);
1114 do {
1115 is_unique = true;
1116 if (!gpu_id)
1117 gpu_id = 1;
1118 list_for_each_entry(dev, &topology_device_list, list) {
1119 if (dev->gpu && dev->gpu_id == gpu_id) {
1120 is_unique = false;
1121 break;
1122 }
1123 }
1124 if (unlikely(!is_unique))
1125 gpu_id = (gpu_id + 1) &
1126 ((1 << KFD_GPU_ID_HASH_WIDTH) - 1);
1127 } while (!is_unique);
1128 up_read(&topology_lock);
1129
1130 return gpu_id;
1131 }
1132 /* kfd_assign_gpu - Attach @gpu to the correct kfd topology device. If
1133 * the GPU device is not already present in the topology device
1134 * list then return NULL. This means a new topology device has to
1135 * be created for this GPU.
1136 */
kfd_assign_gpu(struct kfd_node * gpu)1137 static struct kfd_topology_device *kfd_assign_gpu(struct kfd_node *gpu)
1138 {
1139 struct kfd_topology_device *dev;
1140 struct kfd_topology_device *out_dev = NULL;
1141 struct kfd_mem_properties *mem;
1142 struct kfd_cache_properties *cache;
1143 struct kfd_iolink_properties *iolink;
1144 struct kfd_iolink_properties *p2plink;
1145
1146 list_for_each_entry(dev, &topology_device_list, list) {
1147 /* Discrete GPUs need their own topology device list
1148 * entries. Don't assign them to CPU/APU nodes.
1149 */
1150 if (dev->node_props.cpu_cores_count)
1151 continue;
1152
1153 if (!dev->gpu && (dev->node_props.simd_count > 0)) {
1154 dev->gpu = gpu;
1155 out_dev = dev;
1156
1157 list_for_each_entry(mem, &dev->mem_props, list)
1158 mem->gpu = dev->gpu;
1159 list_for_each_entry(cache, &dev->cache_props, list)
1160 cache->gpu = dev->gpu;
1161 list_for_each_entry(iolink, &dev->io_link_props, list)
1162 iolink->gpu = dev->gpu;
1163 list_for_each_entry(p2plink, &dev->p2p_link_props, list)
1164 p2plink->gpu = dev->gpu;
1165 break;
1166 }
1167 }
1168 return out_dev;
1169 }
1170
kfd_notify_gpu_change(uint32_t gpu_id,int arrival)1171 static void kfd_notify_gpu_change(uint32_t gpu_id, int arrival)
1172 {
1173 /*
1174 * TODO: Generate an event for thunk about the arrival/removal
1175 * of the GPU
1176 */
1177 }
1178
1179 /* kfd_fill_mem_clk_max_info - Since CRAT doesn't have memory clock info,
1180 * patch this after CRAT parsing.
1181 */
kfd_fill_mem_clk_max_info(struct kfd_topology_device * dev)1182 static void kfd_fill_mem_clk_max_info(struct kfd_topology_device *dev)
1183 {
1184 struct kfd_mem_properties *mem;
1185 struct kfd_local_mem_info local_mem_info;
1186
1187 if (!dev)
1188 return;
1189
1190 /* Currently, amdgpu driver (amdgpu_mc) deals only with GPUs with
1191 * single bank of VRAM local memory.
1192 * for dGPUs - VCRAT reports only one bank of Local Memory
1193 * for APUs - If CRAT from ACPI reports more than one bank, then
1194 * all the banks will report the same mem_clk_max information
1195 */
1196 amdgpu_amdkfd_get_local_mem_info(dev->gpu->adev, &local_mem_info,
1197 dev->gpu->xcp);
1198
1199 list_for_each_entry(mem, &dev->mem_props, list)
1200 mem->mem_clk_max = local_mem_info.mem_clk_max;
1201 }
1202
kfd_set_iolink_no_atomics(struct kfd_topology_device * dev,struct kfd_topology_device * target_gpu_dev,struct kfd_iolink_properties * link)1203 static void kfd_set_iolink_no_atomics(struct kfd_topology_device *dev,
1204 struct kfd_topology_device *target_gpu_dev,
1205 struct kfd_iolink_properties *link)
1206 {
1207 /* xgmi always supports atomics between links. */
1208 if (link->iolink_type == CRAT_IOLINK_TYPE_XGMI)
1209 return;
1210
1211 /* check pcie support to set cpu(dev) flags for target_gpu_dev link. */
1212 if (target_gpu_dev) {
1213 uint32_t cap;
1214
1215 pcie_capability_read_dword(target_gpu_dev->gpu->adev->pdev,
1216 PCI_EXP_DEVCAP2, &cap);
1217
1218 if (!(cap & (PCI_EXP_DEVCAP2_ATOMIC_COMP32 |
1219 PCI_EXP_DEVCAP2_ATOMIC_COMP64)))
1220 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT |
1221 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT;
1222 /* set gpu (dev) flags. */
1223 } else {
1224 if (!dev->gpu->kfd->pci_atomic_requested ||
1225 dev->gpu->adev->asic_type == CHIP_HAWAII)
1226 link->flags |= CRAT_IOLINK_FLAGS_NO_ATOMICS_32_BIT |
1227 CRAT_IOLINK_FLAGS_NO_ATOMICS_64_BIT;
1228 }
1229 }
1230
kfd_set_iolink_non_coherent(struct kfd_topology_device * to_dev,struct kfd_iolink_properties * outbound_link,struct kfd_iolink_properties * inbound_link)1231 static void kfd_set_iolink_non_coherent(struct kfd_topology_device *to_dev,
1232 struct kfd_iolink_properties *outbound_link,
1233 struct kfd_iolink_properties *inbound_link)
1234 {
1235 /* CPU -> GPU with PCIe */
1236 if (!to_dev->gpu &&
1237 inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS)
1238 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
1239
1240 if (to_dev->gpu) {
1241 /* GPU <-> GPU with PCIe and
1242 * Vega20 with XGMI
1243 */
1244 if (inbound_link->iolink_type == CRAT_IOLINK_TYPE_PCIEXPRESS ||
1245 (inbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI &&
1246 KFD_GC_VERSION(to_dev->gpu) == IP_VERSION(9, 4, 0))) {
1247 outbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
1248 inbound_link->flags |= CRAT_IOLINK_FLAGS_NON_COHERENT;
1249 }
1250 }
1251 }
1252
1253 #define REC_SDMA_NUM_GPU 8
1254 static const int rec_sdma_eng_map[REC_SDMA_NUM_GPU][REC_SDMA_NUM_GPU] = {
1255 { -1, 14, 12, 2, 4, 8, 10, 6 },
1256 { 14, -1, 2, 10, 8, 4, 6, 12 },
1257 { 10, 2, -1, 12, 14, 6, 4, 8 },
1258 { 2, 12, 10, -1, 6, 14, 8, 4 },
1259 { 4, 8, 14, 6, -1, 10, 12, 2 },
1260 { 8, 4, 6, 14, 12, -1, 2, 10 },
1261 { 10, 6, 4, 8, 12, 2, -1, 14 },
1262 { 6, 12, 8, 4, 2, 10, 14, -1 }};
1263
kfd_set_recommended_sdma_engines(struct kfd_topology_device * to_dev,struct kfd_iolink_properties * outbound_link,struct kfd_iolink_properties * inbound_link)1264 static void kfd_set_recommended_sdma_engines(struct kfd_topology_device *to_dev,
1265 struct kfd_iolink_properties *outbound_link,
1266 struct kfd_iolink_properties *inbound_link)
1267 {
1268 struct kfd_node *gpu = outbound_link->gpu;
1269 struct amdgpu_device *adev = gpu->adev;
1270 int num_xgmi_nodes = adev->gmc.xgmi.num_physical_nodes;
1271 bool support_rec_eng = !amdgpu_sriov_vf(adev) && to_dev->gpu &&
1272 adev->aid_mask && num_xgmi_nodes && gpu->kfd->num_nodes == 1 &&
1273 kfd_get_num_xgmi_sdma_engines(gpu) >= 14 &&
1274 (!(adev->flags & AMD_IS_APU) && num_xgmi_nodes == 8);
1275
1276 if (support_rec_eng) {
1277 int src_socket_id = adev->gmc.xgmi.physical_node_id;
1278 int dst_socket_id = to_dev->gpu->adev->gmc.xgmi.physical_node_id;
1279
1280 outbound_link->rec_sdma_eng_id_mask =
1281 1 << rec_sdma_eng_map[src_socket_id][dst_socket_id];
1282 inbound_link->rec_sdma_eng_id_mask =
1283 1 << rec_sdma_eng_map[dst_socket_id][src_socket_id];
1284 } else {
1285 int num_sdma_eng = kfd_get_num_sdma_engines(gpu);
1286 int i, eng_offset = 0;
1287
1288 if (outbound_link->iolink_type == CRAT_IOLINK_TYPE_XGMI &&
1289 kfd_get_num_xgmi_sdma_engines(gpu) && to_dev->gpu) {
1290 eng_offset = num_sdma_eng;
1291 num_sdma_eng = kfd_get_num_xgmi_sdma_engines(gpu);
1292 }
1293
1294 for (i = 0; i < num_sdma_eng; i++) {
1295 outbound_link->rec_sdma_eng_id_mask |= (1 << (i + eng_offset));
1296 inbound_link->rec_sdma_eng_id_mask |= (1 << (i + eng_offset));
1297 }
1298 }
1299 }
1300
kfd_fill_iolink_non_crat_info(struct kfd_topology_device * dev)1301 static void kfd_fill_iolink_non_crat_info(struct kfd_topology_device *dev)
1302 {
1303 struct kfd_iolink_properties *link, *inbound_link;
1304 struct kfd_topology_device *peer_dev;
1305
1306 if (!dev || !dev->gpu)
1307 return;
1308
1309 /* GPU only creates direct links so apply flags setting to all */
1310 list_for_each_entry(link, &dev->io_link_props, list) {
1311 link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1312 kfd_set_iolink_no_atomics(dev, NULL, link);
1313 peer_dev = kfd_topology_device_by_proximity_domain(
1314 link->node_to);
1315
1316 if (!peer_dev)
1317 continue;
1318
1319 /* Include the CPU peer in GPU hive if connected over xGMI. */
1320 if (!peer_dev->gpu &&
1321 link->iolink_type == CRAT_IOLINK_TYPE_XGMI) {
1322 /*
1323 * If the GPU is not part of a GPU hive, use its pci
1324 * device location as the hive ID to bind with the CPU.
1325 */
1326 if (!dev->node_props.hive_id)
1327 dev->node_props.hive_id = pci_dev_id(dev->gpu->adev->pdev);
1328 peer_dev->node_props.hive_id = dev->node_props.hive_id;
1329 }
1330
1331 list_for_each_entry(inbound_link, &peer_dev->io_link_props,
1332 list) {
1333 if (inbound_link->node_to != link->node_from)
1334 continue;
1335
1336 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1337 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link);
1338 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link);
1339 kfd_set_recommended_sdma_engines(peer_dev, link, inbound_link);
1340 }
1341 }
1342
1343 /* Create indirect links so apply flags setting to all */
1344 list_for_each_entry(link, &dev->p2p_link_props, list) {
1345 link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1346 kfd_set_iolink_no_atomics(dev, NULL, link);
1347 peer_dev = kfd_topology_device_by_proximity_domain(
1348 link->node_to);
1349
1350 if (!peer_dev)
1351 continue;
1352
1353 list_for_each_entry(inbound_link, &peer_dev->p2p_link_props,
1354 list) {
1355 if (inbound_link->node_to != link->node_from)
1356 continue;
1357
1358 inbound_link->flags = CRAT_IOLINK_FLAGS_ENABLED;
1359 kfd_set_iolink_no_atomics(peer_dev, dev, inbound_link);
1360 kfd_set_iolink_non_coherent(peer_dev, link, inbound_link);
1361 }
1362 }
1363 }
1364
kfd_build_p2p_node_entry(struct kfd_topology_device * dev,struct kfd_iolink_properties * p2plink)1365 static int kfd_build_p2p_node_entry(struct kfd_topology_device *dev,
1366 struct kfd_iolink_properties *p2plink)
1367 {
1368 int ret;
1369
1370 p2plink->kobj = kzalloc(sizeof(struct kobject), GFP_KERNEL);
1371 if (!p2plink->kobj)
1372 return -ENOMEM;
1373
1374 ret = kobject_init_and_add(p2plink->kobj, &iolink_type,
1375 dev->kobj_p2plink, "%d", dev->node_props.p2p_links_count - 1);
1376 if (ret < 0) {
1377 kobject_put(p2plink->kobj);
1378 return ret;
1379 }
1380
1381 p2plink->attr.name = "properties";
1382 p2plink->attr.mode = KFD_SYSFS_FILE_MODE;
1383 sysfs_attr_init(&p2plink->attr);
1384 ret = sysfs_create_file(p2plink->kobj, &p2plink->attr);
1385 if (ret < 0)
1386 return ret;
1387
1388 return 0;
1389 }
1390
kfd_create_indirect_link_prop(struct kfd_topology_device * kdev,int gpu_node)1391 static int kfd_create_indirect_link_prop(struct kfd_topology_device *kdev, int gpu_node)
1392 {
1393 struct kfd_iolink_properties *gpu_link, *tmp_link, *cpu_link;
1394 struct kfd_iolink_properties *props = NULL, *props2 = NULL;
1395 struct kfd_topology_device *cpu_dev;
1396 int ret = 0;
1397 int i, num_cpu;
1398
1399 num_cpu = 0;
1400 list_for_each_entry(cpu_dev, &topology_device_list, list) {
1401 if (cpu_dev->gpu)
1402 break;
1403 num_cpu++;
1404 }
1405
1406 if (list_empty(&kdev->io_link_props))
1407 return -ENODATA;
1408
1409 gpu_link = list_first_entry(&kdev->io_link_props,
1410 struct kfd_iolink_properties, list);
1411
1412 for (i = 0; i < num_cpu; i++) {
1413 /* CPU <--> GPU */
1414 if (gpu_link->node_to == i)
1415 continue;
1416
1417 /* find CPU <--> CPU links */
1418 cpu_link = NULL;
1419 cpu_dev = kfd_topology_device_by_proximity_domain(i);
1420 if (cpu_dev) {
1421 list_for_each_entry(tmp_link,
1422 &cpu_dev->io_link_props, list) {
1423 if (tmp_link->node_to == gpu_link->node_to) {
1424 cpu_link = tmp_link;
1425 break;
1426 }
1427 }
1428 }
1429
1430 if (!cpu_link)
1431 return -ENOMEM;
1432
1433 /* CPU <--> CPU <--> GPU, GPU node*/
1434 props = kfd_alloc_struct(props);
1435 if (!props)
1436 return -ENOMEM;
1437
1438 memcpy(props, gpu_link, sizeof(struct kfd_iolink_properties));
1439 props->weight = gpu_link->weight + cpu_link->weight;
1440 props->min_latency = gpu_link->min_latency + cpu_link->min_latency;
1441 props->max_latency = gpu_link->max_latency + cpu_link->max_latency;
1442 props->min_bandwidth = min(gpu_link->min_bandwidth, cpu_link->min_bandwidth);
1443 props->max_bandwidth = min(gpu_link->max_bandwidth, cpu_link->max_bandwidth);
1444
1445 props->node_from = gpu_node;
1446 props->node_to = i;
1447 kdev->node_props.p2p_links_count++;
1448 list_add_tail(&props->list, &kdev->p2p_link_props);
1449 ret = kfd_build_p2p_node_entry(kdev, props);
1450 if (ret < 0)
1451 return ret;
1452
1453 /* for small Bar, no CPU --> GPU in-direct links */
1454 if (kfd_dev_is_large_bar(kdev->gpu)) {
1455 /* CPU <--> CPU <--> GPU, CPU node*/
1456 props2 = kfd_alloc_struct(props2);
1457 if (!props2)
1458 return -ENOMEM;
1459
1460 memcpy(props2, props, sizeof(struct kfd_iolink_properties));
1461 props2->node_from = i;
1462 props2->node_to = gpu_node;
1463 props2->kobj = NULL;
1464 cpu_dev->node_props.p2p_links_count++;
1465 list_add_tail(&props2->list, &cpu_dev->p2p_link_props);
1466 ret = kfd_build_p2p_node_entry(cpu_dev, props2);
1467 if (ret < 0)
1468 return ret;
1469 }
1470 }
1471 return ret;
1472 }
1473
1474 #if defined(CONFIG_HSA_AMD_P2P)
kfd_add_peer_prop(struct kfd_topology_device * kdev,struct kfd_topology_device * peer,int from,int to)1475 static int kfd_add_peer_prop(struct kfd_topology_device *kdev,
1476 struct kfd_topology_device *peer, int from, int to)
1477 {
1478 struct kfd_iolink_properties *props = NULL;
1479 struct kfd_iolink_properties *iolink1, *iolink2, *iolink3;
1480 struct kfd_topology_device *cpu_dev;
1481 int ret = 0;
1482
1483 if (!amdgpu_device_is_peer_accessible(
1484 kdev->gpu->adev,
1485 peer->gpu->adev))
1486 return ret;
1487
1488 if (list_empty(&kdev->io_link_props))
1489 return -ENODATA;
1490
1491 iolink1 = list_first_entry(&kdev->io_link_props,
1492 struct kfd_iolink_properties, list);
1493
1494 if (list_empty(&peer->io_link_props))
1495 return -ENODATA;
1496
1497 iolink2 = list_first_entry(&peer->io_link_props,
1498 struct kfd_iolink_properties, list);
1499
1500 props = kfd_alloc_struct(props);
1501 if (!props)
1502 return -ENOMEM;
1503
1504 memcpy(props, iolink1, sizeof(struct kfd_iolink_properties));
1505
1506 props->weight = iolink1->weight + iolink2->weight;
1507 props->min_latency = iolink1->min_latency + iolink2->min_latency;
1508 props->max_latency = iolink1->max_latency + iolink2->max_latency;
1509 props->min_bandwidth = min(iolink1->min_bandwidth, iolink2->min_bandwidth);
1510 props->max_bandwidth = min(iolink2->max_bandwidth, iolink2->max_bandwidth);
1511
1512 if (iolink1->node_to != iolink2->node_to) {
1513 /* CPU->CPU link*/
1514 cpu_dev = kfd_topology_device_by_proximity_domain(iolink1->node_to);
1515 if (cpu_dev) {
1516 list_for_each_entry(iolink3, &cpu_dev->io_link_props, list) {
1517 if (iolink3->node_to != iolink2->node_to)
1518 continue;
1519
1520 props->weight += iolink3->weight;
1521 props->min_latency += iolink3->min_latency;
1522 props->max_latency += iolink3->max_latency;
1523 props->min_bandwidth = min(props->min_bandwidth,
1524 iolink3->min_bandwidth);
1525 props->max_bandwidth = min(props->max_bandwidth,
1526 iolink3->max_bandwidth);
1527 break;
1528 }
1529 } else {
1530 WARN(1, "CPU node not found");
1531 }
1532 }
1533
1534 props->node_from = from;
1535 props->node_to = to;
1536 peer->node_props.p2p_links_count++;
1537 list_add_tail(&props->list, &peer->p2p_link_props);
1538 ret = kfd_build_p2p_node_entry(peer, props);
1539
1540 return ret;
1541 }
1542 #endif
1543
kfd_dev_create_p2p_links(void)1544 static int kfd_dev_create_p2p_links(void)
1545 {
1546 struct kfd_topology_device *dev;
1547 struct kfd_topology_device *new_dev;
1548 #if defined(CONFIG_HSA_AMD_P2P)
1549 uint32_t i;
1550 #endif
1551 uint32_t k;
1552 int ret = 0;
1553
1554 k = 0;
1555 list_for_each_entry(dev, &topology_device_list, list)
1556 k++;
1557 if (k < 2)
1558 return 0;
1559
1560 new_dev = list_last_entry(&topology_device_list, struct kfd_topology_device, list);
1561 if (WARN_ON(!new_dev->gpu))
1562 return 0;
1563
1564 k--;
1565
1566 /* create in-direct links */
1567 ret = kfd_create_indirect_link_prop(new_dev, k);
1568 if (ret < 0)
1569 goto out;
1570
1571 /* create p2p links */
1572 #if defined(CONFIG_HSA_AMD_P2P)
1573 i = 0;
1574 list_for_each_entry(dev, &topology_device_list, list) {
1575 if (dev == new_dev)
1576 break;
1577 if (!dev->gpu || !dev->gpu->adev ||
1578 (dev->gpu->kfd->hive_id &&
1579 dev->gpu->kfd->hive_id == new_dev->gpu->kfd->hive_id))
1580 goto next;
1581
1582 /* check if node(s) is/are peer accessible in one direction or bi-direction */
1583 ret = kfd_add_peer_prop(new_dev, dev, i, k);
1584 if (ret < 0)
1585 goto out;
1586
1587 ret = kfd_add_peer_prop(dev, new_dev, k, i);
1588 if (ret < 0)
1589 goto out;
1590 next:
1591 i++;
1592 }
1593 #endif
1594
1595 out:
1596 return ret;
1597 }
1598
1599 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */
fill_in_l1_pcache(struct kfd_cache_properties ** props_ext,struct kfd_gpu_cache_info * pcache_info,int cu_bitmask,int cache_type,unsigned int cu_processor_id,int cu_block)1600 static int fill_in_l1_pcache(struct kfd_cache_properties **props_ext,
1601 struct kfd_gpu_cache_info *pcache_info,
1602 int cu_bitmask,
1603 int cache_type, unsigned int cu_processor_id,
1604 int cu_block)
1605 {
1606 unsigned int cu_sibling_map_mask;
1607 int first_active_cu;
1608 struct kfd_cache_properties *pcache = NULL;
1609
1610 cu_sibling_map_mask = cu_bitmask;
1611 cu_sibling_map_mask >>= cu_block;
1612 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1);
1613 first_active_cu = ffs(cu_sibling_map_mask);
1614
1615 /* CU could be inactive. In case of shared cache find the first active
1616 * CU. and incase of non-shared cache check if the CU is inactive. If
1617 * inactive active skip it
1618 */
1619 if (first_active_cu) {
1620 pcache = kfd_alloc_struct(pcache);
1621 if (!pcache)
1622 return -ENOMEM;
1623
1624 memset(pcache, 0, sizeof(struct kfd_cache_properties));
1625 pcache->processor_id_low = cu_processor_id + (first_active_cu - 1);
1626 pcache->cache_level = pcache_info[cache_type].cache_level;
1627 pcache->cache_size = pcache_info[cache_type].cache_size;
1628 pcache->cacheline_size = pcache_info[cache_type].cache_line_size;
1629
1630 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE)
1631 pcache->cache_type |= HSA_CACHE_TYPE_DATA;
1632 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE)
1633 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION;
1634 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE)
1635 pcache->cache_type |= HSA_CACHE_TYPE_CPU;
1636 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE)
1637 pcache->cache_type |= HSA_CACHE_TYPE_HSACU;
1638
1639 /* Sibling map is w.r.t processor_id_low, so shift out
1640 * inactive CU
1641 */
1642 cu_sibling_map_mask =
1643 cu_sibling_map_mask >> (first_active_cu - 1);
1644
1645 pcache->sibling_map[0] = (uint8_t)(cu_sibling_map_mask & 0xFF);
1646 pcache->sibling_map[1] =
1647 (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
1648 pcache->sibling_map[2] =
1649 (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
1650 pcache->sibling_map[3] =
1651 (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
1652
1653 pcache->sibling_map_size = 4;
1654 *props_ext = pcache;
1655
1656 return 0;
1657 }
1658 return 1;
1659 }
1660
1661 /* Helper function. See kfd_fill_gpu_cache_info for parameter description */
fill_in_l2_l3_pcache(struct kfd_cache_properties ** props_ext,struct kfd_gpu_cache_info * pcache_info,struct amdgpu_cu_info * cu_info,struct amdgpu_gfx_config * gfx_info,int cache_type,unsigned int cu_processor_id,struct kfd_node * knode)1662 static int fill_in_l2_l3_pcache(struct kfd_cache_properties **props_ext,
1663 struct kfd_gpu_cache_info *pcache_info,
1664 struct amdgpu_cu_info *cu_info,
1665 struct amdgpu_gfx_config *gfx_info,
1666 int cache_type, unsigned int cu_processor_id,
1667 struct kfd_node *knode)
1668 {
1669 unsigned int cu_sibling_map_mask = 0;
1670 int first_active_cu;
1671 int i, j, k, xcc, start, end;
1672 int num_xcc = NUM_XCC(knode->xcc_mask);
1673 struct kfd_cache_properties *pcache = NULL;
1674 enum amdgpu_memory_partition mode;
1675 struct amdgpu_device *adev = knode->adev;
1676 bool found = false;
1677
1678 start = ffs(knode->xcc_mask) - 1;
1679 end = start + num_xcc;
1680
1681 /* To find the bitmap in the first active cu in the first
1682 * xcc, it is based on the assumption that evrey xcc must
1683 * have at least one active cu.
1684 */
1685 for (i = 0; i < gfx_info->max_shader_engines && !found; i++) {
1686 for (j = 0; j < gfx_info->max_sh_per_se && !found; j++) {
1687 if (cu_info->bitmap[start][i % 4][j % 4]) {
1688 cu_sibling_map_mask =
1689 cu_info->bitmap[start][i % 4][j % 4];
1690 found = true;
1691 }
1692 }
1693 }
1694
1695 cu_sibling_map_mask &=
1696 ((1 << pcache_info[cache_type].num_cu_shared) - 1);
1697 first_active_cu = ffs(cu_sibling_map_mask);
1698
1699 /* CU could be inactive. In case of shared cache find the first active
1700 * CU. and incase of non-shared cache check if the CU is inactive. If
1701 * inactive active skip it
1702 */
1703 if (first_active_cu) {
1704 pcache = kfd_alloc_struct(pcache);
1705 if (!pcache)
1706 return -ENOMEM;
1707
1708 memset(pcache, 0, sizeof(struct kfd_cache_properties));
1709 pcache->processor_id_low = cu_processor_id
1710 + (first_active_cu - 1);
1711 pcache->cache_level = pcache_info[cache_type].cache_level;
1712 pcache->cacheline_size = pcache_info[cache_type].cache_line_size;
1713
1714 if (KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 3) ||
1715 KFD_GC_VERSION(knode) == IP_VERSION(9, 4, 4) ||
1716 KFD_GC_VERSION(knode) == IP_VERSION(9, 5, 0))
1717 mode = adev->gmc.gmc_funcs->query_mem_partition_mode(adev);
1718 else
1719 mode = UNKNOWN_MEMORY_PARTITION_MODE;
1720
1721 pcache->cache_size = pcache_info[cache_type].cache_size;
1722 /* Partition mode only affects L3 cache size */
1723 if (mode && pcache->cache_level == 3)
1724 pcache->cache_size /= mode;
1725
1726 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_DATA_CACHE)
1727 pcache->cache_type |= HSA_CACHE_TYPE_DATA;
1728 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_INST_CACHE)
1729 pcache->cache_type |= HSA_CACHE_TYPE_INSTRUCTION;
1730 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_CPU_CACHE)
1731 pcache->cache_type |= HSA_CACHE_TYPE_CPU;
1732 if (pcache_info[cache_type].flags & CRAT_CACHE_FLAGS_SIMD_CACHE)
1733 pcache->cache_type |= HSA_CACHE_TYPE_HSACU;
1734
1735 /* Sibling map is w.r.t processor_id_low, so shift out
1736 * inactive CU
1737 */
1738 cu_sibling_map_mask = cu_sibling_map_mask >> (first_active_cu - 1);
1739 k = 0;
1740
1741 for (xcc = start; xcc < end; xcc++) {
1742 for (i = 0; i < gfx_info->max_shader_engines; i++) {
1743 for (j = 0; j < gfx_info->max_sh_per_se; j++) {
1744 pcache->sibling_map[k] = (uint8_t)(cu_sibling_map_mask & 0xFF);
1745 pcache->sibling_map[k+1] = (uint8_t)((cu_sibling_map_mask >> 8) & 0xFF);
1746 pcache->sibling_map[k+2] = (uint8_t)((cu_sibling_map_mask >> 16) & 0xFF);
1747 pcache->sibling_map[k+3] = (uint8_t)((cu_sibling_map_mask >> 24) & 0xFF);
1748 k += 4;
1749
1750 cu_sibling_map_mask = cu_info->bitmap[xcc][i % 4][j + i / 4];
1751 cu_sibling_map_mask &= ((1 << pcache_info[cache_type].num_cu_shared) - 1);
1752 }
1753 }
1754 }
1755 pcache->sibling_map_size = k;
1756 *props_ext = pcache;
1757 return 0;
1758 }
1759 return 1;
1760 }
1761
1762 #define KFD_MAX_CACHE_TYPES 6
1763
1764 /* kfd_fill_cache_non_crat_info - Fill GPU cache info using kfd_gpu_cache_info
1765 * tables
1766 */
kfd_fill_cache_non_crat_info(struct kfd_topology_device * dev,struct kfd_node * kdev)1767 static void kfd_fill_cache_non_crat_info(struct kfd_topology_device *dev, struct kfd_node *kdev)
1768 {
1769 struct kfd_gpu_cache_info *pcache_info = NULL;
1770 int i, j, k, xcc, start, end;
1771 int ct = 0;
1772 unsigned int cu_processor_id;
1773 int ret;
1774 unsigned int num_cu_shared;
1775 struct amdgpu_cu_info *cu_info = &kdev->adev->gfx.cu_info;
1776 struct amdgpu_gfx_config *gfx_info = &kdev->adev->gfx.config;
1777 int gpu_processor_id;
1778 struct kfd_cache_properties *props_ext = NULL;
1779 int num_of_entries = 0;
1780 int num_of_cache_types = 0;
1781 struct kfd_gpu_cache_info cache_info[KFD_MAX_CACHE_TYPES];
1782
1783
1784 gpu_processor_id = dev->node_props.simd_id_base;
1785
1786 memset(cache_info, 0, sizeof(cache_info));
1787 pcache_info = cache_info;
1788 num_of_cache_types = kfd_get_gpu_cache_info(kdev, &pcache_info);
1789 if (!num_of_cache_types) {
1790 pr_warn("no cache info found\n");
1791 return;
1792 }
1793
1794 /* For each type of cache listed in the kfd_gpu_cache_info table,
1795 * go through all available Compute Units.
1796 * The [i,j,k] loop will
1797 * if kfd_gpu_cache_info.num_cu_shared = 1
1798 * will parse through all available CU
1799 * If (kfd_gpu_cache_info.num_cu_shared != 1)
1800 * then it will consider only one CU from
1801 * the shared unit
1802 */
1803 start = ffs(kdev->xcc_mask) - 1;
1804 end = start + NUM_XCC(kdev->xcc_mask);
1805
1806 for (ct = 0; ct < num_of_cache_types; ct++) {
1807 cu_processor_id = gpu_processor_id;
1808 if (pcache_info[ct].cache_level == 1) {
1809 for (xcc = start; xcc < end; xcc++) {
1810 for (i = 0; i < gfx_info->max_shader_engines; i++) {
1811 for (j = 0; j < gfx_info->max_sh_per_se; j++) {
1812 for (k = 0; k < gfx_info->max_cu_per_sh; k += pcache_info[ct].num_cu_shared) {
1813
1814 ret = fill_in_l1_pcache(&props_ext, pcache_info,
1815 cu_info->bitmap[xcc][i % 4][j + i / 4], ct,
1816 cu_processor_id, k);
1817
1818 if (ret < 0)
1819 break;
1820
1821 if (!ret) {
1822 num_of_entries++;
1823 list_add_tail(&props_ext->list, &dev->cache_props);
1824 }
1825
1826 /* Move to next CU block */
1827 num_cu_shared = ((k + pcache_info[ct].num_cu_shared) <=
1828 gfx_info->max_cu_per_sh) ?
1829 pcache_info[ct].num_cu_shared :
1830 (gfx_info->max_cu_per_sh - k);
1831 cu_processor_id += num_cu_shared;
1832 }
1833 }
1834 }
1835 }
1836 } else {
1837 ret = fill_in_l2_l3_pcache(&props_ext, pcache_info,
1838 cu_info, gfx_info, ct, cu_processor_id, kdev);
1839
1840 if (ret < 0)
1841 break;
1842
1843 if (!ret) {
1844 num_of_entries++;
1845 list_add_tail(&props_ext->list, &dev->cache_props);
1846 }
1847 }
1848 }
1849 dev->node_props.caches_count += num_of_entries;
1850 pr_debug("Added [%d] GPU cache entries\n", num_of_entries);
1851 }
1852
kfd_topology_add_device_locked(struct kfd_node * gpu,struct kfd_topology_device ** dev)1853 static int kfd_topology_add_device_locked(struct kfd_node *gpu,
1854 struct kfd_topology_device **dev)
1855 {
1856 int proximity_domain = ++topology_crat_proximity_domain;
1857 struct list_head temp_topology_device_list;
1858 void *crat_image = NULL;
1859 size_t image_size = 0;
1860 int res;
1861
1862 res = kfd_create_crat_image_virtual(&crat_image, &image_size,
1863 COMPUTE_UNIT_GPU, gpu,
1864 proximity_domain);
1865 if (res) {
1866 dev_err(gpu->adev->dev, "Error creating VCRAT\n");
1867 topology_crat_proximity_domain--;
1868 goto err;
1869 }
1870
1871 INIT_LIST_HEAD(&temp_topology_device_list);
1872
1873 res = kfd_parse_crat_table(crat_image,
1874 &temp_topology_device_list,
1875 proximity_domain);
1876 if (res) {
1877 dev_err(gpu->adev->dev, "Error parsing VCRAT\n");
1878 topology_crat_proximity_domain--;
1879 goto err;
1880 }
1881
1882 kfd_topology_update_device_list(&temp_topology_device_list,
1883 &topology_device_list);
1884
1885 *dev = kfd_assign_gpu(gpu);
1886 if (WARN_ON(!*dev)) {
1887 res = -ENODEV;
1888 goto err;
1889 }
1890
1891 /* Fill the cache affinity information here for the GPUs
1892 * using VCRAT
1893 */
1894 kfd_fill_cache_non_crat_info(*dev, gpu);
1895
1896 /* Update the SYSFS tree, since we added another topology
1897 * device
1898 */
1899 res = kfd_topology_update_sysfs();
1900 if (!res)
1901 sys_props.generation_count++;
1902 else
1903 dev_err(gpu->adev->dev, "Failed to update GPU to sysfs topology. res=%d\n",
1904 res);
1905
1906 err:
1907 kfd_destroy_crat_image(crat_image);
1908 return res;
1909 }
1910
kfd_topology_set_dbg_firmware_support(struct kfd_topology_device * dev)1911 static void kfd_topology_set_dbg_firmware_support(struct kfd_topology_device *dev)
1912 {
1913 bool firmware_supported = true;
1914
1915 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(11, 0, 0) &&
1916 KFD_GC_VERSION(dev->gpu) < IP_VERSION(12, 0, 0)) {
1917 uint32_t mes_api_rev = (dev->gpu->adev->mes.sched_version &
1918 AMDGPU_MES_API_VERSION_MASK) >>
1919 AMDGPU_MES_API_VERSION_SHIFT;
1920 uint32_t mes_rev = dev->gpu->adev->mes.sched_version &
1921 AMDGPU_MES_VERSION_MASK;
1922
1923 firmware_supported = (mes_api_rev >= 14) && (mes_rev >= 64);
1924 goto out;
1925 }
1926
1927 /*
1928 * Note: Any unlisted devices here are assumed to support exception handling.
1929 * Add additional checks here as needed.
1930 */
1931 switch (KFD_GC_VERSION(dev->gpu)) {
1932 case IP_VERSION(9, 0, 1):
1933 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459 + 32768;
1934 break;
1935 case IP_VERSION(9, 1, 0):
1936 case IP_VERSION(9, 2, 1):
1937 case IP_VERSION(9, 2, 2):
1938 case IP_VERSION(9, 3, 0):
1939 case IP_VERSION(9, 4, 0):
1940 firmware_supported = dev->gpu->kfd->mec_fw_version >= 459;
1941 break;
1942 case IP_VERSION(9, 4, 1):
1943 firmware_supported = dev->gpu->kfd->mec_fw_version >= 60;
1944 break;
1945 case IP_VERSION(9, 4, 2):
1946 firmware_supported = dev->gpu->kfd->mec_fw_version >= 51;
1947 break;
1948 case IP_VERSION(10, 1, 10):
1949 case IP_VERSION(10, 1, 2):
1950 case IP_VERSION(10, 1, 1):
1951 firmware_supported = dev->gpu->kfd->mec_fw_version >= 144;
1952 break;
1953 case IP_VERSION(10, 3, 0):
1954 case IP_VERSION(10, 3, 2):
1955 case IP_VERSION(10, 3, 1):
1956 case IP_VERSION(10, 3, 4):
1957 case IP_VERSION(10, 3, 5):
1958 firmware_supported = dev->gpu->kfd->mec_fw_version >= 89;
1959 break;
1960 case IP_VERSION(10, 1, 3):
1961 case IP_VERSION(10, 3, 3):
1962 firmware_supported = false;
1963 break;
1964 default:
1965 break;
1966 }
1967
1968 out:
1969 if (firmware_supported)
1970 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_FIRMWARE_SUPPORTED;
1971 }
1972
kfd_topology_set_capabilities(struct kfd_topology_device * dev)1973 static void kfd_topology_set_capabilities(struct kfd_topology_device *dev)
1974 {
1975 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_2_0 <<
1976 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
1977 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
1978
1979 dev->node_props.capability |= HSA_CAP_TRAP_DEBUG_SUPPORT |
1980 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_TRAP_OVERRIDE_SUPPORTED |
1981 HSA_CAP_TRAP_DEBUG_WAVE_LAUNCH_MODE_SUPPORTED;
1982
1983 if (kfd_dbg_has_ttmps_always_setup(dev->gpu))
1984 dev->node_props.debug_prop |= HSA_DBG_DISPATCH_INFO_ALWAYS_VALID;
1985
1986 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(10, 0, 0)) {
1987 if (KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 3) ||
1988 KFD_GC_VERSION(dev->gpu) == IP_VERSION(9, 4, 4))
1989 dev->node_props.debug_prop |=
1990 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9_4_3 |
1991 HSA_DBG_WATCH_ADDR_MASK_HI_BIT_GFX9_4_3;
1992 else
1993 dev->node_props.debug_prop |=
1994 HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX9 |
1995 HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
1996
1997 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(9, 4, 2))
1998 dev->node_props.capability |=
1999 HSA_CAP_TRAP_DEBUG_PRECISE_MEMORY_OPERATIONS_SUPPORTED;
2000
2001 if (!amdgpu_sriov_vf(dev->gpu->adev))
2002 dev->node_props.capability |= HSA_CAP_PER_QUEUE_RESET_SUPPORTED;
2003
2004 if (dev->gpu->adev->sdma.supported_reset & AMDGPU_RESET_TYPE_PER_QUEUE)
2005 dev->node_props.capability2 |= HSA_CAP2_PER_SDMA_QUEUE_RESET_SUPPORTED;
2006 } else {
2007 dev->node_props.debug_prop |= HSA_DBG_WATCH_ADDR_MASK_LO_BIT_GFX10 |
2008 HSA_DBG_WATCH_ADDR_MASK_HI_BIT;
2009
2010 if (KFD_GC_VERSION(dev->gpu) >= IP_VERSION(12, 0, 0))
2011 dev->node_props.capability |=
2012 HSA_CAP_TRAP_DEBUG_PRECISE_ALU_OPERATIONS_SUPPORTED;
2013 }
2014
2015 kfd_topology_set_dbg_firmware_support(dev);
2016 }
2017
kfd_topology_add_device(struct kfd_node * gpu)2018 int kfd_topology_add_device(struct kfd_node *gpu)
2019 {
2020 uint32_t gpu_id;
2021 struct kfd_topology_device *dev;
2022 int res = 0;
2023 int i;
2024 const char *asic_name = amdgpu_asic_name[gpu->adev->asic_type];
2025 struct amdgpu_gfx_config *gfx_info = &gpu->adev->gfx.config;
2026 struct amdgpu_cu_info *cu_info = &gpu->adev->gfx.cu_info;
2027
2028 if (gpu->xcp && !gpu->xcp->ddev) {
2029 dev_warn(gpu->adev->dev,
2030 "Won't add GPU to topology since it has no drm node assigned.");
2031 return 0;
2032 } else {
2033 dev_dbg(gpu->adev->dev, "Adding new GPU to topology\n");
2034 }
2035
2036 /* Check to see if this gpu device exists in the topology_device_list.
2037 * If so, assign the gpu to that device,
2038 * else create a Virtual CRAT for this gpu device and then parse that
2039 * CRAT to create a new topology device. Once created assign the gpu to
2040 * that topology device
2041 */
2042 down_write(&topology_lock);
2043 dev = kfd_assign_gpu(gpu);
2044 if (!dev)
2045 res = kfd_topology_add_device_locked(gpu, &dev);
2046 up_write(&topology_lock);
2047 if (res)
2048 return res;
2049
2050 gpu_id = kfd_generate_gpu_id(gpu);
2051 dev->gpu_id = gpu_id;
2052 gpu->id = gpu_id;
2053
2054 kfd_dev_create_p2p_links();
2055
2056 /* TODO: Move the following lines to function
2057 * kfd_add_non_crat_information
2058 */
2059
2060 /* Fill-in additional information that is not available in CRAT but
2061 * needed for the topology
2062 */
2063 for (i = 0; i < KFD_TOPOLOGY_PUBLIC_NAME_SIZE-1; i++) {
2064 dev->node_props.name[i] = __tolower(asic_name[i]);
2065 if (asic_name[i] == '\0')
2066 break;
2067 }
2068 dev->node_props.name[i] = '\0';
2069
2070 dev->node_props.simd_arrays_per_engine =
2071 gfx_info->max_sh_per_se;
2072
2073 dev->node_props.gfx_target_version =
2074 gpu->kfd->device_info.gfx_target_version;
2075 dev->node_props.vendor_id = gpu->adev->pdev->vendor;
2076 dev->node_props.device_id = gpu->adev->pdev->device;
2077 dev->node_props.capability |=
2078 ((dev->gpu->adev->rev_id << HSA_CAP_ASIC_REVISION_SHIFT) &
2079 HSA_CAP_ASIC_REVISION_MASK);
2080
2081 dev->node_props.location_id = pci_dev_id(gpu->adev->pdev);
2082 if (gpu->kfd->num_nodes > 1)
2083 dev->node_props.location_id |= dev->gpu->node_id;
2084
2085 dev->node_props.domain = pci_domain_nr(gpu->adev->pdev->bus);
2086 dev->node_props.max_engine_clk_fcompute =
2087 amdgpu_amdkfd_get_max_engine_clock_in_mhz(dev->gpu->adev);
2088 dev->node_props.max_engine_clk_ccompute =
2089 cpufreq_quick_get_max(0) / 1000;
2090
2091 if (gpu->xcp)
2092 dev->node_props.drm_render_minor = gpu->xcp->ddev->render->index;
2093 else
2094 dev->node_props.drm_render_minor =
2095 gpu->kfd->shared_resources.drm_render_minor;
2096
2097 dev->node_props.hive_id = gpu->kfd->hive_id;
2098 dev->node_props.num_sdma_engines = kfd_get_num_sdma_engines(gpu);
2099 dev->node_props.num_sdma_xgmi_engines =
2100 kfd_get_num_xgmi_sdma_engines(gpu);
2101 dev->node_props.num_sdma_queues_per_engine =
2102 gpu->kfd->device_info.num_sdma_queues_per_engine -
2103 gpu->kfd->device_info.num_reserved_sdma_queues_per_engine;
2104 dev->node_props.num_gws = (dev->gpu->gws &&
2105 dev->gpu->dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) ?
2106 dev->gpu->adev->gds.gws_size : 0;
2107 dev->node_props.num_cp_queues = get_cp_queues_num(dev->gpu->dqm);
2108
2109 kfd_fill_mem_clk_max_info(dev);
2110 kfd_fill_iolink_non_crat_info(dev);
2111
2112 switch (dev->gpu->adev->asic_type) {
2113 case CHIP_KAVERI:
2114 case CHIP_HAWAII:
2115 case CHIP_TONGA:
2116 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_PRE_1_0 <<
2117 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
2118 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
2119 break;
2120 case CHIP_CARRIZO:
2121 case CHIP_FIJI:
2122 case CHIP_POLARIS10:
2123 case CHIP_POLARIS11:
2124 case CHIP_POLARIS12:
2125 case CHIP_VEGAM:
2126 pr_debug("Adding doorbell packet type capability\n");
2127 dev->node_props.capability |= ((HSA_CAP_DOORBELL_TYPE_1_0 <<
2128 HSA_CAP_DOORBELL_TYPE_TOTALBITS_SHIFT) &
2129 HSA_CAP_DOORBELL_TYPE_TOTALBITS_MASK);
2130 break;
2131 default:
2132 if (KFD_GC_VERSION(dev->gpu) < IP_VERSION(9, 0, 1))
2133 WARN(1, "Unexpected ASIC family %u",
2134 dev->gpu->adev->asic_type);
2135 else
2136 kfd_topology_set_capabilities(dev);
2137 }
2138
2139 /*
2140 * Overwrite ATS capability according to needs_iommu_device to fix
2141 * potential missing corresponding bit in CRAT of BIOS.
2142 */
2143 dev->node_props.capability &= ~HSA_CAP_ATS_PRESENT;
2144
2145 /* Fix errors in CZ CRAT.
2146 * simd_count: Carrizo CRAT reports wrong simd_count, probably
2147 * because it doesn't consider masked out CUs
2148 * max_waves_per_simd: Carrizo reports wrong max_waves_per_simd
2149 */
2150 if (dev->gpu->adev->asic_type == CHIP_CARRIZO) {
2151 dev->node_props.simd_count =
2152 cu_info->simd_per_cu * cu_info->number;
2153 dev->node_props.max_waves_per_simd = 10;
2154 }
2155
2156 /* kfd only concerns sram ecc on GFX and HBM ecc on UMC */
2157 dev->node_props.capability |=
2158 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__GFX)) != 0) ?
2159 HSA_CAP_SRAM_EDCSUPPORTED : 0;
2160 dev->node_props.capability |=
2161 ((dev->gpu->adev->ras_enabled & BIT(AMDGPU_RAS_BLOCK__UMC)) != 0) ?
2162 HSA_CAP_MEM_EDCSUPPORTED : 0;
2163
2164 if (KFD_GC_VERSION(dev->gpu) != IP_VERSION(9, 0, 1))
2165 dev->node_props.capability |= (dev->gpu->adev->ras_enabled != 0) ?
2166 HSA_CAP_RASEVENTNOTIFY : 0;
2167
2168 if (KFD_IS_SVM_API_SUPPORTED(dev->gpu->adev))
2169 dev->node_props.capability |= HSA_CAP_SVMAPI_SUPPORTED;
2170
2171 if (dev->gpu->adev->gmc.is_app_apu ||
2172 dev->gpu->adev->gmc.xgmi.connected_to_cpu)
2173 dev->node_props.capability |= HSA_CAP_FLAGS_COHERENTHOSTACCESS;
2174
2175 kfd_queue_ctx_save_restore_size(dev);
2176
2177 kfd_debug_print_topology();
2178
2179 kfd_notify_gpu_change(gpu_id, 1);
2180
2181 return 0;
2182 }
2183
2184 /**
2185 * kfd_topology_update_io_links() - Update IO links after device removal.
2186 * @proximity_domain: Proximity domain value of the dev being removed.
2187 *
2188 * The topology list currently is arranged in increasing order of
2189 * proximity domain.
2190 *
2191 * Two things need to be done when a device is removed:
2192 * 1. All the IO links to this device need to be removed.
2193 * 2. All nodes after the current device node need to move
2194 * up once this device node is removed from the topology
2195 * list. As a result, the proximity domain values for
2196 * all nodes after the node being deleted reduce by 1.
2197 * This would also cause the proximity domain values for
2198 * io links to be updated based on new proximity domain
2199 * values.
2200 *
2201 * Context: The caller must hold write topology_lock.
2202 */
kfd_topology_update_io_links(int proximity_domain)2203 static void kfd_topology_update_io_links(int proximity_domain)
2204 {
2205 struct kfd_topology_device *dev;
2206 struct kfd_iolink_properties *iolink, *p2plink, *tmp;
2207
2208 list_for_each_entry(dev, &topology_device_list, list) {
2209 if (dev->proximity_domain > proximity_domain)
2210 dev->proximity_domain--;
2211
2212 list_for_each_entry_safe(iolink, tmp, &dev->io_link_props, list) {
2213 /*
2214 * If there is an io link to the dev being deleted
2215 * then remove that IO link also.
2216 */
2217 if (iolink->node_to == proximity_domain) {
2218 list_del(&iolink->list);
2219 dev->node_props.io_links_count--;
2220 } else {
2221 if (iolink->node_from > proximity_domain)
2222 iolink->node_from--;
2223 if (iolink->node_to > proximity_domain)
2224 iolink->node_to--;
2225 }
2226 }
2227
2228 list_for_each_entry_safe(p2plink, tmp, &dev->p2p_link_props, list) {
2229 /*
2230 * If there is a p2p link to the dev being deleted
2231 * then remove that p2p link also.
2232 */
2233 if (p2plink->node_to == proximity_domain) {
2234 list_del(&p2plink->list);
2235 dev->node_props.p2p_links_count--;
2236 } else {
2237 if (p2plink->node_from > proximity_domain)
2238 p2plink->node_from--;
2239 if (p2plink->node_to > proximity_domain)
2240 p2plink->node_to--;
2241 }
2242 }
2243 }
2244 }
2245
kfd_topology_remove_device(struct kfd_node * gpu)2246 int kfd_topology_remove_device(struct kfd_node *gpu)
2247 {
2248 struct kfd_topology_device *dev, *tmp;
2249 uint32_t gpu_id;
2250 int res = -ENODEV;
2251 int i = 0;
2252
2253 down_write(&topology_lock);
2254
2255 list_for_each_entry_safe(dev, tmp, &topology_device_list, list) {
2256 if (dev->gpu == gpu) {
2257 gpu_id = dev->gpu_id;
2258 kfd_remove_sysfs_node_entry(dev);
2259 kfd_release_topology_device(dev);
2260 sys_props.num_devices--;
2261 kfd_topology_update_io_links(i);
2262 topology_crat_proximity_domain = sys_props.num_devices-1;
2263 sys_props.generation_count++;
2264 res = 0;
2265 if (kfd_topology_update_sysfs() < 0)
2266 kfd_topology_release_sysfs();
2267 break;
2268 }
2269 i++;
2270 }
2271
2272 up_write(&topology_lock);
2273
2274 if (!res)
2275 kfd_notify_gpu_change(gpu_id, 0);
2276
2277 return res;
2278 }
2279
2280 /* kfd_topology_enum_kfd_devices - Enumerate through all devices in KFD
2281 * topology. If GPU device is found @idx, then valid kfd_dev pointer is
2282 * returned through @kdev
2283 * Return - 0: On success (@kdev will be NULL for non GPU nodes)
2284 * -1: If end of list
2285 */
kfd_topology_enum_kfd_devices(uint8_t idx,struct kfd_node ** kdev)2286 int kfd_topology_enum_kfd_devices(uint8_t idx, struct kfd_node **kdev)
2287 {
2288
2289 struct kfd_topology_device *top_dev;
2290 uint8_t device_idx = 0;
2291
2292 *kdev = NULL;
2293 down_read(&topology_lock);
2294
2295 list_for_each_entry(top_dev, &topology_device_list, list) {
2296 if (device_idx == idx) {
2297 *kdev = top_dev->gpu;
2298 up_read(&topology_lock);
2299 return 0;
2300 }
2301
2302 device_idx++;
2303 }
2304
2305 up_read(&topology_lock);
2306
2307 return -1;
2308
2309 }
2310
kfd_cpumask_to_apic_id(const struct cpumask * cpumask)2311 static int kfd_cpumask_to_apic_id(const struct cpumask *cpumask)
2312 {
2313 int first_cpu_of_numa_node;
2314
2315 if (!cpumask || cpumask == cpu_none_mask)
2316 return -1;
2317 first_cpu_of_numa_node = cpumask_first(cpumask);
2318 if (first_cpu_of_numa_node >= nr_cpu_ids)
2319 return -1;
2320 #ifdef CONFIG_X86_64
2321 return cpu_data(first_cpu_of_numa_node).topo.apicid;
2322 #else
2323 return first_cpu_of_numa_node;
2324 #endif
2325 }
2326
2327 /* kfd_numa_node_to_apic_id - Returns the APIC ID of the first logical processor
2328 * of the given NUMA node (numa_node_id)
2329 * Return -1 on failure
2330 */
kfd_numa_node_to_apic_id(int numa_node_id)2331 int kfd_numa_node_to_apic_id(int numa_node_id)
2332 {
2333 if (numa_node_id == -1) {
2334 pr_warn("Invalid NUMA Node. Use online CPU mask\n");
2335 return kfd_cpumask_to_apic_id(cpu_online_mask);
2336 }
2337 return kfd_cpumask_to_apic_id(cpumask_of_node(numa_node_id));
2338 }
2339
2340 #if defined(CONFIG_DEBUG_FS)
2341
kfd_debugfs_hqds_by_device(struct seq_file * m,void * data)2342 int kfd_debugfs_hqds_by_device(struct seq_file *m, void *data)
2343 {
2344 struct kfd_topology_device *dev;
2345 unsigned int i = 0;
2346 int r = 0;
2347
2348 down_read(&topology_lock);
2349
2350 list_for_each_entry(dev, &topology_device_list, list) {
2351 if (!dev->gpu) {
2352 i++;
2353 continue;
2354 }
2355
2356 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id);
2357 r = dqm_debugfs_hqds(m, dev->gpu->dqm);
2358 if (r)
2359 break;
2360 }
2361
2362 up_read(&topology_lock);
2363
2364 return r;
2365 }
2366
kfd_debugfs_rls_by_device(struct seq_file * m,void * data)2367 int kfd_debugfs_rls_by_device(struct seq_file *m, void *data)
2368 {
2369 struct kfd_topology_device *dev;
2370 unsigned int i = 0;
2371 int r = 0;
2372
2373 down_read(&topology_lock);
2374
2375 list_for_each_entry(dev, &topology_device_list, list) {
2376 if (!dev->gpu) {
2377 i++;
2378 continue;
2379 }
2380
2381 seq_printf(m, "Node %u, gpu_id %x:\n", i++, dev->gpu->id);
2382 r = pm_debugfs_runlist(m, &dev->gpu->dqm->packet_mgr);
2383 if (r)
2384 break;
2385 }
2386
2387 up_read(&topology_lock);
2388
2389 return r;
2390 }
2391
2392 #endif
2393