1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright(c) 2023 Intel Corporation */
3 #include "adf_accel_devices.h"
4 #include "adf_cfg.h"
5 #include "adf_cfg_services.h"
6 #include "adf_cfg_strings.h"
7 #include "adf_common_drv.h"
8 #include "adf_gen4_config.h"
9 #include "adf_heartbeat.h"
10 #include "adf_transport_access_macros.h"
11 #include "qat_compression.h"
12 #include "qat_crypto.h"
13
adf_crypto_dev_config(struct adf_accel_dev * accel_dev)14 static int adf_crypto_dev_config(struct adf_accel_dev *accel_dev)
15 {
16 char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
17 int banks = GET_MAX_BANKS(accel_dev);
18 int cpus = num_online_cpus();
19 unsigned long bank, val;
20 int instances;
21 int ret;
22 int i;
23
24 if (adf_hw_dev_has_crypto(accel_dev))
25 instances = min(cpus, banks / 2);
26 else
27 instances = 0;
28
29 for (i = 0; i < instances; i++) {
30 val = i;
31 bank = i * 2;
32 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_BANK_NUM, i);
33 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
34 key, &bank, ADF_DEC);
35 if (ret)
36 goto err;
37
38 bank += 1;
39 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_BANK_NUM, i);
40 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
41 key, &bank, ADF_DEC);
42 if (ret)
43 goto err;
44
45 snprintf(key, sizeof(key), ADF_CY "%d" ADF_ETRMGR_CORE_AFFINITY,
46 i);
47 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
48 key, &val, ADF_DEC);
49 if (ret)
50 goto err;
51
52 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_SIZE, i);
53 val = 128;
54 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
55 key, &val, ADF_DEC);
56 if (ret)
57 goto err;
58
59 val = 512;
60 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_SIZE, i);
61 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
62 key, &val, ADF_DEC);
63 if (ret)
64 goto err;
65
66 val = 0;
67 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_TX, i);
68 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
69 key, &val, ADF_DEC);
70 if (ret)
71 goto err;
72
73 val = 0;
74 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_TX, i);
75 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
76 key, &val, ADF_DEC);
77 if (ret)
78 goto err;
79
80 val = 1;
81 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_ASYM_RX, i);
82 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
83 key, &val, ADF_DEC);
84 if (ret)
85 goto err;
86
87 val = 1;
88 snprintf(key, sizeof(key), ADF_CY "%d" ADF_RING_SYM_RX, i);
89 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
90 key, &val, ADF_DEC);
91 if (ret)
92 goto err;
93
94 val = ADF_COALESCING_DEF_TIME;
95 snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
96 ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
97 key, &val, ADF_DEC);
98 if (ret)
99 goto err;
100 }
101
102 val = i;
103 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
104 &val, ADF_DEC);
105 if (ret)
106 goto err;
107
108 val = 0;
109 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
110 &val, ADF_DEC);
111 if (ret)
112 goto err;
113
114 return 0;
115 err:
116 dev_err(&GET_DEV(accel_dev), "Failed to add configuration for crypto\n");
117 return ret;
118 }
119
adf_comp_dev_config(struct adf_accel_dev * accel_dev)120 static int adf_comp_dev_config(struct adf_accel_dev *accel_dev)
121 {
122 char key[ADF_CFG_MAX_KEY_LEN_IN_BYTES];
123 int banks = GET_MAX_BANKS(accel_dev);
124 int cpus = num_online_cpus();
125 unsigned long val;
126 int instances;
127 int ret;
128 int i;
129
130 if (adf_hw_dev_has_compression(accel_dev))
131 instances = min(cpus, banks);
132 else
133 instances = 0;
134
135 for (i = 0; i < instances; i++) {
136 val = i;
137 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_BANK_NUM, i);
138 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
139 key, &val, ADF_DEC);
140 if (ret)
141 goto err;
142
143 val = 512;
144 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_SIZE, i);
145 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
146 key, &val, ADF_DEC);
147 if (ret)
148 goto err;
149
150 val = 0;
151 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_TX, i);
152 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
153 key, &val, ADF_DEC);
154 if (ret)
155 goto err;
156
157 val = 1;
158 snprintf(key, sizeof(key), ADF_DC "%d" ADF_RING_DC_RX, i);
159 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC,
160 key, &val, ADF_DEC);
161 if (ret)
162 goto err;
163
164 val = ADF_COALESCING_DEF_TIME;
165 snprintf(key, sizeof(key), ADF_ETRMGR_COALESCE_TIMER_FORMAT, i);
166 ret = adf_cfg_add_key_value_param(accel_dev, "Accelerator0",
167 key, &val, ADF_DEC);
168 if (ret)
169 goto err;
170 }
171
172 val = i;
173 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
174 &val, ADF_DEC);
175 if (ret)
176 goto err;
177
178 val = 0;
179 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
180 &val, ADF_DEC);
181 if (ret)
182 goto err;
183
184 return 0;
185 err:
186 dev_err(&GET_DEV(accel_dev), "Failed to add configuration for compression\n");
187 return ret;
188 }
189
adf_no_dev_config(struct adf_accel_dev * accel_dev)190 static int adf_no_dev_config(struct adf_accel_dev *accel_dev)
191 {
192 unsigned long val;
193 int ret;
194
195 val = 0;
196 ret = adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_DC,
197 &val, ADF_DEC);
198 if (ret)
199 return ret;
200
201 return adf_cfg_add_key_value_param(accel_dev, ADF_KERNEL_SEC, ADF_NUM_CY,
202 &val, ADF_DEC);
203 }
204
205 /**
206 * adf_gen4_dev_config() - create dev config required to create instances
207 *
208 * @accel_dev: Pointer to acceleration device.
209 *
210 * Function creates device configuration required to create instances
211 *
212 * Return: 0 on success, error code otherwise.
213 */
adf_gen4_dev_config(struct adf_accel_dev * accel_dev)214 int adf_gen4_dev_config(struct adf_accel_dev *accel_dev)
215 {
216 int ret;
217
218 ret = adf_cfg_section_add(accel_dev, ADF_KERNEL_SEC);
219 if (ret)
220 goto err;
221
222 ret = adf_cfg_section_add(accel_dev, "Accelerator0");
223 if (ret)
224 goto err;
225
226 switch (adf_get_service_enabled(accel_dev)) {
227 case SVC_SYM_ASYM:
228 ret = adf_crypto_dev_config(accel_dev);
229 break;
230 case SVC_DC:
231 case SVC_DCC:
232 ret = adf_comp_dev_config(accel_dev);
233 break;
234 default:
235 ret = adf_no_dev_config(accel_dev);
236 break;
237 }
238
239 if (ret)
240 goto err;
241
242 set_bit(ADF_STATUS_CONFIGURED, &accel_dev->status);
243
244 return ret;
245
246 err:
247 dev_err(&GET_DEV(accel_dev), "Failed to configure QAT driver\n");
248 return ret;
249 }
250 EXPORT_SYMBOL_GPL(adf_gen4_dev_config);
251
adf_gen4_cfg_dev_init(struct adf_accel_dev * accel_dev)252 int adf_gen4_cfg_dev_init(struct adf_accel_dev *accel_dev)
253 {
254 const char *config;
255 int ret;
256
257 config = accel_dev->accel_id % 2 ? ADF_CFG_DC : ADF_CFG_CY;
258
259 ret = adf_cfg_section_add(accel_dev, ADF_GENERAL_SEC);
260 if (ret)
261 return ret;
262
263 /* Default configuration is crypto only for even devices
264 * and compression for odd devices
265 */
266 ret = adf_cfg_add_key_value_param(accel_dev, ADF_GENERAL_SEC,
267 ADF_SERVICES_ENABLED, config,
268 ADF_STR);
269 if (ret)
270 return ret;
271
272 adf_heartbeat_save_cfg_param(accel_dev, ADF_CFG_HB_TIMER_MIN_MS);
273
274 return 0;
275 }
276 EXPORT_SYMBOL_GPL(adf_gen4_cfg_dev_init);
277