1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
4 */
5
6 #include <linux/clk-provider.h>
7 #include <linux/kernel.h>
8 #include <linux/mfd/syscon.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/regmap.h>
12 #include <linux/slab.h>
13
14 struct ti_syscon_gate_clk_priv {
15 struct clk_hw hw;
16 struct regmap *regmap;
17 u32 reg;
18 u32 idx;
19 };
20
21 struct ti_syscon_gate_clk_data {
22 char *name;
23 u32 offset;
24 u32 bit_idx;
25 };
26
27 static struct
to_ti_syscon_gate_clk_priv(struct clk_hw * hw)28 ti_syscon_gate_clk_priv *to_ti_syscon_gate_clk_priv(struct clk_hw *hw)
29 {
30 return container_of(hw, struct ti_syscon_gate_clk_priv, hw);
31 }
32
ti_syscon_gate_clk_enable(struct clk_hw * hw)33 static int ti_syscon_gate_clk_enable(struct clk_hw *hw)
34 {
35 struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw);
36
37 return regmap_write_bits(priv->regmap, priv->reg, priv->idx,
38 priv->idx);
39 }
40
ti_syscon_gate_clk_disable(struct clk_hw * hw)41 static void ti_syscon_gate_clk_disable(struct clk_hw *hw)
42 {
43 struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw);
44
45 regmap_write_bits(priv->regmap, priv->reg, priv->idx, 0);
46 }
47
ti_syscon_gate_clk_is_enabled(struct clk_hw * hw)48 static int ti_syscon_gate_clk_is_enabled(struct clk_hw *hw)
49 {
50 unsigned int val;
51 struct ti_syscon_gate_clk_priv *priv = to_ti_syscon_gate_clk_priv(hw);
52
53 regmap_read(priv->regmap, priv->reg, &val);
54
55 return !!(val & priv->idx);
56 }
57
58 static const struct clk_ops ti_syscon_gate_clk_ops = {
59 .enable = ti_syscon_gate_clk_enable,
60 .disable = ti_syscon_gate_clk_disable,
61 .is_enabled = ti_syscon_gate_clk_is_enabled,
62 };
63
64 static struct clk_hw
ti_syscon_gate_clk_register(struct device * dev,struct regmap * regmap,const char * parent_name,const struct ti_syscon_gate_clk_data * data)65 *ti_syscon_gate_clk_register(struct device *dev, struct regmap *regmap,
66 const char *parent_name,
67 const struct ti_syscon_gate_clk_data *data)
68 {
69 struct ti_syscon_gate_clk_priv *priv;
70 struct clk_init_data init;
71 char *name = NULL;
72 int ret;
73
74 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
75 if (!priv)
76 return ERR_PTR(-ENOMEM);
77
78 init.ops = &ti_syscon_gate_clk_ops;
79 if (parent_name) {
80 name = kasprintf(GFP_KERNEL, "%s:%s", data->name, parent_name);
81 init.name = name;
82 init.parent_names = &parent_name;
83 init.num_parents = 1;
84 init.flags = CLK_SET_RATE_PARENT;
85 } else {
86 init.name = data->name;
87 init.parent_names = NULL;
88 init.num_parents = 0;
89 init.flags = 0;
90 }
91
92 priv->regmap = regmap;
93 priv->reg = data->offset;
94 priv->idx = BIT(data->bit_idx);
95 priv->hw.init = &init;
96
97 ret = devm_clk_hw_register(dev, &priv->hw);
98
99 if (name)
100 kfree(init.name);
101
102 if (ret)
103 return ERR_PTR(ret);
104
105 return &priv->hw;
106 }
107
108 static const struct regmap_config ti_syscon_regmap_cfg = {
109 .reg_bits = 32,
110 .val_bits = 32,
111 .reg_stride = 4,
112 };
113
ti_syscon_gate_clk_probe(struct platform_device * pdev)114 static int ti_syscon_gate_clk_probe(struct platform_device *pdev)
115 {
116 const struct ti_syscon_gate_clk_data *data, *p;
117 struct clk_hw_onecell_data *hw_data;
118 struct device *dev = &pdev->dev;
119 int num_clks, num_parents, i;
120 const char *parent_name;
121 struct regmap *regmap;
122 void __iomem *base;
123
124 data = device_get_match_data(dev);
125 if (!data)
126 return -EINVAL;
127
128 base = devm_platform_ioremap_resource(pdev, 0);
129 if (IS_ERR(base))
130 return PTR_ERR(base);
131
132 regmap = regmap_init_mmio(dev, base, &ti_syscon_regmap_cfg);
133 if (IS_ERR(regmap))
134 return dev_err_probe(dev, PTR_ERR(regmap),
135 "failed to get regmap\n");
136
137 num_clks = 0;
138 for (p = data; p->name; p++)
139 num_clks++;
140
141 num_parents = of_clk_get_parent_count(dev->of_node);
142 if (of_device_is_compatible(dev->of_node, "ti,am62-audio-refclk") &&
143 num_parents == 0) {
144 return dev_err_probe(dev, -EINVAL,
145 "must specify a parent clock\n");
146 }
147
148 hw_data = devm_kzalloc(dev, struct_size(hw_data, hws, num_clks),
149 GFP_KERNEL);
150 if (!hw_data)
151 return -ENOMEM;
152
153 hw_data->num = num_clks;
154
155 parent_name = of_clk_get_parent_name(dev->of_node, 0);
156 for (i = 0; i < num_clks; i++) {
157 hw_data->hws[i] = ti_syscon_gate_clk_register(dev, regmap,
158 parent_name,
159 &data[i]);
160 if (IS_ERR(hw_data->hws[i]))
161 dev_warn(dev, "failed to register %s\n",
162 data[i].name);
163 }
164
165 if (num_clks == 1)
166 return devm_of_clk_add_hw_provider(dev, of_clk_hw_simple_get,
167 hw_data->hws[0]);
168 return devm_of_clk_add_hw_provider(dev, of_clk_hw_onecell_get, hw_data);
169 }
170
171 #define TI_SYSCON_CLK_GATE(_name, _offset, _bit_idx) \
172 { \
173 .name = _name, \
174 .offset = (_offset), \
175 .bit_idx = (_bit_idx), \
176 }
177
178 static const struct ti_syscon_gate_clk_data am654_clk_data[] = {
179 TI_SYSCON_CLK_GATE("ehrpwm_tbclk0", 0x0, 0),
180 TI_SYSCON_CLK_GATE("ehrpwm_tbclk1", 0x4, 0),
181 TI_SYSCON_CLK_GATE("ehrpwm_tbclk2", 0x8, 0),
182 TI_SYSCON_CLK_GATE("ehrpwm_tbclk3", 0xc, 0),
183 TI_SYSCON_CLK_GATE("ehrpwm_tbclk4", 0x10, 0),
184 TI_SYSCON_CLK_GATE("ehrpwm_tbclk5", 0x14, 0),
185 { /* Sentinel */ },
186 };
187
188 static const struct ti_syscon_gate_clk_data am64_clk_data[] = {
189 TI_SYSCON_CLK_GATE("epwm_tbclk0", 0x0, 0),
190 TI_SYSCON_CLK_GATE("epwm_tbclk1", 0x0, 1),
191 TI_SYSCON_CLK_GATE("epwm_tbclk2", 0x0, 2),
192 TI_SYSCON_CLK_GATE("epwm_tbclk3", 0x0, 3),
193 TI_SYSCON_CLK_GATE("epwm_tbclk4", 0x0, 4),
194 TI_SYSCON_CLK_GATE("epwm_tbclk5", 0x0, 5),
195 TI_SYSCON_CLK_GATE("epwm_tbclk6", 0x0, 6),
196 TI_SYSCON_CLK_GATE("epwm_tbclk7", 0x0, 7),
197 TI_SYSCON_CLK_GATE("epwm_tbclk8", 0x0, 8),
198 { /* Sentinel */ },
199 };
200
201 static const struct ti_syscon_gate_clk_data am62_clk_data[] = {
202 TI_SYSCON_CLK_GATE("epwm_tbclk0", 0x0, 0),
203 TI_SYSCON_CLK_GATE("epwm_tbclk1", 0x0, 1),
204 TI_SYSCON_CLK_GATE("epwm_tbclk2", 0x0, 2),
205 { /* Sentinel */ },
206 };
207
208 static const struct ti_syscon_gate_clk_data am62_audio_clk_data[] = {
209 TI_SYSCON_CLK_GATE("audio_refclk", 0x0, 15),
210 { /* Sentinel */ },
211 };
212
213 static const struct of_device_id ti_syscon_gate_clk_ids[] = {
214 {
215 .compatible = "ti,am654-ehrpwm-tbclk",
216 .data = &am654_clk_data,
217 },
218 {
219 .compatible = "ti,am64-epwm-tbclk",
220 .data = &am64_clk_data,
221 },
222 {
223 .compatible = "ti,am62-epwm-tbclk",
224 .data = &am62_clk_data,
225 },
226 {
227 .compatible = "ti,am62-audio-refclk",
228 .data = &am62_audio_clk_data,
229 },
230 { }
231 };
232 MODULE_DEVICE_TABLE(of, ti_syscon_gate_clk_ids);
233
234 static struct platform_driver ti_syscon_gate_clk_driver = {
235 .probe = ti_syscon_gate_clk_probe,
236 .driver = {
237 .name = "ti-syscon-gate-clk",
238 .of_match_table = ti_syscon_gate_clk_ids,
239 },
240 };
241 module_platform_driver(ti_syscon_gate_clk_driver);
242
243 MODULE_AUTHOR("Vignesh Raghavendra <vigneshr@ti.com>");
244 MODULE_DESCRIPTION("Syscon backed gate-clock driver");
245 MODULE_LICENSE("GPL");
246