1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Paravirtualization interfaces
3 Copyright (C) 2006 Rusty Russell IBM Corporation
4
5
6 2007 - x86_64 support added by Glauber de Oliveira Costa, Red Hat Inc
7 */
8
9 #include <linux/errno.h>
10 #include <linux/init.h>
11 #include <linux/export.h>
12 #include <linux/efi.h>
13 #include <linux/bcd.h>
14 #include <linux/highmem.h>
15 #include <linux/kprobes.h>
16 #include <linux/pgtable.h>
17 #include <linux/static_call.h>
18
19 #include <asm/bug.h>
20 #include <asm/paravirt.h>
21 #include <asm/debugreg.h>
22 #include <asm/desc.h>
23 #include <asm/setup.h>
24 #include <asm/time.h>
25 #include <asm/pgalloc.h>
26 #include <asm/irq.h>
27 #include <asm/delay.h>
28 #include <asm/fixmap.h>
29 #include <asm/apic.h>
30 #include <asm/tlbflush.h>
31 #include <asm/timer.h>
32 #include <asm/special_insns.h>
33 #include <asm/tlb.h>
34 #include <asm/io_bitmap.h>
35 #include <asm/gsseg.h>
36
37 /* stub always returning 0. */
38 DEFINE_ASM_FUNC(paravirt_ret0, "xor %eax,%eax", .entry.text);
39
default_banner(void)40 void __init default_banner(void)
41 {
42 printk(KERN_INFO "Booting paravirtualized kernel on %s\n",
43 pv_info.name);
44 }
45
46 #ifdef CONFIG_PARAVIRT_XXL
47 DEFINE_ASM_FUNC(_paravirt_ident_64, "mov %rdi, %rax", .text);
48 DEFINE_ASM_FUNC(pv_native_save_fl, "pushf; pop %rax", .noinstr.text);
49 DEFINE_ASM_FUNC(pv_native_irq_disable, "cli", .noinstr.text);
50 DEFINE_ASM_FUNC(pv_native_irq_enable, "sti", .noinstr.text);
51 DEFINE_ASM_FUNC(pv_native_read_cr2, "mov %cr2, %rax", .noinstr.text);
52 #endif
53
54 DEFINE_STATIC_KEY_FALSE(virt_spin_lock_key);
55
native_pv_lock_init(void)56 void __init native_pv_lock_init(void)
57 {
58 if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
59 static_branch_enable(&virt_spin_lock_key);
60 }
61
62 struct static_key paravirt_steal_enabled;
63 struct static_key paravirt_steal_rq_enabled;
64
native_steal_clock(int cpu)65 static u64 native_steal_clock(int cpu)
66 {
67 return 0;
68 }
69
70 DEFINE_STATIC_CALL(pv_steal_clock, native_steal_clock);
71 DEFINE_STATIC_CALL(pv_sched_clock, native_sched_clock);
72
paravirt_set_sched_clock(u64 (* func)(void))73 void paravirt_set_sched_clock(u64 (*func)(void))
74 {
75 static_call_update(pv_sched_clock, func);
76 }
77
pv_native_safe_halt(void)78 static noinstr void pv_native_safe_halt(void)
79 {
80 native_safe_halt();
81 }
82
83 #ifdef CONFIG_PARAVIRT_XXL
pv_native_write_cr2(unsigned long val)84 static noinstr void pv_native_write_cr2(unsigned long val)
85 {
86 native_write_cr2(val);
87 }
88
pv_native_read_cr3(void)89 static noinstr unsigned long pv_native_read_cr3(void)
90 {
91 return __native_read_cr3();
92 }
93
pv_native_write_cr3(unsigned long cr3)94 static noinstr void pv_native_write_cr3(unsigned long cr3)
95 {
96 native_write_cr3(cr3);
97 }
98
pv_native_get_debugreg(int regno)99 static noinstr unsigned long pv_native_get_debugreg(int regno)
100 {
101 return native_get_debugreg(regno);
102 }
103
pv_native_set_debugreg(int regno,unsigned long val)104 static noinstr void pv_native_set_debugreg(int regno, unsigned long val)
105 {
106 native_set_debugreg(regno, val);
107 }
108 #endif
109
110 struct pv_info pv_info = {
111 .name = "bare hardware",
112 #ifdef CONFIG_PARAVIRT_XXL
113 .extra_user_64bit_cs = __USER_CS,
114 #endif
115 };
116
117 /* 64-bit pagetable entries */
118 #define PTE_IDENT __PV_IS_CALLEE_SAVE(_paravirt_ident_64)
119
120 struct paravirt_patch_template pv_ops = {
121 /* Cpu ops. */
122 .cpu.io_delay = native_io_delay,
123
124 #ifdef CONFIG_PARAVIRT_XXL
125 .cpu.cpuid = native_cpuid,
126 .cpu.get_debugreg = pv_native_get_debugreg,
127 .cpu.set_debugreg = pv_native_set_debugreg,
128 .cpu.read_cr0 = native_read_cr0,
129 .cpu.write_cr0 = native_write_cr0,
130 .cpu.write_cr4 = native_write_cr4,
131 .cpu.read_msr = native_read_msr,
132 .cpu.write_msr = native_write_msr,
133 .cpu.read_msr_safe = native_read_msr_safe,
134 .cpu.write_msr_safe = native_write_msr_safe,
135 .cpu.read_pmc = native_read_pmc,
136 .cpu.load_tr_desc = native_load_tr_desc,
137 .cpu.set_ldt = native_set_ldt,
138 .cpu.load_gdt = native_load_gdt,
139 .cpu.load_idt = native_load_idt,
140 .cpu.store_tr = native_store_tr,
141 .cpu.load_tls = native_load_tls,
142 .cpu.load_gs_index = native_load_gs_index,
143 .cpu.write_ldt_entry = native_write_ldt_entry,
144 .cpu.write_gdt_entry = native_write_gdt_entry,
145 .cpu.write_idt_entry = native_write_idt_entry,
146
147 .cpu.alloc_ldt = paravirt_nop,
148 .cpu.free_ldt = paravirt_nop,
149
150 .cpu.load_sp0 = native_load_sp0,
151
152 #ifdef CONFIG_X86_IOPL_IOPERM
153 .cpu.invalidate_io_bitmap = native_tss_invalidate_io_bitmap,
154 .cpu.update_io_bitmap = native_tss_update_io_bitmap,
155 #endif
156
157 .cpu.start_context_switch = paravirt_nop,
158 .cpu.end_context_switch = paravirt_nop,
159
160 /* Irq ops. */
161 .irq.save_fl = __PV_IS_CALLEE_SAVE(pv_native_save_fl),
162 .irq.irq_disable = __PV_IS_CALLEE_SAVE(pv_native_irq_disable),
163 .irq.irq_enable = __PV_IS_CALLEE_SAVE(pv_native_irq_enable),
164 #endif /* CONFIG_PARAVIRT_XXL */
165
166 /* Irq HLT ops. */
167 .irq.safe_halt = pv_native_safe_halt,
168 .irq.halt = native_halt,
169
170 /* Mmu ops. */
171 .mmu.flush_tlb_user = native_flush_tlb_local,
172 .mmu.flush_tlb_kernel = native_flush_tlb_global,
173 .mmu.flush_tlb_one_user = native_flush_tlb_one_user,
174 .mmu.flush_tlb_multi = native_flush_tlb_multi,
175
176 .mmu.exit_mmap = paravirt_nop,
177 .mmu.notify_page_enc_status_changed = paravirt_nop,
178
179 #ifdef CONFIG_PARAVIRT_XXL
180 .mmu.read_cr2 = __PV_IS_CALLEE_SAVE(pv_native_read_cr2),
181 .mmu.write_cr2 = pv_native_write_cr2,
182 .mmu.read_cr3 = pv_native_read_cr3,
183 .mmu.write_cr3 = pv_native_write_cr3,
184
185 .mmu.pgd_alloc = __paravirt_pgd_alloc,
186 .mmu.pgd_free = paravirt_nop,
187
188 .mmu.alloc_pte = paravirt_nop,
189 .mmu.alloc_pmd = paravirt_nop,
190 .mmu.alloc_pud = paravirt_nop,
191 .mmu.alloc_p4d = paravirt_nop,
192 .mmu.release_pte = paravirt_nop,
193 .mmu.release_pmd = paravirt_nop,
194 .mmu.release_pud = paravirt_nop,
195 .mmu.release_p4d = paravirt_nop,
196
197 .mmu.set_pte = native_set_pte,
198 .mmu.set_pmd = native_set_pmd,
199
200 .mmu.ptep_modify_prot_start = __ptep_modify_prot_start,
201 .mmu.ptep_modify_prot_commit = __ptep_modify_prot_commit,
202
203 .mmu.set_pud = native_set_pud,
204
205 .mmu.pmd_val = PTE_IDENT,
206 .mmu.make_pmd = PTE_IDENT,
207
208 .mmu.pud_val = PTE_IDENT,
209 .mmu.make_pud = PTE_IDENT,
210
211 .mmu.set_p4d = native_set_p4d,
212
213 #if CONFIG_PGTABLE_LEVELS >= 5
214 .mmu.p4d_val = PTE_IDENT,
215 .mmu.make_p4d = PTE_IDENT,
216
217 .mmu.set_pgd = native_set_pgd,
218 #endif /* CONFIG_PGTABLE_LEVELS >= 5 */
219
220 .mmu.pte_val = PTE_IDENT,
221 .mmu.pgd_val = PTE_IDENT,
222
223 .mmu.make_pte = PTE_IDENT,
224 .mmu.make_pgd = PTE_IDENT,
225
226 .mmu.enter_mmap = paravirt_nop,
227
228 .mmu.lazy_mode = {
229 .enter = paravirt_nop,
230 .leave = paravirt_nop,
231 .flush = paravirt_nop,
232 },
233
234 .mmu.set_fixmap = native_set_fixmap,
235 #endif /* CONFIG_PARAVIRT_XXL */
236
237 #if defined(CONFIG_PARAVIRT_SPINLOCKS)
238 /* Lock ops. */
239 #ifdef CONFIG_SMP
240 .lock.queued_spin_lock_slowpath = native_queued_spin_lock_slowpath,
241 .lock.queued_spin_unlock =
242 PV_CALLEE_SAVE(__native_queued_spin_unlock),
243 .lock.wait = paravirt_nop,
244 .lock.kick = paravirt_nop,
245 .lock.vcpu_is_preempted =
246 PV_CALLEE_SAVE(__native_vcpu_is_preempted),
247 #endif /* SMP */
248 #endif
249 };
250
251 #ifdef CONFIG_PARAVIRT_XXL
252 NOKPROBE_SYMBOL(native_load_idt);
253 #endif
254
255 EXPORT_SYMBOL(pv_ops);
256 EXPORT_SYMBOL_GPL(pv_info);
257