1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*
3 * S390 version
4 *
5 * Derived from "include/asm-i386/mmu_context.h"
6 */
7
8 #ifndef __S390_MMU_CONTEXT_H
9 #define __S390_MMU_CONTEXT_H
10
11 #include <asm/pgalloc.h>
12 #include <linux/uaccess.h>
13 #include <linux/mm_types.h>
14 #include <asm/tlbflush.h>
15 #include <asm/ctlreg.h>
16 #include <asm-generic/mm_hooks.h>
17
18 #define init_new_context init_new_context
init_new_context(struct task_struct * tsk,struct mm_struct * mm)19 static inline int init_new_context(struct task_struct *tsk,
20 struct mm_struct *mm)
21 {
22 unsigned long asce_type, init_entry;
23
24 spin_lock_init(&mm->context.lock);
25 INIT_LIST_HEAD(&mm->context.gmap_list);
26 cpumask_clear(&mm->context.cpu_attach_mask);
27 atomic_set(&mm->context.flush_count, 0);
28 atomic_set(&mm->context.protected_count, 0);
29 mm->context.gmap_asce = 0;
30 mm->context.flush_mm = 0;
31 #ifdef CONFIG_PGSTE
32 mm->context.has_pgste = 0;
33 mm->context.uses_skeys = 0;
34 mm->context.uses_cmm = 0;
35 mm->context.allow_cow_sharing = 1;
36 mm->context.allow_gmap_hpage_1m = 0;
37 #endif
38 switch (mm->context.asce_limit) {
39 default:
40 /*
41 * context created by exec, the value of asce_limit can
42 * only be zero in this case
43 */
44 VM_BUG_ON(mm->context.asce_limit);
45 /* continue as 3-level task */
46 mm->context.asce_limit = _REGION2_SIZE;
47 fallthrough;
48 case _REGION2_SIZE:
49 /* forked 3-level task */
50 init_entry = _REGION3_ENTRY_EMPTY;
51 asce_type = _ASCE_TYPE_REGION3;
52 break;
53 case TASK_SIZE_MAX:
54 /* forked 5-level task */
55 init_entry = _REGION1_ENTRY_EMPTY;
56 asce_type = _ASCE_TYPE_REGION1;
57 break;
58 case _REGION1_SIZE:
59 /* forked 4-level task */
60 init_entry = _REGION2_ENTRY_EMPTY;
61 asce_type = _ASCE_TYPE_REGION2;
62 break;
63 }
64 mm->context.asce = __pa(mm->pgd) | _ASCE_TABLE_LENGTH |
65 _ASCE_USER_BITS | asce_type;
66 crst_table_init((unsigned long *) mm->pgd, init_entry);
67 return 0;
68 }
69
switch_mm_irqs_off(struct mm_struct * prev,struct mm_struct * next,struct task_struct * tsk)70 static inline void switch_mm_irqs_off(struct mm_struct *prev, struct mm_struct *next,
71 struct task_struct *tsk)
72 {
73 int cpu = smp_processor_id();
74
75 if (next == &init_mm)
76 get_lowcore()->user_asce = s390_invalid_asce;
77 else
78 get_lowcore()->user_asce.val = next->context.asce;
79 cpumask_set_cpu(cpu, &next->context.cpu_attach_mask);
80 /* Clear previous user-ASCE from CR7 */
81 local_ctl_load(7, &s390_invalid_asce);
82 if (prev != next)
83 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
84 }
85 #define switch_mm_irqs_off switch_mm_irqs_off
86
switch_mm(struct mm_struct * prev,struct mm_struct * next,struct task_struct * tsk)87 static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
88 struct task_struct *tsk)
89 {
90 unsigned long flags;
91
92 local_irq_save(flags);
93 switch_mm_irqs_off(prev, next, tsk);
94 local_irq_restore(flags);
95 }
96
97 #define finish_arch_post_lock_switch finish_arch_post_lock_switch
finish_arch_post_lock_switch(void)98 static inline void finish_arch_post_lock_switch(void)
99 {
100 struct task_struct *tsk = current;
101 struct mm_struct *mm = tsk->mm;
102
103 if (mm) {
104 preempt_disable();
105 while (atomic_read(&mm->context.flush_count))
106 cpu_relax();
107 cpumask_set_cpu(smp_processor_id(), mm_cpumask(mm));
108 __tlb_flush_mm_lazy(mm);
109 preempt_enable();
110 }
111 local_ctl_load(7, &get_lowcore()->user_asce);
112 }
113
114 #define activate_mm activate_mm
activate_mm(struct mm_struct * prev,struct mm_struct * next)115 static inline void activate_mm(struct mm_struct *prev,
116 struct mm_struct *next)
117 {
118 switch_mm(prev, next, current);
119 cpumask_set_cpu(smp_processor_id(), mm_cpumask(next));
120 local_ctl_load(7, &get_lowcore()->user_asce);
121 }
122
123 #include <asm-generic/mmu_context.h>
124
125 #endif /* __S390_MMU_CONTEXT_H */
126