1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 #ifndef _POWERPC_PROM_H
3 #define _POWERPC_PROM_H
4 #ifdef __KERNEL__
5 
6 /*
7  * Definitions for talking to the Open Firmware PROM on
8  * Power Macintosh computers.
9  *
10  * Copyright (C) 1996-2005 Paul Mackerras.
11  *
12  * Updates for PPC64 by Peter Bergner & David Engebretsen, IBM Corp.
13  */
14 #include <linux/types.h>
15 #include <asm/firmware.h>
16 
17 struct device_node;
18 struct property;
19 
20 #define MIN_RMA			768		/* Minimum RMA (in MB) for CAS negotiation */
21 
22 #define OF_DT_BEGIN_NODE	0x1		/* Start of node, full name */
23 #define OF_DT_END_NODE		0x2		/* End node */
24 #define OF_DT_PROP		0x3		/* Property: name off, size,
25 						 * content */
26 #define OF_DT_NOP		0x4		/* nop */
27 #define OF_DT_END		0x9
28 
29 #define OF_DT_VERSION		0x10
30 
31 /*
32  * This is what gets passed to the kernel by prom_init or kexec
33  *
34  * The dt struct contains the device tree structure, full pathes and
35  * property contents. The dt strings contain a separate block with just
36  * the strings for the property names, and is fully page aligned and
37  * self contained in a page, so that it can be kept around by the kernel,
38  * each property name appears only once in this page (cheap compression)
39  *
40  * the mem_rsvmap contains a map of reserved ranges of physical memory,
41  * passing it here instead of in the device-tree itself greatly simplifies
42  * the job of everybody. It's just a list of u64 pairs (base/size) that
43  * ends when size is 0
44  */
45 struct boot_param_header {
46 	__be32	magic;			/* magic word OF_DT_HEADER */
47 	__be32	totalsize;		/* total size of DT block */
48 	__be32	off_dt_struct;		/* offset to structure */
49 	__be32	off_dt_strings;		/* offset to strings */
50 	__be32	off_mem_rsvmap;		/* offset to memory reserve map */
51 	__be32	version;		/* format version */
52 	__be32	last_comp_version;	/* last compatible version */
53 	/* version 2 fields below */
54 	__be32	boot_cpuid_phys;	/* Physical CPU id we're booting on */
55 	/* version 3 fields below */
56 	__be32	dt_strings_size;	/* size of the DT strings block */
57 	/* version 17 fields below */
58 	__be32	dt_struct_size;		/* size of the DT structure block */
59 };
60 
61 /*
62  * OF address retreival & translation
63  */
64 
65 /* Parse the ibm,dma-window property of an OF node into the busno, phys and
66  * size parameters.
67  */
68 void of_parse_dma_window(struct device_node *dn, const __be32 *dma_window,
69 			 unsigned long *busno, unsigned long *phys,
70 			 unsigned long *size);
71 
72 extern void of_instantiate_rtc(void);
73 
74 extern int of_get_ibm_chip_id(struct device_node *np);
75 
76 struct of_drc_info {
77 	char *drc_type;
78 	char *drc_name_prefix;
79 	u32 drc_index_start;
80 	u32 drc_name_suffix_start;
81 	u32 num_sequential_elems;
82 	u32 sequential_inc;
83 	u32 drc_power_domain;
84 	u32 last_drc_index;
85 };
86 
87 extern int of_read_drc_info_cell(struct property **prop,
88 			const __be32 **curval, struct of_drc_info *data);
89 
90 extern unsigned int boot_cpu_node_count;
91 
92 /*
93  * There are two methods for telling firmware what our capabilities are.
94  * Newer machines have an "ibm,client-architecture-support" method on the
95  * root node.  For older machines, we have to call the "process-elf-header"
96  * method in the /packages/elf-loader node, passing it a fake 32-bit
97  * ELF header containing a couple of PT_NOTE sections that contain
98  * structures that contain various information.
99  */
100 
101 /* New method - extensible architecture description vector. */
102 
103 /* Option vector bits - generic bits in byte 1 */
104 #define OV_IGNORE		0x80	/* ignore this vector */
105 #define OV_CESSATION_POLICY	0x40	/* halt if unsupported option present*/
106 
107 /* Option vector 1: processor architectures supported */
108 #define OV1_PPC_2_00		0x80	/* set if we support PowerPC 2.00 */
109 #define OV1_PPC_2_01		0x40	/* set if we support PowerPC 2.01 */
110 #define OV1_PPC_2_02		0x20	/* set if we support PowerPC 2.02 */
111 #define OV1_PPC_2_03		0x10	/* set if we support PowerPC 2.03 */
112 #define OV1_PPC_2_04		0x08	/* set if we support PowerPC 2.04 */
113 #define OV1_PPC_2_05		0x04	/* set if we support PowerPC 2.05 */
114 #define OV1_PPC_2_06		0x02	/* set if we support PowerPC 2.06 */
115 #define OV1_PPC_2_07		0x01	/* set if we support PowerPC 2.07 */
116 
117 #define OV1_PPC_3_00		0x80	/* set if we support PowerPC 3.00 */
118 #define OV1_PPC_3_1			0x40	/* set if we support PowerPC 3.1 */
119 
120 /* Option vector 2: Open Firmware options supported */
121 #define OV2_REAL_MODE		0x20	/* set if we want OF in real mode */
122 
123 /* Option vector 3: processor options supported */
124 #define OV3_FP			0x80	/* floating point */
125 #define OV3_VMX			0x40	/* VMX/Altivec */
126 #define OV3_DFP			0x20	/* decimal FP */
127 
128 /* Option vector 4: IBM PAPR implementation */
129 #define OV4_MIN_ENT_CAP		0x01	/* minimum VP entitled capacity */
130 
131 /* Option vector 5: PAPR/OF options supported
132  * These bits are also used in firmware_has_feature() to validate
133  * the capabilities reported for vector 5 in the device tree so we
134  * encode the vector index in the define and use the OV5_FEAT()
135  * and OV5_INDX() macros to extract the desired information.
136  */
137 #define OV5_FEAT(x)	((x) & 0xff)
138 #define OV5_INDX(x)	((x) >> 8)
139 #define OV5_LPAR		0x0280	/* logical partitioning supported */
140 #define OV5_SPLPAR		0x0240	/* shared-processor LPAR supported */
141 /* ibm,dynamic-reconfiguration-memory property supported */
142 #define OV5_DRCONF_MEMORY	0x0220
143 #define OV5_LARGE_PAGES		0x0210	/* large pages supported */
144 #define OV5_DONATE_DEDICATE_CPU	0x0202	/* donate dedicated CPU support */
145 #define OV5_MSI			0x0201	/* PCIe/MSI support */
146 #define OV5_CMO			0x0480	/* Cooperative Memory Overcommitment */
147 #define OV5_XCMO		0x0440	/* Page Coalescing */
148 #define OV5_FORM1_AFFINITY	0x0580	/* FORM1 NUMA affinity */
149 #define OV5_PRRN		0x0540	/* Platform Resource Reassignment */
150 #define OV5_FORM2_AFFINITY	0x0520	/* Form2 NUMA affinity */
151 #define OV5_HP_EVT		0x0604	/* Hot Plug Event support */
152 #define OV5_RESIZE_HPT		0x0601	/* Hash Page Table resizing */
153 #define OV5_PFO_HW_RNG		0x1180	/* PFO Random Number Generator */
154 #define OV5_PFO_HW_842		0x1140	/* PFO Compression Accelerator */
155 #define OV5_PFO_HW_ENCR		0x1120	/* PFO Encryption Accelerator */
156 #define OV5_SUB_PROCESSORS	0x1501	/* 1,2,or 4 Sub-Processors supported */
157 #define OV5_DRMEM_V2		0x1680	/* ibm,dynamic-reconfiguration-v2 */
158 #define OV5_XIVE_SUPPORT	0x17C0	/* XIVE Exploitation Support Mask */
159 #define OV5_XIVE_LEGACY		0x1700	/* XIVE legacy mode Only */
160 #define OV5_XIVE_EXPLOIT	0x1740	/* XIVE exploitation mode Only */
161 #define OV5_XIVE_EITHER		0x1780	/* XIVE legacy or exploitation mode */
162 /* MMU Base Architecture */
163 #define OV5_MMU_SUPPORT		0x18C0	/* MMU Mode Support Mask */
164 #define OV5_MMU_HASH		0x1800	/* Hash MMU Only */
165 #define OV5_MMU_RADIX		0x1840	/* Radix MMU Only */
166 #define OV5_MMU_EITHER		0x1880	/* Hash or Radix Supported */
167 #define OV5_MMU_DYNAMIC		0x18C0	/* Hash or Radix Can Switch Later */
168 #define OV5_NMMU		0x1820	/* Nest MMU Available */
169 /* Hash Table Extensions */
170 #define OV5_HASH_SEG_TBL	0x1980	/* In Memory Segment Tables Available */
171 #define OV5_HASH_GTSE		0x1940	/* Guest Translation Shoot Down Avail */
172 /* Radix Table Extensions */
173 #define OV5_RADIX_GTSE		0x1A40	/* Guest Translation Shoot Down Avail */
174 #define OV5_DRC_INFO		0x1640	/* Redef Prop Structures: drc-info   */
175 
176 /* Option Vector 6: IBM PAPR hints */
177 #define OV6_LINUX		0x02	/* Linux is our OS */
178 
179 #endif /* __KERNEL__ */
180 #endif /* _POWERPC_PROM_H */
181