1// SPDX-License-Identifier: GPL-2.0
2#include <dt-bindings/clock/mediatek,mtmips-sysc.h>
3
4/ {
5	#address-cells = <1>;
6	#size-cells = <1>;
7	compatible = "ralink,mt7628a-soc";
8
9	cpus {
10		#address-cells = <1>;
11		#size-cells = <0>;
12
13		cpu@0 {
14			compatible = "mti,mips24KEc";
15			device_type = "cpu";
16			reg = <0>;
17		};
18	};
19
20	cpuintc: interrupt-controller {
21		#address-cells = <0>;
22		#interrupt-cells = <1>;
23		interrupt-controller;
24		compatible = "mti,cpu-interrupt-controller";
25	};
26
27	palmbus@10000000 {
28		compatible = "palmbus";
29		reg = <0x10000000 0x200000>;
30		ranges = <0x0 0x10000000 0x1FFFFF>;
31
32		#address-cells = <1>;
33		#size-cells = <1>;
34
35		sysc: syscon@0 {
36			compatible = "ralink,mt7628-sysc", "syscon";
37			reg = <0x0 0x60>;
38			#clock-cells = <1>;
39			#reset-cells = <1>;
40		};
41
42		pinmux: pinmux@60 {
43			compatible = "pinctrl-single";
44			reg = <0x60 0x8>;
45			#address-cells = <1>;
46			#size-cells = <0>;
47			#pinctrl-cells = <2>;
48			pinctrl-single,bit-per-mux;
49			pinctrl-single,register-width = <32>;
50			pinctrl-single,function-mask = <0x1>;
51
52			pinmux_gpio_gpio: gpio-gpio-pins {
53				pinctrl-single,bits = <0x0 0x0 0x3>;
54			};
55
56			pinmux_spi_cs1_cs: spi-cs1-cs-pins {
57				pinctrl-single,bits = <0x0 0x0 0x30>;
58			};
59
60			pinmux_i2s_gpio: i2s-gpio-pins {
61				pinctrl-single,bits = <0x0 0x40 0xc0>;
62			};
63
64			pinmux_uart0_uart: uart0-uart0-pins {
65				pinctrl-single,bits = <0x0 0x0 0x300>;
66			};
67
68			pinmux_sdmode_sdxc: sdmode-sdxc-pins {
69				pinctrl-single,bits = <0x0 0x0 0xc00>;
70			};
71
72			pinmux_sdmode_gpio: sdmode-gpio-pins {
73				pinctrl-single,bits = <0x0 0x400 0xc00>;
74			};
75
76			pinmux_spi_spi: spi-spi-pins {
77				pinctrl-single,bits = <0x0 0x0 0x1000>;
78			};
79
80			pinmux_refclk_gpio: refclk-gpio-pins {
81				pinctrl-single,bits = <0x0 0x40000 0x40000>;
82			};
83
84			pinmux_i2c_i2c: i2c-i2c-pins {
85				pinctrl-single,bits = <0x0 0x0 0x300000>;
86			};
87
88			pinmux_uart1_uart: uart1-uart1-pins {
89				pinctrl-single,bits = <0x0 0x0 0x3000000>;
90			};
91
92			pinmux_uart2_uart: uart2-uart-pins {
93				pinctrl-single,bits = <0x0 0x0 0xc000000>;
94			};
95
96			pinmux_pwm0_pwm: pwm0-pwm-pins {
97				pinctrl-single,bits = <0x0 0x0 0x30000000>;
98			};
99
100			pinmux_pwm0_gpio: pwm0-gpio-pins {
101				pinctrl-single,bits = <0x0 0x10000000
102						       0x30000000>;
103			};
104
105			pinmux_pwm1_pwm: pwm1-pwm-pins {
106				pinctrl-single,bits = <0x0 0x0 0xc0000000>;
107			};
108
109			pinmux_pwm1_gpio: pwm1-gpio-pins {
110				pinctrl-single,bits = <0x0 0x40000000
111						       0xc0000000>;
112			};
113
114			pinmux_p0led_an_gpio: p0led-an-gpio-pins {
115				pinctrl-single,bits = <0x4 0x4 0xc>;
116			};
117
118			pinmux_p1led_an_gpio: p1led-an-gpio-pins {
119				pinctrl-single,bits = <0x4 0x10 0x30>;
120			};
121
122			pinmux_p2led_an_gpio: p2led-an-gpio-pins {
123				pinctrl-single,bits = <0x4 0x40 0xc0>;
124			};
125
126			pinmux_p3led_an_gpio: p3led-an-gpio-pins {
127				pinctrl-single,bits = <0x4 0x100 0x300>;
128			};
129
130			pinmux_p4led_an_gpio: p4led-an-gpio-pins {
131				pinctrl-single,bits = <0x4 0x400 0xc00>;
132			};
133		};
134
135		watchdog: watchdog@100 {
136			compatible = "mediatek,mt7621-wdt";
137			reg = <0x100 0x30>;
138
139			resets = <&sysc 8>;
140			reset-names = "wdt";
141
142			interrupt-parent = <&intc>;
143			interrupts = <24>;
144
145			status = "disabled";
146		};
147
148		intc: interrupt-controller@200 {
149			compatible = "ralink,rt2880-intc";
150			reg = <0x200 0x100>;
151
152			interrupt-controller;
153			#interrupt-cells = <1>;
154
155			resets = <&sysc 9>;
156			reset-names = "intc";
157
158			interrupt-parent = <&cpuintc>;
159			interrupts = <2>;
160
161			ralink,intc-registers = <0x9c 0xa0
162						 0x6c 0xa4
163						 0x80 0x78>;
164		};
165
166		memory-controller@300 {
167			compatible = "ralink,mt7620a-memc";
168			reg = <0x300 0x100>;
169		};
170
171		gpio: gpio@600 {
172			compatible = "mediatek,mt7621-gpio";
173			reg = <0x600 0x100>;
174
175			gpio-controller;
176			interrupt-controller;
177			#gpio-cells = <2>;
178			#interrupt-cells = <2>;
179
180			interrupt-parent = <&intc>;
181			interrupts = <6>;
182		};
183
184		spi: spi@b00 {
185			compatible = "ralink,mt7621-spi";
186			reg = <0xb00 0x100>;
187
188			pinctrl-names = "default";
189			pinctrl-0 = <&pinmux_spi_spi>;
190
191			clocks = <&sysc MT76X8_CLK_SPI1>;
192
193			resets = <&sysc 18>;
194			reset-names = "spi";
195
196			#address-cells = <1>;
197			#size-cells = <0>;
198
199			status = "disabled";
200		};
201
202		i2c: i2c@900 {
203			compatible = "mediatek,mt7621-i2c";
204			reg = <0x900 0x100>;
205
206			pinctrl-names = "default";
207			pinctrl-0 = <&pinmux_i2c_i2c>;
208
209			clocks = <&sysc MT76X8_CLK_I2C>;
210
211			resets = <&sysc 16>;
212			reset-names = "i2c";
213
214			#address-cells = <1>;
215			#size-cells = <0>;
216
217			status = "disabled";
218		};
219
220		uart0: uartlite@c00 {
221			compatible = "ns16550a";
222			reg = <0xc00 0x100>;
223
224			pinctrl-names = "default";
225			pinctrl-0 = <&pinmux_uart0_uart>;
226
227			clocks = <&sysc MT76X8_CLK_UART0>;
228
229			resets = <&sysc 12>;
230			reset-names = "uart0";
231
232			interrupt-parent = <&intc>;
233			interrupts = <20>;
234
235			reg-shift = <2>;
236		};
237
238		uart1: uart1@d00 {
239			compatible = "ns16550a";
240			reg = <0xd00 0x100>;
241
242			pinctrl-names = "default";
243			pinctrl-0 = <&pinmux_uart1_uart>;
244
245			clocks = <&sysc MT76X8_CLK_UART1>;
246
247			resets = <&sysc 19>;
248			reset-names = "uart1";
249
250			interrupt-parent = <&intc>;
251			interrupts = <21>;
252
253			reg-shift = <2>;
254		};
255
256		uart2: uart2@e00 {
257			compatible = "ns16550a";
258			reg = <0xe00 0x100>;
259
260			pinctrl-names = "default";
261			pinctrl-0 = <&pinmux_uart2_uart>;
262
263			clocks = <&sysc MT76X8_CLK_UART2>;
264
265			resets = <&sysc 20>;
266			reset-names = "uart2";
267
268			interrupt-parent = <&intc>;
269			interrupts = <22>;
270
271			reg-shift = <2>;
272		};
273	};
274
275	usb_phy: usb-phy@10120000 {
276		compatible = "mediatek,mt7628-usbphy";
277		reg = <0x10120000 0x1000>;
278
279		#phy-cells = <0>;
280
281		ralink,sysctl = <&sysc>;
282		resets = <&sysc 22 &sysc 25>;
283		reset-names = "host", "device";
284	};
285
286	usb@101c0000 {
287		compatible = "generic-ehci";
288		reg = <0x101c0000 0x1000>;
289
290		phys = <&usb_phy>;
291		phy-names = "usb";
292
293		interrupt-parent = <&intc>;
294		interrupts = <18>;
295	};
296
297	wmac: wmac@10300000 {
298		compatible = "mediatek,mt7628-wmac";
299		reg = <0x10300000 0x100000>;
300
301		clocks = <&sysc MT76X8_CLK_WMAC>;
302
303		interrupt-parent = <&cpuintc>;
304		interrupts = <6>;
305
306		status = "disabled";
307	};
308};
309