1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  *  linux/arch/m68knommu/kernel/setup.c
4  *
5  *  Copyright (C) 1999-2007  Greg Ungerer (gerg@snapgear.com)
6  *  Copyright (C) 1998,1999  D. Jeff Dionne <jeff@uClinux.org>
7  *  Copyleft  ()) 2000       James D. Schettine {james@telos-systems.com}
8  *  Copyright (C) 1998       Kenneth Albanowski <kjahds@kjahds.com>
9  *  Copyright (C) 1995       Hamish Macdonald
10  *  Copyright (C) 2000       Lineo Inc. (www.lineo.com)
11  *  Copyright (C) 2001 	     Lineo, Inc. <www.lineo.com>
12  *
13  *  68VZ328 Fixes/support    Evan Stawnyczy <e@lineo.ca>
14  */
15 
16 /*
17  * This file handles the architecture-dependent parts of system setup
18  */
19 
20 #include <linux/kernel.h>
21 #include <linux/sched.h>
22 #include <linux/delay.h>
23 #include <linux/interrupt.h>
24 #include <linux/module.h>
25 #include <linux/mm.h>
26 #include <linux/console.h>
27 #include <linux/errno.h>
28 #include <linux/string.h>
29 #include <linux/memblock.h>
30 #include <linux/seq_file.h>
31 #include <linux/init.h>
32 #include <linux/initrd.h>
33 #include <linux/root_dev.h>
34 #include <linux/rtc.h>
35 
36 #include <asm/setup.h>
37 #include <asm/bootinfo.h>
38 #include <asm/irq.h>
39 #include <asm/machdep.h>
40 #include <asm/sections.h>
41 
42 unsigned long memory_start;
43 unsigned long memory_end;
44 
45 EXPORT_SYMBOL(memory_start);
46 EXPORT_SYMBOL(memory_end);
47 
48 char __initdata command_line[COMMAND_LINE_SIZE];
49 
50 /* machine dependent timer functions */
51 void (*mach_sched_init)(void) __initdata = NULL;
52 
53 /* machine dependent reboot functions */
54 void (*mach_reset)(void);
55 void (*mach_halt)(void);
56 
57 #ifdef CONFIG_M68000
58 #if defined(CONFIG_M68328)
59 #define CPU_NAME	"MC68328"
60 #elif defined(CONFIG_M68EZ328)
61 #define CPU_NAME	"MC68EZ328"
62 #elif defined(CONFIG_M68VZ328)
63 #define CPU_NAME	"MC68VZ328"
64 #else
65 #define CPU_NAME	"MC68000"
66 #endif
67 #endif /* CONFIG_M68000 */
68 #ifndef CPU_NAME
69 #define	CPU_NAME	"UNKNOWN"
70 #endif
71 
72 /*
73  * Different cores have different instruction execution timings.
74  * The old/traditional 68000 cores are basically all the same, at 16.
75  * The ColdFire cores vary a little, their values are defined in their
76  * headers. We default to the standard 68000 value here.
77  */
78 #ifndef CPU_INSTR_PER_JIFFY
79 #define	CPU_INSTR_PER_JIFFY	16
80 #endif
81 
setup_arch(char ** cmdline_p)82 void __init setup_arch(char **cmdline_p)
83 {
84 	memory_start = PAGE_ALIGN(_ramstart);
85 	memory_end = _ramend;
86 
87 	setup_initial_init_mm(_stext, _etext, _edata, NULL);
88 
89 	config_BSP(&command_line[0], sizeof(command_line));
90 
91 #if defined(CONFIG_BOOTPARAM)
92 	strscpy(&command_line[0], CONFIG_BOOTPARAM_STRING, sizeof(command_line));
93 #endif /* CONFIG_BOOTPARAM */
94 
95 	process_uboot_commandline(&command_line[0], sizeof(command_line));
96 
97 	pr_info("uClinux with CPU " CPU_NAME "\n");
98 
99 #ifdef CONFIG_UCDIMM
100 	pr_info("uCdimm by Lineo, Inc. <www.lineo.com>\n");
101 #endif
102 #ifdef CONFIG_M68328
103 	pr_info("68328 support D. Jeff Dionne <jeff@uclinux.org>\n");
104 	pr_info("68328 support Kenneth Albanowski <kjahds@kjshds.com>\n");
105 #endif
106 #ifdef CONFIG_M68EZ328
107 	pr_info("68EZ328 DragonBallEZ support (C) 1999 Rt-Control, Inc\n");
108 #endif
109 #ifdef CONFIG_M68VZ328
110 	pr_info("M68VZ328 support by Evan Stawnyczy <e@lineo.ca>\n");
111 	pr_info("68VZ328 DragonBallVZ support (c) 2001 Lineo, Inc.\n");
112 #endif
113 #ifdef CONFIG_COLDFIRE
114 	pr_info("COLDFIRE port done by Greg Ungerer, gerg@snapgear.com\n");
115 #ifdef CONFIG_M5307
116 	pr_info("Modified for M5307 by Dave Miller, dmiller@intellistor.com\n");
117 #endif
118 #ifdef CONFIG_ELITE
119 	pr_info("Modified for M5206eLITE by Rob Scott, rscott@mtrob.fdns.net\n");
120 #endif
121 #endif
122 	pr_info("Flat model support (C) 1998,1999 Kenneth Albanowski, D. Jeff Dionne\n");
123 
124 #if defined( CONFIG_PILOT ) && defined( CONFIG_M68328 )
125 	pr_info("68328/Pilot support Bernhard Kuhn <kuhn@lpr.e-technik.tu-muenchen.de>\n");
126 	pr_info("TRG SuperPilot FLASH card support <info@trgnet.com>\n");
127 #endif
128 #if defined( CONFIG_PILOT ) && defined( CONFIG_M68EZ328 )
129 	pr_info("PalmV support by Lineo Inc. <jeff@uclinux.com>\n");
130 #endif
131 #ifdef CONFIG_DRAGEN2
132 	pr_info("DragonEngine II board support by Georges Menie\n");
133 #endif
134 #ifdef CONFIG_M5235EVB
135 	pr_info("Motorola M5235EVB support (C)2005 Syn-tech Systems, Inc. (Jate Sujjavanich)\n");
136 #endif
137 
138 	pr_debug("KERNEL -> TEXT=0x%p-0x%p DATA=0x%p-0x%p BSS=0x%p-0x%p\n",
139 		 _stext, _etext, _sdata, _edata, __bss_start, __bss_stop);
140 	pr_debug("MEMORY -> ROMFS=0x%p-0x%06lx MEM=0x%06lx-0x%06lx\n",
141 		 __bss_stop, memory_start, memory_start, memory_end);
142 
143 	memblock_add(_rambase, memory_end - _rambase);
144 	memblock_reserve(_rambase, memory_start - _rambase);
145 
146 	/* Keep a copy of command line */
147 	*cmdline_p = &command_line[0];
148 	memcpy(boot_command_line, command_line, COMMAND_LINE_SIZE);
149 	boot_command_line[COMMAND_LINE_SIZE-1] = 0;
150 
151 	/*
152 	 * Give all the memory to the bootmap allocator, tell it to put the
153 	 * boot mem_map at the start of memory.
154 	 */
155 	min_low_pfn = PFN_DOWN(memory_start);
156 	max_pfn = max_low_pfn = PFN_DOWN(memory_end);
157 
158 #if defined(CONFIG_UBOOT) && defined(CONFIG_BLK_DEV_INITRD)
159 	if ((initrd_start > 0) && (initrd_start < initrd_end) &&
160 			(initrd_end < memory_end))
161 		memblock_reserve(initrd_start, initrd_end - initrd_start);
162 #endif /* if defined(CONFIG_BLK_DEV_INITRD) */
163 
164 	/*
165 	 * Get kmalloc into gear.
166 	 */
167 	paging_init();
168 }
169 
170 /*
171  *	Get CPU information for use by the procfs.
172  */
show_cpuinfo(struct seq_file * m,void * v)173 static int show_cpuinfo(struct seq_file *m, void *v)
174 {
175 	char *cpu, *mmu, *fpu;
176 	u_long clockfreq;
177 
178 	cpu = CPU_NAME;
179 	mmu = "none";
180 	fpu = "none";
181 	clockfreq = (loops_per_jiffy * HZ) * CPU_INSTR_PER_JIFFY;
182 
183 	seq_printf(m, "CPU:\t\t%s\n"
184 		      "MMU:\t\t%s\n"
185 		      "FPU:\t\t%s\n"
186 		      "Clocking:\t%lu.%1luMHz\n"
187 		      "BogoMips:\t%lu.%02lu\n"
188 		      "Calibration:\t%lu loops\n",
189 		      cpu, mmu, fpu,
190 		      clockfreq / 1000000,
191 		      (clockfreq / 100000) % 10,
192 		      (loops_per_jiffy * HZ) / 500000,
193 		      ((loops_per_jiffy * HZ) / 5000) % 100,
194 		      (loops_per_jiffy * HZ));
195 
196 	return 0;
197 }
198 
c_start(struct seq_file * m,loff_t * pos)199 static void *c_start(struct seq_file *m, loff_t *pos)
200 {
201 	return *pos < NR_CPUS ? ((void *) 0x12345678) : NULL;
202 }
203 
c_next(struct seq_file * m,void * v,loff_t * pos)204 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
205 {
206 	++*pos;
207 	return c_start(m, pos);
208 }
209 
c_stop(struct seq_file * m,void * v)210 static void c_stop(struct seq_file *m, void *v)
211 {
212 }
213 
214 const struct seq_operations cpuinfo_op = {
215 	.start	= c_start,
216 	.next	= c_next,
217 	.stop	= c_stop,
218 	.show	= show_cpuinfo,
219 };
220 
221