1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Device Tree Source for the R-Car M3-W+ (R8A77961) SoC 4 * 5 * Copyright (C) 2016-2017 Renesas Electronics Corp. 6 */ 7 8#include <dt-bindings/clock/r8a77961-cpg-mssr.h> 9#include <dt-bindings/interrupt-controller/arm-gic.h> 10#include <dt-bindings/power/r8a77961-sysc.h> 11 12/ { 13 compatible = "renesas,r8a77961"; 14 #address-cells = <2>; 15 #size-cells = <2>; 16 17 /* 18 * The external audio clocks are configured as 0 Hz fixed frequency 19 * clocks by default. 20 * Boards that provide audio clocks should override them. 21 */ 22 audio_clk_a: audio_clk_a { 23 compatible = "fixed-clock"; 24 #clock-cells = <0>; 25 clock-frequency = <0>; 26 }; 27 28 audio_clk_b: audio_clk_b { 29 compatible = "fixed-clock"; 30 #clock-cells = <0>; 31 clock-frequency = <0>; 32 }; 33 34 audio_clk_c: audio_clk_c { 35 compatible = "fixed-clock"; 36 #clock-cells = <0>; 37 clock-frequency = <0>; 38 }; 39 40 /* External CAN clock - to be overridden by boards that provide it */ 41 can_clk: can { 42 compatible = "fixed-clock"; 43 #clock-cells = <0>; 44 clock-frequency = <0>; 45 }; 46 47 cluster0_opp: opp-table-0 { 48 compatible = "operating-points-v2"; 49 opp-shared; 50 51 opp-500000000 { 52 opp-hz = /bits/ 64 <500000000>; 53 opp-microvolt = <830000>; 54 clock-latency-ns = <300000>; 55 }; 56 opp-1000000000 { 57 opp-hz = /bits/ 64 <1000000000>; 58 opp-microvolt = <830000>; 59 clock-latency-ns = <300000>; 60 }; 61 opp-1500000000 { 62 opp-hz = /bits/ 64 <1500000000>; 63 opp-microvolt = <830000>; 64 clock-latency-ns = <300000>; 65 opp-suspend; 66 }; 67 opp-1600000000 { 68 opp-hz = /bits/ 64 <1600000000>; 69 opp-microvolt = <900000>; 70 clock-latency-ns = <300000>; 71 }; 72 opp-1700000000 { 73 opp-hz = /bits/ 64 <1700000000>; 74 opp-microvolt = <900000>; 75 clock-latency-ns = <300000>; 76 }; 77 opp-1800000000 { 78 opp-hz = /bits/ 64 <1800000000>; 79 opp-microvolt = <960000>; 80 clock-latency-ns = <300000>; 81 turbo-mode; 82 }; 83 }; 84 85 cluster1_opp: opp-table-1 { 86 compatible = "operating-points-v2"; 87 opp-shared; 88 89 opp-800000000 { 90 opp-hz = /bits/ 64 <800000000>; 91 opp-microvolt = <820000>; 92 clock-latency-ns = <300000>; 93 }; 94 opp-1000000000 { 95 opp-hz = /bits/ 64 <1000000000>; 96 opp-microvolt = <820000>; 97 clock-latency-ns = <300000>; 98 }; 99 opp-1200000000 { 100 opp-hz = /bits/ 64 <1200000000>; 101 opp-microvolt = <820000>; 102 clock-latency-ns = <300000>; 103 }; 104 opp-1300000000 { 105 opp-hz = /bits/ 64 <1300000000>; 106 opp-microvolt = <820000>; 107 clock-latency-ns = <300000>; 108 turbo-mode; 109 }; 110 }; 111 112 cpus { 113 #address-cells = <1>; 114 #size-cells = <0>; 115 116 cpu-map { 117 cluster0 { 118 core0 { 119 cpu = <&a57_0>; 120 }; 121 core1 { 122 cpu = <&a57_1>; 123 }; 124 }; 125 126 cluster1 { 127 core0 { 128 cpu = <&a53_0>; 129 }; 130 core1 { 131 cpu = <&a53_1>; 132 }; 133 core2 { 134 cpu = <&a53_2>; 135 }; 136 core3 { 137 cpu = <&a53_3>; 138 }; 139 }; 140 }; 141 142 a57_0: cpu@0 { 143 compatible = "arm,cortex-a57"; 144 reg = <0x0>; 145 device_type = "cpu"; 146 power-domains = <&sysc R8A77961_PD_CA57_CPU0>; 147 next-level-cache = <&L2_CA57>; 148 enable-method = "psci"; 149 cpu-idle-states = <&CPU_SLEEP_0>; 150 dynamic-power-coefficient = <854>; 151 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 152 operating-points-v2 = <&cluster0_opp>; 153 capacity-dmips-mhz = <1024>; 154 #cooling-cells = <2>; 155 }; 156 157 a57_1: cpu@1 { 158 compatible = "arm,cortex-a57"; 159 reg = <0x1>; 160 device_type = "cpu"; 161 power-domains = <&sysc R8A77961_PD_CA57_CPU1>; 162 next-level-cache = <&L2_CA57>; 163 enable-method = "psci"; 164 cpu-idle-states = <&CPU_SLEEP_0>; 165 clocks = <&cpg CPG_CORE R8A77961_CLK_Z>; 166 operating-points-v2 = <&cluster0_opp>; 167 capacity-dmips-mhz = <1024>; 168 #cooling-cells = <2>; 169 }; 170 171 a53_0: cpu@100 { 172 compatible = "arm,cortex-a53"; 173 reg = <0x100>; 174 device_type = "cpu"; 175 power-domains = <&sysc R8A77961_PD_CA53_CPU0>; 176 next-level-cache = <&L2_CA53>; 177 enable-method = "psci"; 178 cpu-idle-states = <&CPU_SLEEP_1>; 179 #cooling-cells = <2>; 180 dynamic-power-coefficient = <277>; 181 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 182 operating-points-v2 = <&cluster1_opp>; 183 capacity-dmips-mhz = <535>; 184 }; 185 186 a53_1: cpu@101 { 187 compatible = "arm,cortex-a53"; 188 reg = <0x101>; 189 device_type = "cpu"; 190 power-domains = <&sysc R8A77961_PD_CA53_CPU1>; 191 next-level-cache = <&L2_CA53>; 192 enable-method = "psci"; 193 cpu-idle-states = <&CPU_SLEEP_1>; 194 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 195 operating-points-v2 = <&cluster1_opp>; 196 capacity-dmips-mhz = <535>; 197 }; 198 199 a53_2: cpu@102 { 200 compatible = "arm,cortex-a53"; 201 reg = <0x102>; 202 device_type = "cpu"; 203 power-domains = <&sysc R8A77961_PD_CA53_CPU2>; 204 next-level-cache = <&L2_CA53>; 205 enable-method = "psci"; 206 cpu-idle-states = <&CPU_SLEEP_1>; 207 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 208 operating-points-v2 = <&cluster1_opp>; 209 capacity-dmips-mhz = <535>; 210 }; 211 212 a53_3: cpu@103 { 213 compatible = "arm,cortex-a53"; 214 reg = <0x103>; 215 device_type = "cpu"; 216 power-domains = <&sysc R8A77961_PD_CA53_CPU3>; 217 next-level-cache = <&L2_CA53>; 218 enable-method = "psci"; 219 cpu-idle-states = <&CPU_SLEEP_1>; 220 clocks = <&cpg CPG_CORE R8A77961_CLK_Z2>; 221 operating-points-v2 = <&cluster1_opp>; 222 capacity-dmips-mhz = <535>; 223 }; 224 225 L2_CA57: cache-controller-0 { 226 compatible = "cache"; 227 power-domains = <&sysc R8A77961_PD_CA57_SCU>; 228 cache-unified; 229 cache-level = <2>; 230 }; 231 232 L2_CA53: cache-controller-1 { 233 compatible = "cache"; 234 power-domains = <&sysc R8A77961_PD_CA53_SCU>; 235 cache-unified; 236 cache-level = <2>; 237 }; 238 239 idle-states { 240 entry-method = "psci"; 241 242 CPU_SLEEP_0: cpu-sleep-0 { 243 compatible = "arm,idle-state"; 244 arm,psci-suspend-param = <0x0010000>; 245 local-timer-stop; 246 entry-latency-us = <400>; 247 exit-latency-us = <500>; 248 min-residency-us = <4000>; 249 }; 250 251 CPU_SLEEP_1: cpu-sleep-1 { 252 compatible = "arm,idle-state"; 253 arm,psci-suspend-param = <0x0010000>; 254 local-timer-stop; 255 entry-latency-us = <700>; 256 exit-latency-us = <700>; 257 min-residency-us = <5000>; 258 }; 259 }; 260 }; 261 262 extal_clk: extal { 263 compatible = "fixed-clock"; 264 #clock-cells = <0>; 265 /* This value must be overridden by the board */ 266 clock-frequency = <0>; 267 bootph-all; 268 }; 269 270 extalr_clk: extalr { 271 compatible = "fixed-clock"; 272 #clock-cells = <0>; 273 /* This value must be overridden by the board */ 274 clock-frequency = <0>; 275 bootph-all; 276 }; 277 278 /* External PCIe clock - can be overridden by the board */ 279 pcie_bus_clk: pcie_bus { 280 compatible = "fixed-clock"; 281 #clock-cells = <0>; 282 clock-frequency = <0>; 283 }; 284 285 pmu_a53 { 286 compatible = "arm,cortex-a53-pmu"; 287 interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 288 <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 289 <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 290 <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 291 interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>; 292 }; 293 294 pmu_a57 { 295 compatible = "arm,cortex-a57-pmu"; 296 interrupts-extended = <&gic GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>, 297 <&gic GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>; 298 interrupt-affinity = <&a57_0>, <&a57_1>; 299 }; 300 301 psci { 302 compatible = "arm,psci-1.0", "arm,psci-0.2"; 303 method = "smc"; 304 }; 305 306 /* External SCIF clock - to be overridden by boards that provide it */ 307 scif_clk: scif { 308 compatible = "fixed-clock"; 309 #clock-cells = <0>; 310 clock-frequency = <0>; 311 }; 312 313 soc { 314 compatible = "simple-bus"; 315 interrupt-parent = <&gic>; 316 bootph-all; 317 318 #address-cells = <2>; 319 #size-cells = <2>; 320 ranges; 321 322 rwdt: watchdog@e6020000 { 323 compatible = "renesas,r8a77961-wdt", 324 "renesas,rcar-gen3-wdt"; 325 reg = <0 0xe6020000 0 0x0c>; 326 interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; 327 clocks = <&cpg CPG_MOD 402>; 328 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 329 resets = <&cpg 402>; 330 status = "disabled"; 331 }; 332 333 gpio0: gpio@e6050000 { 334 compatible = "renesas,gpio-r8a77961", 335 "renesas,rcar-gen3-gpio"; 336 reg = <0 0xe6050000 0 0x50>; 337 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; 338 #gpio-cells = <2>; 339 gpio-controller; 340 gpio-ranges = <&pfc 0 0 16>; 341 #interrupt-cells = <2>; 342 interrupt-controller; 343 clocks = <&cpg CPG_MOD 912>; 344 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 345 resets = <&cpg 912>; 346 }; 347 348 gpio1: gpio@e6051000 { 349 compatible = "renesas,gpio-r8a77961", 350 "renesas,rcar-gen3-gpio"; 351 reg = <0 0xe6051000 0 0x50>; 352 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>; 353 #gpio-cells = <2>; 354 gpio-controller; 355 gpio-ranges = <&pfc 0 32 29>; 356 #interrupt-cells = <2>; 357 interrupt-controller; 358 clocks = <&cpg CPG_MOD 911>; 359 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 360 resets = <&cpg 911>; 361 }; 362 363 gpio2: gpio@e6052000 { 364 compatible = "renesas,gpio-r8a77961", 365 "renesas,rcar-gen3-gpio"; 366 reg = <0 0xe6052000 0 0x50>; 367 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>; 368 #gpio-cells = <2>; 369 gpio-controller; 370 gpio-ranges = <&pfc 0 64 15>; 371 #interrupt-cells = <2>; 372 interrupt-controller; 373 clocks = <&cpg CPG_MOD 910>; 374 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 375 resets = <&cpg 910>; 376 }; 377 378 gpio3: gpio@e6053000 { 379 compatible = "renesas,gpio-r8a77961", 380 "renesas,rcar-gen3-gpio"; 381 reg = <0 0xe6053000 0 0x50>; 382 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 383 #gpio-cells = <2>; 384 gpio-controller; 385 gpio-ranges = <&pfc 0 96 16>; 386 #interrupt-cells = <2>; 387 interrupt-controller; 388 clocks = <&cpg CPG_MOD 909>; 389 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 390 resets = <&cpg 909>; 391 }; 392 393 gpio4: gpio@e6054000 { 394 compatible = "renesas,gpio-r8a77961", 395 "renesas,rcar-gen3-gpio"; 396 reg = <0 0xe6054000 0 0x50>; 397 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; 398 #gpio-cells = <2>; 399 gpio-controller; 400 gpio-ranges = <&pfc 0 128 18>; 401 #interrupt-cells = <2>; 402 interrupt-controller; 403 clocks = <&cpg CPG_MOD 908>; 404 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 405 resets = <&cpg 908>; 406 }; 407 408 gpio5: gpio@e6055000 { 409 compatible = "renesas,gpio-r8a77961", 410 "renesas,rcar-gen3-gpio"; 411 reg = <0 0xe6055000 0 0x50>; 412 interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; 413 #gpio-cells = <2>; 414 gpio-controller; 415 gpio-ranges = <&pfc 0 160 26>; 416 #interrupt-cells = <2>; 417 interrupt-controller; 418 clocks = <&cpg CPG_MOD 907>; 419 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 420 resets = <&cpg 907>; 421 }; 422 423 gpio6: gpio@e6055400 { 424 compatible = "renesas,gpio-r8a77961", 425 "renesas,rcar-gen3-gpio"; 426 reg = <0 0xe6055400 0 0x50>; 427 interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 428 #gpio-cells = <2>; 429 gpio-controller; 430 gpio-ranges = <&pfc 0 192 32>; 431 #interrupt-cells = <2>; 432 interrupt-controller; 433 clocks = <&cpg CPG_MOD 906>; 434 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 435 resets = <&cpg 906>; 436 }; 437 438 gpio7: gpio@e6055800 { 439 compatible = "renesas,gpio-r8a77961", 440 "renesas,rcar-gen3-gpio"; 441 reg = <0 0xe6055800 0 0x50>; 442 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; 443 #gpio-cells = <2>; 444 gpio-controller; 445 gpio-ranges = <&pfc 0 224 4>; 446 #interrupt-cells = <2>; 447 interrupt-controller; 448 clocks = <&cpg CPG_MOD 905>; 449 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 450 resets = <&cpg 905>; 451 }; 452 453 pfc: pinctrl@e6060000 { 454 compatible = "renesas,pfc-r8a77961"; 455 reg = <0 0xe6060000 0 0x50c>; 456 bootph-all; 457 }; 458 459 cmt0: timer@e60f0000 { 460 compatible = "renesas,r8a77961-cmt0", 461 "renesas,rcar-gen3-cmt0"; 462 reg = <0 0xe60f0000 0 0x1004>; 463 interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, 464 <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; 465 clocks = <&cpg CPG_MOD 303>; 466 clock-names = "fck"; 467 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 468 resets = <&cpg 303>; 469 status = "disabled"; 470 }; 471 472 cmt1: timer@e6130000 { 473 compatible = "renesas,r8a77961-cmt1", 474 "renesas,rcar-gen3-cmt1"; 475 reg = <0 0xe6130000 0 0x1004>; 476 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, 477 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, 478 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, 479 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, 480 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, 481 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, 482 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, 483 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; 484 clocks = <&cpg CPG_MOD 302>; 485 clock-names = "fck"; 486 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 487 resets = <&cpg 302>; 488 status = "disabled"; 489 }; 490 491 cmt2: timer@e6140000 { 492 compatible = "renesas,r8a77961-cmt1", 493 "renesas,rcar-gen3-cmt1"; 494 reg = <0 0xe6140000 0 0x1004>; 495 interrupts = <GIC_SPI 398 IRQ_TYPE_LEVEL_HIGH>, 496 <GIC_SPI 399 IRQ_TYPE_LEVEL_HIGH>, 497 <GIC_SPI 400 IRQ_TYPE_LEVEL_HIGH>, 498 <GIC_SPI 401 IRQ_TYPE_LEVEL_HIGH>, 499 <GIC_SPI 402 IRQ_TYPE_LEVEL_HIGH>, 500 <GIC_SPI 403 IRQ_TYPE_LEVEL_HIGH>, 501 <GIC_SPI 404 IRQ_TYPE_LEVEL_HIGH>, 502 <GIC_SPI 405 IRQ_TYPE_LEVEL_HIGH>; 503 clocks = <&cpg CPG_MOD 301>; 504 clock-names = "fck"; 505 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 506 resets = <&cpg 301>; 507 status = "disabled"; 508 }; 509 510 cmt3: timer@e6148000 { 511 compatible = "renesas,r8a77961-cmt1", 512 "renesas,rcar-gen3-cmt1"; 513 reg = <0 0xe6148000 0 0x1004>; 514 interrupts = <GIC_SPI 470 IRQ_TYPE_LEVEL_HIGH>, 515 <GIC_SPI 471 IRQ_TYPE_LEVEL_HIGH>, 516 <GIC_SPI 472 IRQ_TYPE_LEVEL_HIGH>, 517 <GIC_SPI 473 IRQ_TYPE_LEVEL_HIGH>, 518 <GIC_SPI 474 IRQ_TYPE_LEVEL_HIGH>, 519 <GIC_SPI 475 IRQ_TYPE_LEVEL_HIGH>, 520 <GIC_SPI 476 IRQ_TYPE_LEVEL_HIGH>, 521 <GIC_SPI 477 IRQ_TYPE_LEVEL_HIGH>; 522 clocks = <&cpg CPG_MOD 300>; 523 clock-names = "fck"; 524 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 525 resets = <&cpg 300>; 526 status = "disabled"; 527 }; 528 529 cpg: clock-controller@e6150000 { 530 compatible = "renesas,r8a77961-cpg-mssr"; 531 reg = <0 0xe6150000 0 0x1000>; 532 clocks = <&extal_clk>, <&extalr_clk>; 533 clock-names = "extal", "extalr"; 534 #clock-cells = <2>; 535 #power-domain-cells = <0>; 536 #reset-cells = <1>; 537 bootph-all; 538 }; 539 540 rst: reset-controller@e6160000 { 541 compatible = "renesas,r8a77961-rst"; 542 reg = <0 0xe6160000 0 0x0200>; 543 bootph-all; 544 }; 545 546 sysc: system-controller@e6180000 { 547 compatible = "renesas,r8a77961-sysc"; 548 reg = <0 0xe6180000 0 0x0400>; 549 #power-domain-cells = <1>; 550 }; 551 552 tsc: thermal@e6198000 { 553 compatible = "renesas,r8a77961-thermal"; 554 reg = <0 0xe6198000 0 0x100>, 555 <0 0xe61a0000 0 0x100>, 556 <0 0xe61a8000 0 0x100>; 557 interrupts = <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 558 <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>, 559 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>; 560 clocks = <&cpg CPG_MOD 522>; 561 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 562 resets = <&cpg 522>; 563 #thermal-sensor-cells = <1>; 564 }; 565 566 intc_ex: interrupt-controller@e61c0000 { 567 compatible = "renesas,intc-ex-r8a77961", "renesas,irqc"; 568 #interrupt-cells = <2>; 569 interrupt-controller; 570 reg = <0 0xe61c0000 0 0x200>; 571 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, 572 <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, 573 <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, 574 <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, 575 <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 576 <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; 577 clocks = <&cpg CPG_MOD 407>; 578 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 579 resets = <&cpg 407>; 580 }; 581 582 tmu0: timer@e61e0000 { 583 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 584 reg = <0 0xe61e0000 0 0x30>; 585 interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, 586 <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, 587 <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; 588 interrupt-names = "tuni0", "tuni1", "tuni2"; 589 clocks = <&cpg CPG_MOD 125>; 590 clock-names = "fck"; 591 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 592 resets = <&cpg 125>; 593 status = "disabled"; 594 }; 595 596 tmu1: timer@e6fc0000 { 597 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 598 reg = <0 0xe6fc0000 0 0x30>; 599 interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, 600 <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, 601 <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>, 602 <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>; 603 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 604 clocks = <&cpg CPG_MOD 124>; 605 clock-names = "fck"; 606 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 607 resets = <&cpg 124>; 608 status = "disabled"; 609 }; 610 611 tmu2: timer@e6fd0000 { 612 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 613 reg = <0 0xe6fd0000 0 0x30>; 614 interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, 615 <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, 616 <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>, 617 <GIC_SPI 306 IRQ_TYPE_LEVEL_HIGH>; 618 interrupt-names = "tuni0", "tuni1", "tuni2", "ticpi2"; 619 clocks = <&cpg CPG_MOD 123>; 620 clock-names = "fck"; 621 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 622 resets = <&cpg 123>; 623 status = "disabled"; 624 }; 625 626 tmu3: timer@e6fe0000 { 627 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 628 reg = <0 0xe6fe0000 0 0x30>; 629 interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, 630 <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, 631 <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; 632 interrupt-names = "tuni0", "tuni1", "tuni2"; 633 clocks = <&cpg CPG_MOD 122>; 634 clock-names = "fck"; 635 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 636 resets = <&cpg 122>; 637 status = "disabled"; 638 }; 639 640 tmu4: timer@ffc00000 { 641 compatible = "renesas,tmu-r8a77961", "renesas,tmu"; 642 reg = <0 0xffc00000 0 0x30>; 643 interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, 644 <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, 645 <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; 646 interrupt-names = "tuni0", "tuni1", "tuni2"; 647 clocks = <&cpg CPG_MOD 121>; 648 clock-names = "fck"; 649 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 650 resets = <&cpg 121>; 651 status = "disabled"; 652 }; 653 654 i2c0: i2c@e6500000 { 655 #address-cells = <1>; 656 #size-cells = <0>; 657 compatible = "renesas,i2c-r8a77961", 658 "renesas,rcar-gen3-i2c"; 659 reg = <0 0xe6500000 0 0x40>; 660 interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>; 661 clocks = <&cpg CPG_MOD 931>; 662 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 663 resets = <&cpg 931>; 664 dmas = <&dmac1 0x91>, <&dmac1 0x90>, 665 <&dmac2 0x91>, <&dmac2 0x90>; 666 dma-names = "tx", "rx", "tx", "rx"; 667 i2c-scl-internal-delay-ns = <110>; 668 status = "disabled"; 669 }; 670 671 i2c1: i2c@e6508000 { 672 #address-cells = <1>; 673 #size-cells = <0>; 674 compatible = "renesas,i2c-r8a77961", 675 "renesas,rcar-gen3-i2c"; 676 reg = <0 0xe6508000 0 0x40>; 677 interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>; 678 clocks = <&cpg CPG_MOD 930>; 679 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 680 resets = <&cpg 930>; 681 dmas = <&dmac1 0x93>, <&dmac1 0x92>, 682 <&dmac2 0x93>, <&dmac2 0x92>; 683 dma-names = "tx", "rx", "tx", "rx"; 684 i2c-scl-internal-delay-ns = <6>; 685 status = "disabled"; 686 }; 687 688 i2c2: i2c@e6510000 { 689 #address-cells = <1>; 690 #size-cells = <0>; 691 compatible = "renesas,i2c-r8a77961", 692 "renesas,rcar-gen3-i2c"; 693 reg = <0 0xe6510000 0 0x40>; 694 interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>; 695 clocks = <&cpg CPG_MOD 929>; 696 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 697 resets = <&cpg 929>; 698 dmas = <&dmac1 0x95>, <&dmac1 0x94>, 699 <&dmac2 0x95>, <&dmac2 0x94>; 700 dma-names = "tx", "rx", "tx", "rx"; 701 i2c-scl-internal-delay-ns = <6>; 702 status = "disabled"; 703 }; 704 705 i2c3: i2c@e66d0000 { 706 #address-cells = <1>; 707 #size-cells = <0>; 708 compatible = "renesas,i2c-r8a77961", 709 "renesas,rcar-gen3-i2c"; 710 reg = <0 0xe66d0000 0 0x40>; 711 interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>; 712 clocks = <&cpg CPG_MOD 928>; 713 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 714 resets = <&cpg 928>; 715 dmas = <&dmac0 0x97>, <&dmac0 0x96>; 716 dma-names = "tx", "rx"; 717 i2c-scl-internal-delay-ns = <110>; 718 status = "disabled"; 719 }; 720 721 i2c4: i2c@e66d8000 { 722 #address-cells = <1>; 723 #size-cells = <0>; 724 compatible = "renesas,i2c-r8a77961", 725 "renesas,rcar-gen3-i2c"; 726 reg = <0 0xe66d8000 0 0x40>; 727 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 728 clocks = <&cpg CPG_MOD 927>; 729 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 730 resets = <&cpg 927>; 731 dmas = <&dmac0 0x99>, <&dmac0 0x98>; 732 dma-names = "tx", "rx"; 733 i2c-scl-internal-delay-ns = <110>; 734 status = "disabled"; 735 }; 736 737 i2c5: i2c@e66e0000 { 738 #address-cells = <1>; 739 #size-cells = <0>; 740 compatible = "renesas,i2c-r8a77961", 741 "renesas,rcar-gen3-i2c"; 742 reg = <0 0xe66e0000 0 0x40>; 743 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 744 clocks = <&cpg CPG_MOD 919>; 745 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 746 resets = <&cpg 919>; 747 dmas = <&dmac0 0x9b>, <&dmac0 0x9a>; 748 dma-names = "tx", "rx"; 749 i2c-scl-internal-delay-ns = <110>; 750 status = "disabled"; 751 }; 752 753 i2c6: i2c@e66e8000 { 754 #address-cells = <1>; 755 #size-cells = <0>; 756 compatible = "renesas,i2c-r8a77961", 757 "renesas,rcar-gen3-i2c"; 758 reg = <0 0xe66e8000 0 0x40>; 759 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 760 clocks = <&cpg CPG_MOD 918>; 761 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 762 resets = <&cpg 918>; 763 dmas = <&dmac0 0x9d>, <&dmac0 0x9c>; 764 dma-names = "tx", "rx"; 765 i2c-scl-internal-delay-ns = <6>; 766 status = "disabled"; 767 }; 768 769 i2c_dvfs: i2c@e60b0000 { 770 #address-cells = <1>; 771 #size-cells = <0>; 772 compatible = "renesas,iic-r8a77961", 773 "renesas,rcar-gen3-iic", 774 "renesas,rmobile-iic"; 775 reg = <0 0xe60b0000 0 0x425>; 776 interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; 777 clocks = <&cpg CPG_MOD 926>; 778 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 779 resets = <&cpg 926>; 780 dmas = <&dmac0 0x11>, <&dmac0 0x10>; 781 dma-names = "tx", "rx"; 782 status = "disabled"; 783 }; 784 785 hscif0: serial@e6540000 { 786 compatible = "renesas,hscif-r8a77961", 787 "renesas,rcar-gen3-hscif", 788 "renesas,hscif"; 789 reg = <0 0xe6540000 0 0x60>; 790 interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>; 791 clocks = <&cpg CPG_MOD 520>, 792 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 793 <&scif_clk>; 794 clock-names = "fck", "brg_int", "scif_clk"; 795 dmas = <&dmac1 0x31>, <&dmac1 0x30>, 796 <&dmac2 0x31>, <&dmac2 0x30>; 797 dma-names = "tx", "rx", "tx", "rx"; 798 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 799 resets = <&cpg 520>; 800 status = "disabled"; 801 }; 802 803 hscif1: serial@e6550000 { 804 compatible = "renesas,hscif-r8a77961", 805 "renesas,rcar-gen3-hscif", 806 "renesas,hscif"; 807 reg = <0 0xe6550000 0 0x60>; 808 interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>; 809 clocks = <&cpg CPG_MOD 519>, 810 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 811 <&scif_clk>; 812 clock-names = "fck", "brg_int", "scif_clk"; 813 dmas = <&dmac1 0x33>, <&dmac1 0x32>, 814 <&dmac2 0x33>, <&dmac2 0x32>; 815 dma-names = "tx", "rx", "tx", "rx"; 816 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 817 resets = <&cpg 519>; 818 status = "disabled"; 819 }; 820 821 hscif2: serial@e6560000 { 822 compatible = "renesas,hscif-r8a77961", 823 "renesas,rcar-gen3-hscif", 824 "renesas,hscif"; 825 reg = <0 0xe6560000 0 0x60>; 826 interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; 827 clocks = <&cpg CPG_MOD 518>, 828 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 829 <&scif_clk>; 830 clock-names = "fck", "brg_int", "scif_clk"; 831 dmas = <&dmac1 0x35>, <&dmac1 0x34>, 832 <&dmac2 0x35>, <&dmac2 0x34>; 833 dma-names = "tx", "rx", "tx", "rx"; 834 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 835 resets = <&cpg 518>; 836 status = "disabled"; 837 }; 838 839 hscif3: serial@e66a0000 { 840 compatible = "renesas,hscif-r8a77961", 841 "renesas,rcar-gen3-hscif", 842 "renesas,hscif"; 843 reg = <0 0xe66a0000 0 0x60>; 844 interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>; 845 clocks = <&cpg CPG_MOD 517>, 846 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 847 <&scif_clk>; 848 clock-names = "fck", "brg_int", "scif_clk"; 849 dmas = <&dmac0 0x37>, <&dmac0 0x36>; 850 dma-names = "tx", "rx"; 851 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 852 resets = <&cpg 517>; 853 status = "disabled"; 854 }; 855 856 hscif4: serial@e66b0000 { 857 compatible = "renesas,hscif-r8a77961", 858 "renesas,rcar-gen3-hscif", 859 "renesas,hscif"; 860 reg = <0 0xe66b0000 0 0x60>; 861 interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; 862 clocks = <&cpg CPG_MOD 516>, 863 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 864 <&scif_clk>; 865 clock-names = "fck", "brg_int", "scif_clk"; 866 dmas = <&dmac0 0x39>, <&dmac0 0x38>; 867 dma-names = "tx", "rx"; 868 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 869 resets = <&cpg 516>; 870 status = "disabled"; 871 }; 872 873 hsusb: usb@e6590000 { 874 compatible = "renesas,usbhs-r8a77961", 875 "renesas,rcar-gen3-usbhs"; 876 reg = <0 0xe6590000 0 0x200>; 877 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; 878 clocks = <&cpg CPG_MOD 704>, <&cpg CPG_MOD 703>; 879 dmas = <&usb_dmac0 0>, <&usb_dmac0 1>, 880 <&usb_dmac1 0>, <&usb_dmac1 1>; 881 dma-names = "ch0", "ch1", "ch2", "ch3"; 882 renesas,buswait = <11>; 883 phys = <&usb2_phy0 3>; 884 phy-names = "usb"; 885 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 886 resets = <&cpg 704>, <&cpg 703>; 887 status = "disabled"; 888 }; 889 890 usb_dmac0: dma-controller@e65a0000 { 891 compatible = "renesas,r8a77961-usb-dmac", 892 "renesas,usb-dmac"; 893 reg = <0 0xe65a0000 0 0x100>; 894 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, 895 <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; 896 interrupt-names = "ch0", "ch1"; 897 clocks = <&cpg CPG_MOD 330>; 898 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 899 resets = <&cpg 330>; 900 #dma-cells = <1>; 901 dma-channels = <2>; 902 }; 903 904 usb_dmac1: dma-controller@e65b0000 { 905 compatible = "renesas,r8a77961-usb-dmac", 906 "renesas,usb-dmac"; 907 reg = <0 0xe65b0000 0 0x100>; 908 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, 909 <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; 910 interrupt-names = "ch0", "ch1"; 911 clocks = <&cpg CPG_MOD 331>; 912 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 913 resets = <&cpg 331>; 914 #dma-cells = <1>; 915 dma-channels = <2>; 916 }; 917 918 usb3_phy0: usb-phy@e65ee000 { 919 compatible = "renesas,r8a77961-usb3-phy", 920 "renesas,rcar-gen3-usb3-phy"; 921 reg = <0 0xe65ee000 0 0x90>; 922 clocks = <&cpg CPG_MOD 328>, <&usb3s0_clk>, 923 <&usb_extal_clk>; 924 clock-names = "usb3-if", "usb3s_clk", "usb_extal"; 925 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 926 resets = <&cpg 328>; 927 #phy-cells = <0>; 928 status = "disabled"; 929 }; 930 931 arm_cc630p: crypto@e6601000 { 932 compatible = "arm,cryptocell-630p-ree"; 933 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; 934 reg = <0x0 0xe6601000 0 0x1000>; 935 clocks = <&cpg CPG_MOD 229>; 936 resets = <&cpg 229>; 937 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 938 }; 939 940 dmac0: dma-controller@e6700000 { 941 compatible = "renesas,dmac-r8a77961", 942 "renesas,rcar-dmac"; 943 reg = <0 0xe6700000 0 0x10000>; 944 interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, 945 <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, 946 <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, 947 <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, 948 <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, 949 <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, 950 <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, 951 <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, 952 <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, 953 <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, 954 <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, 955 <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, 956 <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, 957 <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, 958 <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, 959 <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, 960 <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; 961 interrupt-names = "error", 962 "ch0", "ch1", "ch2", "ch3", 963 "ch4", "ch5", "ch6", "ch7", 964 "ch8", "ch9", "ch10", "ch11", 965 "ch12", "ch13", "ch14", "ch15"; 966 clocks = <&cpg CPG_MOD 219>; 967 clock-names = "fck"; 968 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 969 resets = <&cpg 219>; 970 #dma-cells = <1>; 971 dma-channels = <16>; 972 iommus = <&ipmmu_ds0 0>, <&ipmmu_ds0 1>, 973 <&ipmmu_ds0 2>, <&ipmmu_ds0 3>, 974 <&ipmmu_ds0 4>, <&ipmmu_ds0 5>, 975 <&ipmmu_ds0 6>, <&ipmmu_ds0 7>, 976 <&ipmmu_ds0 8>, <&ipmmu_ds0 9>, 977 <&ipmmu_ds0 10>, <&ipmmu_ds0 11>, 978 <&ipmmu_ds0 12>, <&ipmmu_ds0 13>, 979 <&ipmmu_ds0 14>, <&ipmmu_ds0 15>; 980 }; 981 982 dmac1: dma-controller@e7300000 { 983 compatible = "renesas,dmac-r8a77961", 984 "renesas,rcar-dmac"; 985 reg = <0 0xe7300000 0 0x10000>; 986 interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, 987 <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, 988 <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, 989 <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, 990 <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, 991 <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, 992 <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, 993 <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, 994 <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, 995 <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, 996 <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, 997 <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, 998 <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, 999 <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, 1000 <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, 1001 <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, 1002 <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; 1003 interrupt-names = "error", 1004 "ch0", "ch1", "ch2", "ch3", 1005 "ch4", "ch5", "ch6", "ch7", 1006 "ch8", "ch9", "ch10", "ch11", 1007 "ch12", "ch13", "ch14", "ch15"; 1008 clocks = <&cpg CPG_MOD 218>; 1009 clock-names = "fck"; 1010 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1011 resets = <&cpg 218>; 1012 #dma-cells = <1>; 1013 dma-channels = <16>; 1014 iommus = <&ipmmu_ds1 0>, <&ipmmu_ds1 1>, 1015 <&ipmmu_ds1 2>, <&ipmmu_ds1 3>, 1016 <&ipmmu_ds1 4>, <&ipmmu_ds1 5>, 1017 <&ipmmu_ds1 6>, <&ipmmu_ds1 7>, 1018 <&ipmmu_ds1 8>, <&ipmmu_ds1 9>, 1019 <&ipmmu_ds1 10>, <&ipmmu_ds1 11>, 1020 <&ipmmu_ds1 12>, <&ipmmu_ds1 13>, 1021 <&ipmmu_ds1 14>, <&ipmmu_ds1 15>; 1022 }; 1023 1024 dmac2: dma-controller@e7310000 { 1025 compatible = "renesas,dmac-r8a77961", 1026 "renesas,rcar-dmac"; 1027 reg = <0 0xe7310000 0 0x10000>; 1028 interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, 1029 <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, 1030 <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, 1031 <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, 1032 <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, 1033 <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, 1034 <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, 1035 <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, 1036 <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, 1037 <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, 1038 <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, 1039 <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, 1040 <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, 1041 <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, 1042 <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, 1043 <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, 1044 <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; 1045 interrupt-names = "error", 1046 "ch0", "ch1", "ch2", "ch3", 1047 "ch4", "ch5", "ch6", "ch7", 1048 "ch8", "ch9", "ch10", "ch11", 1049 "ch12", "ch13", "ch14", "ch15"; 1050 clocks = <&cpg CPG_MOD 217>; 1051 clock-names = "fck"; 1052 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1053 resets = <&cpg 217>; 1054 #dma-cells = <1>; 1055 dma-channels = <16>; 1056 iommus = <&ipmmu_ds1 16>, <&ipmmu_ds1 17>, 1057 <&ipmmu_ds1 18>, <&ipmmu_ds1 19>, 1058 <&ipmmu_ds1 20>, <&ipmmu_ds1 21>, 1059 <&ipmmu_ds1 22>, <&ipmmu_ds1 23>, 1060 <&ipmmu_ds1 24>, <&ipmmu_ds1 25>, 1061 <&ipmmu_ds1 26>, <&ipmmu_ds1 27>, 1062 <&ipmmu_ds1 28>, <&ipmmu_ds1 29>, 1063 <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; 1064 }; 1065 1066 ipmmu_ds0: iommu@e6740000 { 1067 compatible = "renesas,ipmmu-r8a77961"; 1068 reg = <0 0xe6740000 0 0x1000>; 1069 renesas,ipmmu-main = <&ipmmu_mm 0>; 1070 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1071 #iommu-cells = <1>; 1072 }; 1073 1074 ipmmu_ds1: iommu@e7740000 { 1075 compatible = "renesas,ipmmu-r8a77961"; 1076 reg = <0 0xe7740000 0 0x1000>; 1077 renesas,ipmmu-main = <&ipmmu_mm 1>; 1078 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1079 #iommu-cells = <1>; 1080 }; 1081 1082 ipmmu_hc: iommu@e6570000 { 1083 compatible = "renesas,ipmmu-r8a77961"; 1084 reg = <0 0xe6570000 0 0x1000>; 1085 renesas,ipmmu-main = <&ipmmu_mm 2>; 1086 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1087 #iommu-cells = <1>; 1088 }; 1089 1090 ipmmu_ir: iommu@ff8b0000 { 1091 compatible = "renesas,ipmmu-r8a77961"; 1092 reg = <0 0xff8b0000 0 0x1000>; 1093 renesas,ipmmu-main = <&ipmmu_mm 3>; 1094 power-domains = <&sysc R8A77961_PD_A3IR>; 1095 #iommu-cells = <1>; 1096 }; 1097 1098 ipmmu_mm: iommu@e67b0000 { 1099 compatible = "renesas,ipmmu-r8a77961"; 1100 reg = <0 0xe67b0000 0 0x1000>; 1101 interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, 1102 <GIC_SPI 197 IRQ_TYPE_LEVEL_HIGH>; 1103 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1104 #iommu-cells = <1>; 1105 }; 1106 1107 ipmmu_mp: iommu@ec670000 { 1108 compatible = "renesas,ipmmu-r8a77961"; 1109 reg = <0 0xec670000 0 0x1000>; 1110 renesas,ipmmu-main = <&ipmmu_mm 4>; 1111 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1112 #iommu-cells = <1>; 1113 }; 1114 1115 ipmmu_pv0: iommu@fd800000 { 1116 compatible = "renesas,ipmmu-r8a77961"; 1117 reg = <0 0xfd800000 0 0x1000>; 1118 renesas,ipmmu-main = <&ipmmu_mm 5>; 1119 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1120 #iommu-cells = <1>; 1121 }; 1122 1123 ipmmu_pv1: iommu@fd950000 { 1124 compatible = "renesas,ipmmu-r8a77961"; 1125 reg = <0 0xfd950000 0 0x1000>; 1126 renesas,ipmmu-main = <&ipmmu_mm 6>; 1127 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1128 #iommu-cells = <1>; 1129 }; 1130 1131 ipmmu_rt: iommu@ffc80000 { 1132 compatible = "renesas,ipmmu-r8a77961"; 1133 reg = <0 0xffc80000 0 0x1000>; 1134 renesas,ipmmu-main = <&ipmmu_mm 7>; 1135 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1136 #iommu-cells = <1>; 1137 }; 1138 1139 ipmmu_vc0: iommu@fe6b0000 { 1140 compatible = "renesas,ipmmu-r8a77961"; 1141 reg = <0 0xfe6b0000 0 0x1000>; 1142 renesas,ipmmu-main = <&ipmmu_mm 8>; 1143 power-domains = <&sysc R8A77961_PD_A3VC>; 1144 #iommu-cells = <1>; 1145 }; 1146 1147 ipmmu_vi0: iommu@febd0000 { 1148 compatible = "renesas,ipmmu-r8a77961"; 1149 reg = <0 0xfebd0000 0 0x1000>; 1150 renesas,ipmmu-main = <&ipmmu_mm 9>; 1151 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1152 #iommu-cells = <1>; 1153 }; 1154 1155 avb: ethernet@e6800000 { 1156 compatible = "renesas,etheravb-r8a77961", 1157 "renesas,etheravb-rcar-gen3"; 1158 reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; 1159 interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 1160 <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, 1161 <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>, 1162 <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>, 1163 <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>, 1164 <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>, 1165 <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>, 1166 <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>, 1167 <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>, 1168 <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>, 1169 <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>, 1170 <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>, 1171 <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>, 1172 <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>, 1173 <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>, 1174 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>, 1175 <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>, 1176 <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>, 1177 <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>, 1178 <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>, 1179 <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>, 1180 <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>, 1181 <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>, 1182 <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>, 1183 <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 1184 interrupt-names = "ch0", "ch1", "ch2", "ch3", 1185 "ch4", "ch5", "ch6", "ch7", 1186 "ch8", "ch9", "ch10", "ch11", 1187 "ch12", "ch13", "ch14", "ch15", 1188 "ch16", "ch17", "ch18", "ch19", 1189 "ch20", "ch21", "ch22", "ch23", 1190 "ch24"; 1191 clocks = <&cpg CPG_MOD 812>; 1192 clock-names = "fck"; 1193 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1194 resets = <&cpg 812>; 1195 phy-mode = "rgmii"; 1196 rx-internal-delay-ps = <0>; 1197 tx-internal-delay-ps = <0>; 1198 iommus = <&ipmmu_ds0 16>; 1199 #address-cells = <1>; 1200 #size-cells = <0>; 1201 status = "disabled"; 1202 }; 1203 1204 can0: can@e6c30000 { 1205 compatible = "renesas,can-r8a77961", 1206 "renesas,rcar-gen3-can"; 1207 reg = <0 0xe6c30000 0 0x1000>; 1208 interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>; 1209 clocks = <&cpg CPG_MOD 916>, 1210 <&cpg CPG_CORE R8A77961_CLK_CANFD>, 1211 <&can_clk>; 1212 clock-names = "clkp1", "clkp2", "can_clk"; 1213 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>; 1214 assigned-clock-rates = <40000000>; 1215 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1216 resets = <&cpg 916>; 1217 status = "disabled"; 1218 }; 1219 1220 can1: can@e6c38000 { 1221 compatible = "renesas,can-r8a77961", 1222 "renesas,rcar-gen3-can"; 1223 reg = <0 0xe6c38000 0 0x1000>; 1224 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>; 1225 clocks = <&cpg CPG_MOD 915>, 1226 <&cpg CPG_CORE R8A77961_CLK_CANFD>, 1227 <&can_clk>; 1228 clock-names = "clkp1", "clkp2", "can_clk"; 1229 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>; 1230 assigned-clock-rates = <40000000>; 1231 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1232 resets = <&cpg 915>; 1233 status = "disabled"; 1234 }; 1235 1236 canfd: can@e66c0000 { 1237 compatible = "renesas,r8a77961-canfd", 1238 "renesas,rcar-gen3-canfd"; 1239 reg = <0 0xe66c0000 0 0x8000>; 1240 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, 1241 <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; 1242 interrupt-names = "ch_int", "g_int"; 1243 clocks = <&cpg CPG_MOD 914>, 1244 <&cpg CPG_CORE R8A77961_CLK_CANFD>, 1245 <&can_clk>; 1246 clock-names = "fck", "canfd", "can_clk"; 1247 assigned-clocks = <&cpg CPG_CORE R8A77961_CLK_CANFD>; 1248 assigned-clock-rates = <40000000>; 1249 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1250 resets = <&cpg 914>; 1251 status = "disabled"; 1252 1253 channel0 { 1254 status = "disabled"; 1255 }; 1256 1257 channel1 { 1258 status = "disabled"; 1259 }; 1260 }; 1261 1262 pwm0: pwm@e6e30000 { 1263 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1264 reg = <0 0xe6e30000 0 8>; 1265 #pwm-cells = <2>; 1266 clocks = <&cpg CPG_MOD 523>; 1267 resets = <&cpg 523>; 1268 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1269 status = "disabled"; 1270 }; 1271 1272 pwm1: pwm@e6e31000 { 1273 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1274 reg = <0 0xe6e31000 0 8>; 1275 #pwm-cells = <2>; 1276 clocks = <&cpg CPG_MOD 523>; 1277 resets = <&cpg 523>; 1278 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1279 status = "disabled"; 1280 }; 1281 1282 pwm2: pwm@e6e32000 { 1283 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1284 reg = <0 0xe6e32000 0 8>; 1285 #pwm-cells = <2>; 1286 clocks = <&cpg CPG_MOD 523>; 1287 resets = <&cpg 523>; 1288 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1289 status = "disabled"; 1290 }; 1291 1292 pwm3: pwm@e6e33000 { 1293 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1294 reg = <0 0xe6e33000 0 8>; 1295 #pwm-cells = <2>; 1296 clocks = <&cpg CPG_MOD 523>; 1297 resets = <&cpg 523>; 1298 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1299 status = "disabled"; 1300 }; 1301 1302 pwm4: pwm@e6e34000 { 1303 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1304 reg = <0 0xe6e34000 0 8>; 1305 #pwm-cells = <2>; 1306 clocks = <&cpg CPG_MOD 523>; 1307 resets = <&cpg 523>; 1308 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1309 status = "disabled"; 1310 }; 1311 1312 pwm5: pwm@e6e35000 { 1313 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1314 reg = <0 0xe6e35000 0 8>; 1315 #pwm-cells = <2>; 1316 clocks = <&cpg CPG_MOD 523>; 1317 resets = <&cpg 523>; 1318 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1319 status = "disabled"; 1320 }; 1321 1322 pwm6: pwm@e6e36000 { 1323 compatible = "renesas,pwm-r8a77961", "renesas,pwm-rcar"; 1324 reg = <0 0xe6e36000 0 8>; 1325 #pwm-cells = <2>; 1326 clocks = <&cpg CPG_MOD 523>; 1327 resets = <&cpg 523>; 1328 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1329 status = "disabled"; 1330 }; 1331 1332 scif0: serial@e6e60000 { 1333 compatible = "renesas,scif-r8a77961", 1334 "renesas,rcar-gen3-scif", "renesas,scif"; 1335 reg = <0 0xe6e60000 0 64>; 1336 interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>; 1337 clocks = <&cpg CPG_MOD 207>, 1338 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1339 <&scif_clk>; 1340 clock-names = "fck", "brg_int", "scif_clk"; 1341 dmas = <&dmac1 0x51>, <&dmac1 0x50>, 1342 <&dmac2 0x51>, <&dmac2 0x50>; 1343 dma-names = "tx", "rx", "tx", "rx"; 1344 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1345 resets = <&cpg 207>; 1346 status = "disabled"; 1347 }; 1348 1349 scif1: serial@e6e68000 { 1350 compatible = "renesas,scif-r8a77961", 1351 "renesas,rcar-gen3-scif", "renesas,scif"; 1352 reg = <0 0xe6e68000 0 64>; 1353 interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; 1354 clocks = <&cpg CPG_MOD 206>, 1355 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1356 <&scif_clk>; 1357 clock-names = "fck", "brg_int", "scif_clk"; 1358 dmas = <&dmac1 0x53>, <&dmac1 0x52>, 1359 <&dmac2 0x53>, <&dmac2 0x52>; 1360 dma-names = "tx", "rx", "tx", "rx"; 1361 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1362 resets = <&cpg 206>; 1363 status = "disabled"; 1364 }; 1365 1366 scif2: serial@e6e88000 { 1367 compatible = "renesas,scif-r8a77961", 1368 "renesas,rcar-gen3-scif", "renesas,scif"; 1369 reg = <0 0xe6e88000 0 64>; 1370 interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>; 1371 clocks = <&cpg CPG_MOD 310>, 1372 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1373 <&scif_clk>; 1374 clock-names = "fck", "brg_int", "scif_clk"; 1375 dmas = <&dmac1 0x13>, <&dmac1 0x12>, 1376 <&dmac2 0x13>, <&dmac2 0x12>; 1377 dma-names = "tx", "rx", "tx", "rx"; 1378 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1379 resets = <&cpg 310>; 1380 status = "disabled"; 1381 }; 1382 1383 scif3: serial@e6c50000 { 1384 compatible = "renesas,scif-r8a77961", 1385 "renesas,rcar-gen3-scif", "renesas,scif"; 1386 reg = <0 0xe6c50000 0 64>; 1387 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>; 1388 clocks = <&cpg CPG_MOD 204>, 1389 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1390 <&scif_clk>; 1391 clock-names = "fck", "brg_int", "scif_clk"; 1392 dmas = <&dmac0 0x57>, <&dmac0 0x56>; 1393 dma-names = "tx", "rx"; 1394 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1395 resets = <&cpg 204>; 1396 status = "disabled"; 1397 }; 1398 1399 scif4: serial@e6c40000 { 1400 compatible = "renesas,scif-r8a77961", 1401 "renesas,rcar-gen3-scif", "renesas,scif"; 1402 reg = <0 0xe6c40000 0 64>; 1403 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 1404 clocks = <&cpg CPG_MOD 203>, 1405 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1406 <&scif_clk>; 1407 clock-names = "fck", "brg_int", "scif_clk"; 1408 dmas = <&dmac0 0x59>, <&dmac0 0x58>; 1409 dma-names = "tx", "rx"; 1410 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1411 resets = <&cpg 203>; 1412 status = "disabled"; 1413 }; 1414 1415 scif5: serial@e6f30000 { 1416 compatible = "renesas,scif-r8a77961", 1417 "renesas,rcar-gen3-scif", "renesas,scif"; 1418 reg = <0 0xe6f30000 0 64>; 1419 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>; 1420 clocks = <&cpg CPG_MOD 202>, 1421 <&cpg CPG_CORE R8A77961_CLK_S3D1>, 1422 <&scif_clk>; 1423 clock-names = "fck", "brg_int", "scif_clk"; 1424 dmas = <&dmac1 0x5b>, <&dmac1 0x5a>, 1425 <&dmac2 0x5b>, <&dmac2 0x5a>; 1426 dma-names = "tx", "rx", "tx", "rx"; 1427 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1428 resets = <&cpg 202>; 1429 status = "disabled"; 1430 }; 1431 1432 tpu: pwm@e6e80000 { 1433 compatible = "renesas,tpu-r8a77961", "renesas,tpu"; 1434 reg = <0 0xe6e80000 0 0x148>; 1435 interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; 1436 clocks = <&cpg CPG_MOD 304>; 1437 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1438 resets = <&cpg 304>; 1439 #pwm-cells = <3>; 1440 status = "disabled"; 1441 }; 1442 1443 msiof0: spi@e6e90000 { 1444 compatible = "renesas,msiof-r8a77961", 1445 "renesas,rcar-gen3-msiof"; 1446 reg = <0 0xe6e90000 0 0x0064>; 1447 interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; 1448 clocks = <&cpg CPG_MOD 211>; 1449 dmas = <&dmac1 0x41>, <&dmac1 0x40>, 1450 <&dmac2 0x41>, <&dmac2 0x40>; 1451 dma-names = "tx", "rx", "tx", "rx"; 1452 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1453 resets = <&cpg 211>; 1454 #address-cells = <1>; 1455 #size-cells = <0>; 1456 status = "disabled"; 1457 }; 1458 1459 msiof1: spi@e6ea0000 { 1460 compatible = "renesas,msiof-r8a77961", 1461 "renesas,rcar-gen3-msiof"; 1462 reg = <0 0xe6ea0000 0 0x0064>; 1463 interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; 1464 clocks = <&cpg CPG_MOD 210>; 1465 dmas = <&dmac1 0x43>, <&dmac1 0x42>, 1466 <&dmac2 0x43>, <&dmac2 0x42>; 1467 dma-names = "tx", "rx", "tx", "rx"; 1468 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1469 resets = <&cpg 210>; 1470 #address-cells = <1>; 1471 #size-cells = <0>; 1472 status = "disabled"; 1473 }; 1474 1475 msiof2: spi@e6c00000 { 1476 compatible = "renesas,msiof-r8a77961", 1477 "renesas,rcar-gen3-msiof"; 1478 reg = <0 0xe6c00000 0 0x0064>; 1479 interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>; 1480 clocks = <&cpg CPG_MOD 209>; 1481 dmas = <&dmac0 0x45>, <&dmac0 0x44>; 1482 dma-names = "tx", "rx"; 1483 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1484 resets = <&cpg 209>; 1485 #address-cells = <1>; 1486 #size-cells = <0>; 1487 status = "disabled"; 1488 }; 1489 1490 msiof3: spi@e6c10000 { 1491 compatible = "renesas,msiof-r8a77961", 1492 "renesas,rcar-gen3-msiof"; 1493 reg = <0 0xe6c10000 0 0x0064>; 1494 interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; 1495 clocks = <&cpg CPG_MOD 208>; 1496 dmas = <&dmac0 0x47>, <&dmac0 0x46>; 1497 dma-names = "tx", "rx"; 1498 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1499 resets = <&cpg 208>; 1500 #address-cells = <1>; 1501 #size-cells = <0>; 1502 status = "disabled"; 1503 }; 1504 1505 vin0: video@e6ef0000 { 1506 compatible = "renesas,vin-r8a77961"; 1507 reg = <0 0xe6ef0000 0 0x1000>; 1508 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>; 1509 clocks = <&cpg CPG_MOD 811>; 1510 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1511 resets = <&cpg 811>; 1512 renesas,id = <0>; 1513 status = "disabled"; 1514 1515 ports { 1516 #address-cells = <1>; 1517 #size-cells = <0>; 1518 1519 port@1 { 1520 #address-cells = <1>; 1521 #size-cells = <0>; 1522 1523 reg = <1>; 1524 1525 vin0csi20: endpoint@0 { 1526 reg = <0>; 1527 remote-endpoint = <&csi20vin0>; 1528 }; 1529 vin0csi40: endpoint@2 { 1530 reg = <2>; 1531 remote-endpoint = <&csi40vin0>; 1532 }; 1533 }; 1534 }; 1535 }; 1536 1537 vin1: video@e6ef1000 { 1538 compatible = "renesas,vin-r8a77961"; 1539 reg = <0 0xe6ef1000 0 0x1000>; 1540 interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>; 1541 clocks = <&cpg CPG_MOD 810>; 1542 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1543 resets = <&cpg 810>; 1544 renesas,id = <1>; 1545 status = "disabled"; 1546 1547 ports { 1548 #address-cells = <1>; 1549 #size-cells = <0>; 1550 1551 port@1 { 1552 #address-cells = <1>; 1553 #size-cells = <0>; 1554 1555 reg = <1>; 1556 1557 vin1csi20: endpoint@0 { 1558 reg = <0>; 1559 remote-endpoint = <&csi20vin1>; 1560 }; 1561 vin1csi40: endpoint@2 { 1562 reg = <2>; 1563 remote-endpoint = <&csi40vin1>; 1564 }; 1565 }; 1566 }; 1567 }; 1568 1569 vin2: video@e6ef2000 { 1570 compatible = "renesas,vin-r8a77961"; 1571 reg = <0 0xe6ef2000 0 0x1000>; 1572 interrupts = <GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>; 1573 clocks = <&cpg CPG_MOD 809>; 1574 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1575 resets = <&cpg 809>; 1576 renesas,id = <2>; 1577 status = "disabled"; 1578 1579 ports { 1580 #address-cells = <1>; 1581 #size-cells = <0>; 1582 1583 port@1 { 1584 #address-cells = <1>; 1585 #size-cells = <0>; 1586 1587 reg = <1>; 1588 1589 vin2csi20: endpoint@0 { 1590 reg = <0>; 1591 remote-endpoint = <&csi20vin2>; 1592 }; 1593 vin2csi40: endpoint@2 { 1594 reg = <2>; 1595 remote-endpoint = <&csi40vin2>; 1596 }; 1597 }; 1598 }; 1599 }; 1600 1601 vin3: video@e6ef3000 { 1602 compatible = "renesas,vin-r8a77961"; 1603 reg = <0 0xe6ef3000 0 0x1000>; 1604 interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>; 1605 clocks = <&cpg CPG_MOD 808>; 1606 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1607 resets = <&cpg 808>; 1608 renesas,id = <3>; 1609 status = "disabled"; 1610 1611 ports { 1612 #address-cells = <1>; 1613 #size-cells = <0>; 1614 1615 port@1 { 1616 #address-cells = <1>; 1617 #size-cells = <0>; 1618 1619 reg = <1>; 1620 1621 vin3csi20: endpoint@0 { 1622 reg = <0>; 1623 remote-endpoint = <&csi20vin3>; 1624 }; 1625 vin3csi40: endpoint@2 { 1626 reg = <2>; 1627 remote-endpoint = <&csi40vin3>; 1628 }; 1629 }; 1630 }; 1631 }; 1632 1633 vin4: video@e6ef4000 { 1634 compatible = "renesas,vin-r8a77961"; 1635 reg = <0 0xe6ef4000 0 0x1000>; 1636 interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>; 1637 clocks = <&cpg CPG_MOD 807>; 1638 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1639 resets = <&cpg 807>; 1640 renesas,id = <4>; 1641 status = "disabled"; 1642 1643 ports { 1644 #address-cells = <1>; 1645 #size-cells = <0>; 1646 1647 port@1 { 1648 #address-cells = <1>; 1649 #size-cells = <0>; 1650 1651 reg = <1>; 1652 1653 vin4csi20: endpoint@0 { 1654 reg = <0>; 1655 remote-endpoint = <&csi20vin4>; 1656 }; 1657 vin4csi40: endpoint@2 { 1658 reg = <2>; 1659 remote-endpoint = <&csi40vin4>; 1660 }; 1661 }; 1662 }; 1663 }; 1664 1665 vin5: video@e6ef5000 { 1666 compatible = "renesas,vin-r8a77961"; 1667 reg = <0 0xe6ef5000 0 0x1000>; 1668 interrupts = <GIC_SPI 175 IRQ_TYPE_LEVEL_HIGH>; 1669 clocks = <&cpg CPG_MOD 806>; 1670 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1671 resets = <&cpg 806>; 1672 renesas,id = <5>; 1673 status = "disabled"; 1674 1675 ports { 1676 #address-cells = <1>; 1677 #size-cells = <0>; 1678 1679 port@1 { 1680 #address-cells = <1>; 1681 #size-cells = <0>; 1682 1683 reg = <1>; 1684 1685 vin5csi20: endpoint@0 { 1686 reg = <0>; 1687 remote-endpoint = <&csi20vin5>; 1688 }; 1689 vin5csi40: endpoint@2 { 1690 reg = <2>; 1691 remote-endpoint = <&csi40vin5>; 1692 }; 1693 }; 1694 }; 1695 }; 1696 1697 vin6: video@e6ef6000 { 1698 compatible = "renesas,vin-r8a77961"; 1699 reg = <0 0xe6ef6000 0 0x1000>; 1700 interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; 1701 clocks = <&cpg CPG_MOD 805>; 1702 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1703 resets = <&cpg 805>; 1704 renesas,id = <6>; 1705 status = "disabled"; 1706 1707 ports { 1708 #address-cells = <1>; 1709 #size-cells = <0>; 1710 1711 port@1 { 1712 #address-cells = <1>; 1713 #size-cells = <0>; 1714 1715 reg = <1>; 1716 1717 vin6csi20: endpoint@0 { 1718 reg = <0>; 1719 remote-endpoint = <&csi20vin6>; 1720 }; 1721 vin6csi40: endpoint@2 { 1722 reg = <2>; 1723 remote-endpoint = <&csi40vin6>; 1724 }; 1725 }; 1726 }; 1727 }; 1728 1729 vin7: video@e6ef7000 { 1730 compatible = "renesas,vin-r8a77961"; 1731 reg = <0 0xe6ef7000 0 0x1000>; 1732 interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; 1733 clocks = <&cpg CPG_MOD 804>; 1734 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1735 resets = <&cpg 804>; 1736 renesas,id = <7>; 1737 status = "disabled"; 1738 1739 ports { 1740 #address-cells = <1>; 1741 #size-cells = <0>; 1742 1743 port@1 { 1744 #address-cells = <1>; 1745 #size-cells = <0>; 1746 1747 reg = <1>; 1748 1749 vin7csi20: endpoint@0 { 1750 reg = <0>; 1751 remote-endpoint = <&csi20vin7>; 1752 }; 1753 vin7csi40: endpoint@2 { 1754 reg = <2>; 1755 remote-endpoint = <&csi40vin7>; 1756 }; 1757 }; 1758 }; 1759 }; 1760 1761 rcar_sound: sound@ec500000 { 1762 /* 1763 * #sound-dai-cells is required if simple-card 1764 * 1765 * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; 1766 * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; 1767 */ 1768 /* 1769 * #clock-cells is required for audio_clkout0/1/2/3 1770 * 1771 * clkout : #clock-cells = <0>; <&rcar_sound>; 1772 * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; 1773 */ 1774 compatible = "renesas,rcar_sound-r8a77961", "renesas,rcar_sound-gen3"; 1775 reg = <0 0xec500000 0 0x1000>, /* SCU */ 1776 <0 0xec5a0000 0 0x100>, /* ADG */ 1777 <0 0xec540000 0 0x1000>, /* SSIU */ 1778 <0 0xec541000 0 0x280>, /* SSI */ 1779 <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ 1780 reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; 1781 1782 clocks = <&cpg CPG_MOD 1005>, 1783 <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>, 1784 <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>, 1785 <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>, 1786 <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>, 1787 <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>, 1788 <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>, 1789 <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>, 1790 <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>, 1791 <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>, 1792 <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>, 1793 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1794 <&cpg CPG_MOD 1020>, <&cpg CPG_MOD 1021>, 1795 <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, 1796 <&audio_clk_a>, <&audio_clk_b>, 1797 <&audio_clk_c>, 1798 <&cpg CPG_MOD 922>; 1799 clock-names = "ssi-all", 1800 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1801 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1802 "ssi.1", "ssi.0", 1803 "src.9", "src.8", "src.7", "src.6", 1804 "src.5", "src.4", "src.3", "src.2", 1805 "src.1", "src.0", 1806 "mix.1", "mix.0", 1807 "ctu.1", "ctu.0", 1808 "dvc.0", "dvc.1", 1809 "clk_a", "clk_b", "clk_c", "clk_i"; 1810 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 1811 resets = <&cpg 1005>, 1812 <&cpg 1006>, <&cpg 1007>, 1813 <&cpg 1008>, <&cpg 1009>, 1814 <&cpg 1010>, <&cpg 1011>, 1815 <&cpg 1012>, <&cpg 1013>, 1816 <&cpg 1014>, <&cpg 1015>; 1817 reset-names = "ssi-all", 1818 "ssi.9", "ssi.8", "ssi.7", "ssi.6", 1819 "ssi.5", "ssi.4", "ssi.3", "ssi.2", 1820 "ssi.1", "ssi.0"; 1821 status = "disabled"; 1822 1823 rcar_sound,ctu { 1824 ctu00: ctu-0 { }; 1825 ctu01: ctu-1 { }; 1826 ctu02: ctu-2 { }; 1827 ctu03: ctu-3 { }; 1828 ctu10: ctu-4 { }; 1829 ctu11: ctu-5 { }; 1830 ctu12: ctu-6 { }; 1831 ctu13: ctu-7 { }; 1832 }; 1833 1834 rcar_sound,dvc { 1835 dvc0: dvc-0 { 1836 dmas = <&audma1 0xbc>; 1837 dma-names = "tx"; 1838 }; 1839 dvc1: dvc-1 { 1840 dmas = <&audma1 0xbe>; 1841 dma-names = "tx"; 1842 }; 1843 }; 1844 1845 rcar_sound,mix { 1846 mix0: mix-0 { }; 1847 mix1: mix-1 { }; 1848 }; 1849 1850 rcar_sound,src { 1851 src0: src-0 { 1852 interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>; 1853 dmas = <&audma0 0x85>, <&audma1 0x9a>; 1854 dma-names = "rx", "tx"; 1855 }; 1856 src1: src-1 { 1857 interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; 1858 dmas = <&audma0 0x87>, <&audma1 0x9c>; 1859 dma-names = "rx", "tx"; 1860 }; 1861 src2: src-2 { 1862 interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; 1863 dmas = <&audma0 0x89>, <&audma1 0x9e>; 1864 dma-names = "rx", "tx"; 1865 }; 1866 src3: src-3 { 1867 interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; 1868 dmas = <&audma0 0x8b>, <&audma1 0xa0>; 1869 dma-names = "rx", "tx"; 1870 }; 1871 src4: src-4 { 1872 interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; 1873 dmas = <&audma0 0x8d>, <&audma1 0xb0>; 1874 dma-names = "rx", "tx"; 1875 }; 1876 src5: src-5 { 1877 interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; 1878 dmas = <&audma0 0x8f>, <&audma1 0xb2>; 1879 dma-names = "rx", "tx"; 1880 }; 1881 src6: src-6 { 1882 interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; 1883 dmas = <&audma0 0x91>, <&audma1 0xb4>; 1884 dma-names = "rx", "tx"; 1885 }; 1886 src7: src-7 { 1887 interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>; 1888 dmas = <&audma0 0x93>, <&audma1 0xb6>; 1889 dma-names = "rx", "tx"; 1890 }; 1891 src8: src-8 { 1892 interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>; 1893 dmas = <&audma0 0x95>, <&audma1 0xb8>; 1894 dma-names = "rx", "tx"; 1895 }; 1896 src9: src-9 { 1897 interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>; 1898 dmas = <&audma0 0x97>, <&audma1 0xba>; 1899 dma-names = "rx", "tx"; 1900 }; 1901 }; 1902 1903 rcar_sound,ssi { 1904 ssi0: ssi-0 { 1905 interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>; 1906 dmas = <&audma0 0x01>, <&audma1 0x02>; 1907 dma-names = "rx", "tx"; 1908 }; 1909 ssi1: ssi-1 { 1910 interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>; 1911 dmas = <&audma0 0x03>, <&audma1 0x04>; 1912 dma-names = "rx", "tx"; 1913 }; 1914 ssi2: ssi-2 { 1915 interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>; 1916 dmas = <&audma0 0x05>, <&audma1 0x06>; 1917 dma-names = "rx", "tx"; 1918 }; 1919 ssi3: ssi-3 { 1920 interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; 1921 dmas = <&audma0 0x07>, <&audma1 0x08>; 1922 dma-names = "rx", "tx"; 1923 }; 1924 ssi4: ssi-4 { 1925 interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>; 1926 dmas = <&audma0 0x09>, <&audma1 0x0a>; 1927 dma-names = "rx", "tx"; 1928 }; 1929 ssi5: ssi-5 { 1930 interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>; 1931 dmas = <&audma0 0x0b>, <&audma1 0x0c>; 1932 dma-names = "rx", "tx"; 1933 }; 1934 ssi6: ssi-6 { 1935 interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>; 1936 dmas = <&audma0 0x0d>, <&audma1 0x0e>; 1937 dma-names = "rx", "tx"; 1938 }; 1939 ssi7: ssi-7 { 1940 interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>; 1941 dmas = <&audma0 0x0f>, <&audma1 0x10>; 1942 dma-names = "rx", "tx"; 1943 }; 1944 ssi8: ssi-8 { 1945 interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>; 1946 dmas = <&audma0 0x11>, <&audma1 0x12>; 1947 dma-names = "rx", "tx"; 1948 }; 1949 ssi9: ssi-9 { 1950 interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>; 1951 dmas = <&audma0 0x13>, <&audma1 0x14>; 1952 dma-names = "rx", "tx"; 1953 }; 1954 }; 1955 1956 rcar_sound,ssiu { 1957 ssiu00: ssiu-0 { 1958 dmas = <&audma0 0x15>, <&audma1 0x16>; 1959 dma-names = "rx", "tx"; 1960 }; 1961 ssiu01: ssiu-1 { 1962 dmas = <&audma0 0x35>, <&audma1 0x36>; 1963 dma-names = "rx", "tx"; 1964 }; 1965 ssiu02: ssiu-2 { 1966 dmas = <&audma0 0x37>, <&audma1 0x38>; 1967 dma-names = "rx", "tx"; 1968 }; 1969 ssiu03: ssiu-3 { 1970 dmas = <&audma0 0x47>, <&audma1 0x48>; 1971 dma-names = "rx", "tx"; 1972 }; 1973 ssiu04: ssiu-4 { 1974 dmas = <&audma0 0x3F>, <&audma1 0x40>; 1975 dma-names = "rx", "tx"; 1976 }; 1977 ssiu05: ssiu-5 { 1978 dmas = <&audma0 0x43>, <&audma1 0x44>; 1979 dma-names = "rx", "tx"; 1980 }; 1981 ssiu06: ssiu-6 { 1982 dmas = <&audma0 0x4F>, <&audma1 0x50>; 1983 dma-names = "rx", "tx"; 1984 }; 1985 ssiu07: ssiu-7 { 1986 dmas = <&audma0 0x53>, <&audma1 0x54>; 1987 dma-names = "rx", "tx"; 1988 }; 1989 ssiu10: ssiu-8 { 1990 dmas = <&audma0 0x49>, <&audma1 0x4a>; 1991 dma-names = "rx", "tx"; 1992 }; 1993 ssiu11: ssiu-9 { 1994 dmas = <&audma0 0x4B>, <&audma1 0x4C>; 1995 dma-names = "rx", "tx"; 1996 }; 1997 ssiu12: ssiu-10 { 1998 dmas = <&audma0 0x57>, <&audma1 0x58>; 1999 dma-names = "rx", "tx"; 2000 }; 2001 ssiu13: ssiu-11 { 2002 dmas = <&audma0 0x59>, <&audma1 0x5A>; 2003 dma-names = "rx", "tx"; 2004 }; 2005 ssiu14: ssiu-12 { 2006 dmas = <&audma0 0x5F>, <&audma1 0x60>; 2007 dma-names = "rx", "tx"; 2008 }; 2009 ssiu15: ssiu-13 { 2010 dmas = <&audma0 0xC3>, <&audma1 0xC4>; 2011 dma-names = "rx", "tx"; 2012 }; 2013 ssiu16: ssiu-14 { 2014 dmas = <&audma0 0xC7>, <&audma1 0xC8>; 2015 dma-names = "rx", "tx"; 2016 }; 2017 ssiu17: ssiu-15 { 2018 dmas = <&audma0 0xCB>, <&audma1 0xCC>; 2019 dma-names = "rx", "tx"; 2020 }; 2021 ssiu20: ssiu-16 { 2022 dmas = <&audma0 0x63>, <&audma1 0x64>; 2023 dma-names = "rx", "tx"; 2024 }; 2025 ssiu21: ssiu-17 { 2026 dmas = <&audma0 0x67>, <&audma1 0x68>; 2027 dma-names = "rx", "tx"; 2028 }; 2029 ssiu22: ssiu-18 { 2030 dmas = <&audma0 0x6B>, <&audma1 0x6C>; 2031 dma-names = "rx", "tx"; 2032 }; 2033 ssiu23: ssiu-19 { 2034 dmas = <&audma0 0x6D>, <&audma1 0x6E>; 2035 dma-names = "rx", "tx"; 2036 }; 2037 ssiu24: ssiu-20 { 2038 dmas = <&audma0 0xCF>, <&audma1 0xCE>; 2039 dma-names = "rx", "tx"; 2040 }; 2041 ssiu25: ssiu-21 { 2042 dmas = <&audma0 0xEB>, <&audma1 0xEC>; 2043 dma-names = "rx", "tx"; 2044 }; 2045 ssiu26: ssiu-22 { 2046 dmas = <&audma0 0xED>, <&audma1 0xEE>; 2047 dma-names = "rx", "tx"; 2048 }; 2049 ssiu27: ssiu-23 { 2050 dmas = <&audma0 0xEF>, <&audma1 0xF0>; 2051 dma-names = "rx", "tx"; 2052 }; 2053 ssiu30: ssiu-24 { 2054 dmas = <&audma0 0x6f>, <&audma1 0x70>; 2055 dma-names = "rx", "tx"; 2056 }; 2057 ssiu31: ssiu-25 { 2058 dmas = <&audma0 0x21>, <&audma1 0x22>; 2059 dma-names = "rx", "tx"; 2060 }; 2061 ssiu32: ssiu-26 { 2062 dmas = <&audma0 0x23>, <&audma1 0x24>; 2063 dma-names = "rx", "tx"; 2064 }; 2065 ssiu33: ssiu-27 { 2066 dmas = <&audma0 0x25>, <&audma1 0x26>; 2067 dma-names = "rx", "tx"; 2068 }; 2069 ssiu34: ssiu-28 { 2070 dmas = <&audma0 0x27>, <&audma1 0x28>; 2071 dma-names = "rx", "tx"; 2072 }; 2073 ssiu35: ssiu-29 { 2074 dmas = <&audma0 0x29>, <&audma1 0x2A>; 2075 dma-names = "rx", "tx"; 2076 }; 2077 ssiu36: ssiu-30 { 2078 dmas = <&audma0 0x2B>, <&audma1 0x2C>; 2079 dma-names = "rx", "tx"; 2080 }; 2081 ssiu37: ssiu-31 { 2082 dmas = <&audma0 0x2D>, <&audma1 0x2E>; 2083 dma-names = "rx", "tx"; 2084 }; 2085 ssiu40: ssiu-32 { 2086 dmas = <&audma0 0x71>, <&audma1 0x72>; 2087 dma-names = "rx", "tx"; 2088 }; 2089 ssiu41: ssiu-33 { 2090 dmas = <&audma0 0x17>, <&audma1 0x18>; 2091 dma-names = "rx", "tx"; 2092 }; 2093 ssiu42: ssiu-34 { 2094 dmas = <&audma0 0x19>, <&audma1 0x1A>; 2095 dma-names = "rx", "tx"; 2096 }; 2097 ssiu43: ssiu-35 { 2098 dmas = <&audma0 0x1B>, <&audma1 0x1C>; 2099 dma-names = "rx", "tx"; 2100 }; 2101 ssiu44: ssiu-36 { 2102 dmas = <&audma0 0x1D>, <&audma1 0x1E>; 2103 dma-names = "rx", "tx"; 2104 }; 2105 ssiu45: ssiu-37 { 2106 dmas = <&audma0 0x1F>, <&audma1 0x20>; 2107 dma-names = "rx", "tx"; 2108 }; 2109 ssiu46: ssiu-38 { 2110 dmas = <&audma0 0x31>, <&audma1 0x32>; 2111 dma-names = "rx", "tx"; 2112 }; 2113 ssiu47: ssiu-39 { 2114 dmas = <&audma0 0x33>, <&audma1 0x34>; 2115 dma-names = "rx", "tx"; 2116 }; 2117 ssiu50: ssiu-40 { 2118 dmas = <&audma0 0x73>, <&audma1 0x74>; 2119 dma-names = "rx", "tx"; 2120 }; 2121 ssiu60: ssiu-41 { 2122 dmas = <&audma0 0x75>, <&audma1 0x76>; 2123 dma-names = "rx", "tx"; 2124 }; 2125 ssiu70: ssiu-42 { 2126 dmas = <&audma0 0x79>, <&audma1 0x7a>; 2127 dma-names = "rx", "tx"; 2128 }; 2129 ssiu80: ssiu-43 { 2130 dmas = <&audma0 0x7b>, <&audma1 0x7c>; 2131 dma-names = "rx", "tx"; 2132 }; 2133 ssiu90: ssiu-44 { 2134 dmas = <&audma0 0x7d>, <&audma1 0x7e>; 2135 dma-names = "rx", "tx"; 2136 }; 2137 ssiu91: ssiu-45 { 2138 dmas = <&audma0 0x7F>, <&audma1 0x80>; 2139 dma-names = "rx", "tx"; 2140 }; 2141 ssiu92: ssiu-46 { 2142 dmas = <&audma0 0x81>, <&audma1 0x82>; 2143 dma-names = "rx", "tx"; 2144 }; 2145 ssiu93: ssiu-47 { 2146 dmas = <&audma0 0x83>, <&audma1 0x84>; 2147 dma-names = "rx", "tx"; 2148 }; 2149 ssiu94: ssiu-48 { 2150 dmas = <&audma0 0xA3>, <&audma1 0xA4>; 2151 dma-names = "rx", "tx"; 2152 }; 2153 ssiu95: ssiu-49 { 2154 dmas = <&audma0 0xA5>, <&audma1 0xA6>; 2155 dma-names = "rx", "tx"; 2156 }; 2157 ssiu96: ssiu-50 { 2158 dmas = <&audma0 0xA7>, <&audma1 0xA8>; 2159 dma-names = "rx", "tx"; 2160 }; 2161 ssiu97: ssiu-51 { 2162 dmas = <&audma0 0xA9>, <&audma1 0xAA>; 2163 dma-names = "rx", "tx"; 2164 }; 2165 }; 2166 }; 2167 2168 mlp: mlp@ec520000 { 2169 compatible = "renesas,r8a77961-mlp", 2170 "renesas,rcar-gen3-mlp"; 2171 reg = <0 0xec520000 0 0x800>; 2172 interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, 2173 <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; 2174 clocks = <&cpg CPG_MOD 802>; 2175 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2176 resets = <&cpg 802>; 2177 status = "disabled"; 2178 }; 2179 2180 audma0: dma-controller@ec700000 { 2181 compatible = "renesas,dmac-r8a77961", 2182 "renesas,rcar-dmac"; 2183 reg = <0 0xec700000 0 0x10000>; 2184 interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, 2185 <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, 2186 <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, 2187 <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, 2188 <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, 2189 <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, 2190 <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, 2191 <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, 2192 <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, 2193 <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, 2194 <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, 2195 <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, 2196 <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, 2197 <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, 2198 <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, 2199 <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, 2200 <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; 2201 interrupt-names = "error", 2202 "ch0", "ch1", "ch2", "ch3", 2203 "ch4", "ch5", "ch6", "ch7", 2204 "ch8", "ch9", "ch10", "ch11", 2205 "ch12", "ch13", "ch14", "ch15"; 2206 clocks = <&cpg CPG_MOD 502>; 2207 clock-names = "fck"; 2208 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2209 resets = <&cpg 502>; 2210 #dma-cells = <1>; 2211 dma-channels = <16>; 2212 iommus = <&ipmmu_mp 0>, <&ipmmu_mp 1>, 2213 <&ipmmu_mp 2>, <&ipmmu_mp 3>, 2214 <&ipmmu_mp 4>, <&ipmmu_mp 5>, 2215 <&ipmmu_mp 6>, <&ipmmu_mp 7>, 2216 <&ipmmu_mp 8>, <&ipmmu_mp 9>, 2217 <&ipmmu_mp 10>, <&ipmmu_mp 11>, 2218 <&ipmmu_mp 12>, <&ipmmu_mp 13>, 2219 <&ipmmu_mp 14>, <&ipmmu_mp 15>; 2220 }; 2221 2222 audma1: dma-controller@ec720000 { 2223 compatible = "renesas,dmac-r8a77961", 2224 "renesas,rcar-dmac"; 2225 reg = <0 0xec720000 0 0x10000>; 2226 interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH>, 2227 <GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH>, 2228 <GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH>, 2229 <GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH>, 2230 <GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH>, 2231 <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>, 2232 <GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH>, 2233 <GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH>, 2234 <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>, 2235 <GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH>, 2236 <GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH>, 2237 <GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH>, 2238 <GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH>, 2239 <GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH>, 2240 <GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH>, 2241 <GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH>, 2242 <GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>; 2243 interrupt-names = "error", 2244 "ch0", "ch1", "ch2", "ch3", 2245 "ch4", "ch5", "ch6", "ch7", 2246 "ch8", "ch9", "ch10", "ch11", 2247 "ch12", "ch13", "ch14", "ch15"; 2248 clocks = <&cpg CPG_MOD 501>; 2249 clock-names = "fck"; 2250 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2251 resets = <&cpg 501>; 2252 #dma-cells = <1>; 2253 dma-channels = <16>; 2254 iommus = <&ipmmu_mp 16>, <&ipmmu_mp 17>, 2255 <&ipmmu_mp 18>, <&ipmmu_mp 19>, 2256 <&ipmmu_mp 20>, <&ipmmu_mp 21>, 2257 <&ipmmu_mp 22>, <&ipmmu_mp 23>, 2258 <&ipmmu_mp 24>, <&ipmmu_mp 25>, 2259 <&ipmmu_mp 26>, <&ipmmu_mp 27>, 2260 <&ipmmu_mp 28>, <&ipmmu_mp 29>, 2261 <&ipmmu_mp 30>, <&ipmmu_mp 31>; 2262 }; 2263 2264 xhci0: usb@ee000000 { 2265 compatible = "renesas,xhci-r8a77961", 2266 "renesas,rcar-gen3-xhci"; 2267 reg = <0 0xee000000 0 0xc00>; 2268 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>; 2269 clocks = <&cpg CPG_MOD 328>; 2270 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2271 resets = <&cpg 328>; 2272 status = "disabled"; 2273 }; 2274 2275 usb3_peri0: usb@ee020000 { 2276 compatible = "renesas,r8a77961-usb3-peri", 2277 "renesas,rcar-gen3-usb3-peri"; 2278 reg = <0 0xee020000 0 0x400>; 2279 interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; 2280 clocks = <&cpg CPG_MOD 328>; 2281 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2282 resets = <&cpg 328>; 2283 status = "disabled"; 2284 }; 2285 2286 ohci0: usb@ee080000 { 2287 compatible = "generic-ohci"; 2288 reg = <0 0xee080000 0 0x100>; 2289 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2290 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2291 phys = <&usb2_phy0 1>; 2292 phy-names = "usb"; 2293 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2294 resets = <&cpg 703>, <&cpg 704>; 2295 status = "disabled"; 2296 }; 2297 2298 ohci1: usb@ee0a0000 { 2299 compatible = "generic-ohci"; 2300 reg = <0 0xee0a0000 0 0x100>; 2301 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2302 clocks = <&cpg CPG_MOD 702>; 2303 phys = <&usb2_phy1 1>; 2304 phy-names = "usb"; 2305 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2306 resets = <&cpg 702>; 2307 status = "disabled"; 2308 }; 2309 2310 ehci0: usb@ee080100 { 2311 compatible = "generic-ehci"; 2312 reg = <0 0xee080100 0 0x100>; 2313 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2314 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2315 phys = <&usb2_phy0 2>; 2316 phy-names = "usb"; 2317 companion = <&ohci0>; 2318 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2319 resets = <&cpg 703>, <&cpg 704>; 2320 status = "disabled"; 2321 }; 2322 2323 ehci1: usb@ee0a0100 { 2324 compatible = "generic-ehci"; 2325 reg = <0 0xee0a0100 0 0x100>; 2326 interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>; 2327 clocks = <&cpg CPG_MOD 702>; 2328 phys = <&usb2_phy1 2>; 2329 phy-names = "usb"; 2330 companion = <&ohci1>; 2331 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2332 resets = <&cpg 702>; 2333 status = "disabled"; 2334 }; 2335 2336 usb2_phy0: usb-phy@ee080200 { 2337 compatible = "renesas,usb2-phy-r8a77961", 2338 "renesas,rcar-gen3-usb2-phy"; 2339 reg = <0 0xee080200 0 0x700>; 2340 interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; 2341 clocks = <&cpg CPG_MOD 703>, <&cpg CPG_MOD 704>; 2342 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2343 resets = <&cpg 703>, <&cpg 704>; 2344 #phy-cells = <1>; 2345 status = "disabled"; 2346 }; 2347 2348 usb2_phy1: usb-phy@ee0a0200 { 2349 compatible = "renesas,usb2-phy-r8a77961", 2350 "renesas,rcar-gen3-usb2-phy"; 2351 reg = <0 0xee0a0200 0 0x700>; 2352 clocks = <&cpg CPG_MOD 702>; 2353 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2354 resets = <&cpg 702>; 2355 #phy-cells = <1>; 2356 status = "disabled"; 2357 }; 2358 2359 sdhi0: mmc@ee100000 { 2360 compatible = "renesas,sdhi-r8a77961", 2361 "renesas,rcar-gen3-sdhi"; 2362 reg = <0 0xee100000 0 0x2000>; 2363 interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; 2364 clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77961_CLK_SD0H>; 2365 clock-names = "core", "clkh"; 2366 max-frequency = <200000000>; 2367 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2368 resets = <&cpg 314>; 2369 iommus = <&ipmmu_ds1 32>; 2370 status = "disabled"; 2371 }; 2372 2373 sdhi1: mmc@ee120000 { 2374 compatible = "renesas,sdhi-r8a77961", 2375 "renesas,rcar-gen3-sdhi"; 2376 reg = <0 0xee120000 0 0x2000>; 2377 interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; 2378 clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77961_CLK_SD1H>; 2379 clock-names = "core", "clkh"; 2380 max-frequency = <200000000>; 2381 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2382 resets = <&cpg 313>; 2383 iommus = <&ipmmu_ds1 33>; 2384 status = "disabled"; 2385 }; 2386 2387 sdhi2: mmc@ee140000 { 2388 compatible = "renesas,sdhi-r8a77961", 2389 "renesas,rcar-gen3-sdhi"; 2390 reg = <0 0xee140000 0 0x2000>; 2391 interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>; 2392 clocks = <&cpg CPG_MOD 312>, <&cpg CPG_CORE R8A77961_CLK_SD2H>; 2393 clock-names = "core", "clkh"; 2394 max-frequency = <200000000>; 2395 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2396 resets = <&cpg 312>; 2397 iommus = <&ipmmu_ds1 34>; 2398 status = "disabled"; 2399 }; 2400 2401 sdhi3: mmc@ee160000 { 2402 compatible = "renesas,sdhi-r8a77961", 2403 "renesas,rcar-gen3-sdhi"; 2404 reg = <0 0xee160000 0 0x2000>; 2405 interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; 2406 clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77961_CLK_SD3H>; 2407 clock-names = "core", "clkh"; 2408 max-frequency = <200000000>; 2409 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2410 resets = <&cpg 311>; 2411 iommus = <&ipmmu_ds1 35>; 2412 status = "disabled"; 2413 }; 2414 2415 rpc: spi@ee200000 { 2416 compatible = "renesas,r8a77961-rpc-if", 2417 "renesas,rcar-gen3-rpc-if"; 2418 reg = <0 0xee200000 0 0x200>, 2419 <0 0x08000000 0 0x04000000>, 2420 <0 0xee208000 0 0x100>; 2421 reg-names = "regs", "dirmap", "wbuf"; 2422 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; 2423 clocks = <&cpg CPG_MOD 917>; 2424 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2425 resets = <&cpg 917>; 2426 #address-cells = <1>; 2427 #size-cells = <0>; 2428 status = "disabled"; 2429 }; 2430 2431 gic: interrupt-controller@f1010000 { 2432 compatible = "arm,gic-400"; 2433 #interrupt-cells = <3>; 2434 #address-cells = <0>; 2435 interrupt-controller; 2436 reg = <0x0 0xf1010000 0 0x1000>, 2437 <0x0 0xf1020000 0 0x20000>, 2438 <0x0 0xf1040000 0 0x20000>, 2439 <0x0 0xf1060000 0 0x20000>; 2440 interrupts = <GIC_PPI 9 2441 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_HIGH)>; 2442 clocks = <&cpg CPG_MOD 408>; 2443 clock-names = "clk"; 2444 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2445 resets = <&cpg 408>; 2446 }; 2447 2448 pciec0: pcie@fe000000 { 2449 compatible = "renesas,pcie-r8a77961", 2450 "renesas,pcie-rcar-gen3"; 2451 reg = <0 0xfe000000 0 0x80000>; 2452 #address-cells = <3>; 2453 #size-cells = <2>; 2454 bus-range = <0x00 0xff>; 2455 device_type = "pci"; 2456 ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, 2457 <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, 2458 <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, 2459 <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; 2460 /* Map all possible DDR/IOMMU as inbound ranges */ 2461 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2462 interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, 2463 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, 2464 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 2465 #interrupt-cells = <1>; 2466 interrupt-map-mask = <0 0 0 0>; 2467 interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>; 2468 clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>; 2469 clock-names = "pcie", "pcie_bus"; 2470 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2471 resets = <&cpg 319>; 2472 iommu-map = <0 &ipmmu_hc 0 1>; 2473 iommu-map-mask = <0>; 2474 status = "disabled"; 2475 }; 2476 2477 pciec1: pcie@ee800000 { 2478 compatible = "renesas,pcie-r8a77961", 2479 "renesas,pcie-rcar-gen3"; 2480 reg = <0 0xee800000 0 0x80000>; 2481 #address-cells = <3>; 2482 #size-cells = <2>; 2483 bus-range = <0x00 0xff>; 2484 device_type = "pci"; 2485 ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000>, 2486 <0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000>, 2487 <0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000>, 2488 <0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>; 2489 /* Map all possible DDR/IOMMU as inbound ranges */ 2490 dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; 2491 interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, 2492 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>, 2493 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>; 2494 #interrupt-cells = <1>; 2495 interrupt-map-mask = <0 0 0 0>; 2496 interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>; 2497 clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>; 2498 clock-names = "pcie", "pcie_bus"; 2499 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2500 resets = <&cpg 318>; 2501 iommu-map = <0 &ipmmu_hc 1 1>; 2502 iommu-map-mask = <0>; 2503 status = "disabled"; 2504 }; 2505 2506 fcpf0: fcp@fe950000 { 2507 compatible = "renesas,fcpf"; 2508 reg = <0 0xfe950000 0 0x200>; 2509 clocks = <&cpg CPG_MOD 615>; 2510 power-domains = <&sysc R8A77961_PD_A3VC>; 2511 resets = <&cpg 615>; 2512 iommus = <&ipmmu_vc0 16>; 2513 }; 2514 2515 fcpvb0: fcp@fe96f000 { 2516 compatible = "renesas,fcpv"; 2517 reg = <0 0xfe96f000 0 0x200>; 2518 clocks = <&cpg CPG_MOD 607>; 2519 power-domains = <&sysc R8A77961_PD_A3VC>; 2520 resets = <&cpg 607>; 2521 iommus = <&ipmmu_vi0 5>; 2522 }; 2523 2524 fcpvi0: fcp@fe9af000 { 2525 compatible = "renesas,fcpv"; 2526 reg = <0 0xfe9af000 0 0x200>; 2527 clocks = <&cpg CPG_MOD 611>; 2528 power-domains = <&sysc R8A77961_PD_A3VC>; 2529 resets = <&cpg 611>; 2530 iommus = <&ipmmu_vc0 19>; 2531 }; 2532 2533 fcpvd0: fcp@fea27000 { 2534 compatible = "renesas,fcpv"; 2535 reg = <0 0xfea27000 0 0x200>; 2536 clocks = <&cpg CPG_MOD 603>; 2537 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2538 resets = <&cpg 603>; 2539 iommus = <&ipmmu_vi0 8>; 2540 }; 2541 2542 fcpvd1: fcp@fea2f000 { 2543 compatible = "renesas,fcpv"; 2544 reg = <0 0xfea2f000 0 0x200>; 2545 clocks = <&cpg CPG_MOD 602>; 2546 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2547 resets = <&cpg 602>; 2548 iommus = <&ipmmu_vi0 9>; 2549 }; 2550 2551 fcpvd2: fcp@fea37000 { 2552 compatible = "renesas,fcpv"; 2553 reg = <0 0xfea37000 0 0x200>; 2554 clocks = <&cpg CPG_MOD 601>; 2555 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2556 resets = <&cpg 601>; 2557 iommus = <&ipmmu_vi0 10>; 2558 }; 2559 2560 vspb: vsp@fe960000 { 2561 compatible = "renesas,vsp2"; 2562 reg = <0 0xfe960000 0 0x8000>; 2563 interrupts = <GIC_SPI 266 IRQ_TYPE_LEVEL_HIGH>; 2564 clocks = <&cpg CPG_MOD 626>; 2565 power-domains = <&sysc R8A77961_PD_A3VC>; 2566 resets = <&cpg 626>; 2567 2568 renesas,fcp = <&fcpvb0>; 2569 }; 2570 2571 vspd0: vsp@fea20000 { 2572 compatible = "renesas,vsp2"; 2573 reg = <0 0xfea20000 0 0x5000>; 2574 interrupts = <GIC_SPI 466 IRQ_TYPE_LEVEL_HIGH>; 2575 clocks = <&cpg CPG_MOD 623>; 2576 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2577 resets = <&cpg 623>; 2578 2579 renesas,fcp = <&fcpvd0>; 2580 }; 2581 2582 vspd1: vsp@fea28000 { 2583 compatible = "renesas,vsp2"; 2584 reg = <0 0xfea28000 0 0x5000>; 2585 interrupts = <GIC_SPI 467 IRQ_TYPE_LEVEL_HIGH>; 2586 clocks = <&cpg CPG_MOD 622>; 2587 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2588 resets = <&cpg 622>; 2589 2590 renesas,fcp = <&fcpvd1>; 2591 }; 2592 2593 vspd2: vsp@fea30000 { 2594 compatible = "renesas,vsp2"; 2595 reg = <0 0xfea30000 0 0x5000>; 2596 interrupts = <GIC_SPI 468 IRQ_TYPE_LEVEL_HIGH>; 2597 clocks = <&cpg CPG_MOD 621>; 2598 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2599 resets = <&cpg 621>; 2600 2601 renesas,fcp = <&fcpvd2>; 2602 }; 2603 2604 vspi0: vsp@fe9a0000 { 2605 compatible = "renesas,vsp2"; 2606 reg = <0 0xfe9a0000 0 0x8000>; 2607 interrupts = <GIC_SPI 444 IRQ_TYPE_LEVEL_HIGH>; 2608 clocks = <&cpg CPG_MOD 631>; 2609 power-domains = <&sysc R8A77961_PD_A3VC>; 2610 resets = <&cpg 631>; 2611 2612 renesas,fcp = <&fcpvi0>; 2613 }; 2614 2615 csi20: csi2@fea80000 { 2616 compatible = "renesas,r8a77961-csi2"; 2617 reg = <0 0xfea80000 0 0x10000>; 2618 interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>; 2619 clocks = <&cpg CPG_MOD 714>; 2620 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2621 resets = <&cpg 714>; 2622 status = "disabled"; 2623 2624 ports { 2625 #address-cells = <1>; 2626 #size-cells = <0>; 2627 2628 port@0 { 2629 reg = <0>; 2630 }; 2631 2632 port@1 { 2633 #address-cells = <1>; 2634 #size-cells = <0>; 2635 2636 reg = <1>; 2637 2638 csi20vin0: endpoint@0 { 2639 reg = <0>; 2640 remote-endpoint = <&vin0csi20>; 2641 }; 2642 csi20vin1: endpoint@1 { 2643 reg = <1>; 2644 remote-endpoint = <&vin1csi20>; 2645 }; 2646 csi20vin2: endpoint@2 { 2647 reg = <2>; 2648 remote-endpoint = <&vin2csi20>; 2649 }; 2650 csi20vin3: endpoint@3 { 2651 reg = <3>; 2652 remote-endpoint = <&vin3csi20>; 2653 }; 2654 csi20vin4: endpoint@4 { 2655 reg = <4>; 2656 remote-endpoint = <&vin4csi20>; 2657 }; 2658 csi20vin5: endpoint@5 { 2659 reg = <5>; 2660 remote-endpoint = <&vin5csi20>; 2661 }; 2662 csi20vin6: endpoint@6 { 2663 reg = <6>; 2664 remote-endpoint = <&vin6csi20>; 2665 }; 2666 csi20vin7: endpoint@7 { 2667 reg = <7>; 2668 remote-endpoint = <&vin7csi20>; 2669 }; 2670 }; 2671 }; 2672 }; 2673 2674 csi40: csi2@feaa0000 { 2675 compatible = "renesas,r8a77961-csi2"; 2676 reg = <0 0xfeaa0000 0 0x10000>; 2677 interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; 2678 clocks = <&cpg CPG_MOD 716>; 2679 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2680 resets = <&cpg 716>; 2681 status = "disabled"; 2682 2683 ports { 2684 #address-cells = <1>; 2685 #size-cells = <0>; 2686 2687 port@0 { 2688 reg = <0>; 2689 }; 2690 2691 port@1 { 2692 #address-cells = <1>; 2693 #size-cells = <0>; 2694 2695 reg = <1>; 2696 2697 csi40vin0: endpoint@0 { 2698 reg = <0>; 2699 remote-endpoint = <&vin0csi40>; 2700 }; 2701 csi40vin1: endpoint@1 { 2702 reg = <1>; 2703 remote-endpoint = <&vin1csi40>; 2704 }; 2705 csi40vin2: endpoint@2 { 2706 reg = <2>; 2707 remote-endpoint = <&vin2csi40>; 2708 }; 2709 csi40vin3: endpoint@3 { 2710 reg = <3>; 2711 remote-endpoint = <&vin3csi40>; 2712 }; 2713 csi40vin4: endpoint@4 { 2714 reg = <4>; 2715 remote-endpoint = <&vin4csi40>; 2716 }; 2717 csi40vin5: endpoint@5 { 2718 reg = <5>; 2719 remote-endpoint = <&vin5csi40>; 2720 }; 2721 csi40vin6: endpoint@6 { 2722 reg = <6>; 2723 remote-endpoint = <&vin6csi40>; 2724 }; 2725 csi40vin7: endpoint@7 { 2726 reg = <7>; 2727 remote-endpoint = <&vin7csi40>; 2728 }; 2729 }; 2730 2731 }; 2732 }; 2733 2734 hdmi0: hdmi@fead0000 { 2735 compatible = "renesas,r8a77961-hdmi", "renesas,rcar-gen3-hdmi"; 2736 reg = <0 0xfead0000 0 0x10000>; 2737 interrupts = <GIC_SPI 389 IRQ_TYPE_LEVEL_HIGH>; 2738 clocks = <&cpg CPG_MOD 729>, <&cpg CPG_CORE R8A77961_CLK_HDMI>; 2739 clock-names = "iahb", "isfr"; 2740 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2741 resets = <&cpg 729>; 2742 status = "disabled"; 2743 2744 ports { 2745 #address-cells = <1>; 2746 #size-cells = <0>; 2747 port@0 { 2748 reg = <0>; 2749 dw_hdmi0_in: endpoint { 2750 remote-endpoint = <&du_out_hdmi0>; 2751 }; 2752 }; 2753 port@1 { 2754 reg = <1>; 2755 }; 2756 port@2 { 2757 /* HDMI sound */ 2758 reg = <2>; 2759 }; 2760 }; 2761 }; 2762 2763 du: display@feb00000 { 2764 compatible = "renesas,du-r8a77961"; 2765 reg = <0 0xfeb00000 0 0x70000>; 2766 interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, 2767 <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>, 2768 <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>; 2769 clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>, 2770 <&cpg CPG_MOD 722>; 2771 clock-names = "du.0", "du.1", "du.2"; 2772 resets = <&cpg 724>, <&cpg 722>; 2773 reset-names = "du.0", "du.2"; 2774 2775 renesas,vsps = <&vspd0 0>, <&vspd1 0>, <&vspd2 0>; 2776 status = "disabled"; 2777 2778 ports { 2779 #address-cells = <1>; 2780 #size-cells = <0>; 2781 2782 port@0 { 2783 reg = <0>; 2784 }; 2785 port@1 { 2786 reg = <1>; 2787 du_out_hdmi0: endpoint { 2788 remote-endpoint = <&dw_hdmi0_in>; 2789 }; 2790 }; 2791 port@2 { 2792 reg = <2>; 2793 du_out_lvds0: endpoint { 2794 remote-endpoint = <&lvds0_in>; 2795 }; 2796 }; 2797 }; 2798 }; 2799 2800 lvds0: lvds@feb90000 { 2801 compatible = "renesas,r8a77961-lvds"; 2802 reg = <0 0xfeb90000 0 0x14>; 2803 clocks = <&cpg CPG_MOD 727>; 2804 power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; 2805 resets = <&cpg 727>; 2806 status = "disabled"; 2807 2808 ports { 2809 #address-cells = <1>; 2810 #size-cells = <0>; 2811 2812 port@0 { 2813 reg = <0>; 2814 lvds0_in: endpoint { 2815 remote-endpoint = <&du_out_lvds0>; 2816 }; 2817 }; 2818 port@1 { 2819 reg = <1>; 2820 }; 2821 }; 2822 }; 2823 2824 prr: chipid@fff00044 { 2825 compatible = "renesas,prr"; 2826 reg = <0 0xfff00044 0 4>; 2827 bootph-all; 2828 }; 2829 }; 2830 2831 thermal-zones { 2832 sensor1_thermal: sensor1-thermal { 2833 polling-delay-passive = <250>; 2834 polling-delay = <1000>; 2835 thermal-sensors = <&tsc 0>; 2836 sustainable-power = <3874>; 2837 2838 trips { 2839 sensor1_crit: sensor1-crit { 2840 temperature = <120000>; 2841 hysteresis = <1000>; 2842 type = "critical"; 2843 }; 2844 }; 2845 }; 2846 2847 sensor2_thermal: sensor2-thermal { 2848 polling-delay-passive = <250>; 2849 polling-delay = <1000>; 2850 thermal-sensors = <&tsc 1>; 2851 sustainable-power = <3874>; 2852 2853 trips { 2854 sensor2_crit: sensor2-crit { 2855 temperature = <120000>; 2856 hysteresis = <1000>; 2857 type = "critical"; 2858 }; 2859 }; 2860 }; 2861 2862 sensor3_thermal: sensor3-thermal { 2863 polling-delay-passive = <250>; 2864 polling-delay = <1000>; 2865 thermal-sensors = <&tsc 2>; 2866 sustainable-power = <3874>; 2867 2868 cooling-maps { 2869 map0 { 2870 trip = <&target>; 2871 cooling-device = <&a57_0 2 4>; 2872 contribution = <1024>; 2873 }; 2874 map1 { 2875 trip = <&target>; 2876 cooling-device = <&a53_0 0 2>; 2877 contribution = <1024>; 2878 }; 2879 }; 2880 trips { 2881 target: trip-point1 { 2882 temperature = <100000>; 2883 hysteresis = <1000>; 2884 type = "passive"; 2885 }; 2886 2887 sensor3_crit: sensor3-crit { 2888 temperature = <120000>; 2889 hysteresis = <1000>; 2890 type = "critical"; 2891 }; 2892 }; 2893 }; 2894 }; 2895 2896 timer { 2897 compatible = "arm,armv8-timer"; 2898 interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2899 <&gic GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2900 <&gic GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, 2901 <&gic GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>; 2902 interrupt-names = "sec-phys", "phys", "virt", "hyp-phys"; 2903 }; 2904 2905 /* External USB clocks - can be overridden by the board */ 2906 usb3s0_clk: usb3s0 { 2907 compatible = "fixed-clock"; 2908 #clock-cells = <0>; 2909 clock-frequency = <0>; 2910 }; 2911 2912 usb_extal_clk: usb_extal { 2913 compatible = "fixed-clock"; 2914 #clock-cells = <0>; 2915 clock-frequency = <0>; 2916 }; 2917}; 2918