1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright 2022 Toradex
4 */
5
6#include "imx8qm-apalis-v1.1.dtsi"
7
8/ {
9	model = "Toradex Apalis iMX8QM";
10};
11
12&ethphy0 {
13	interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
14};
15
16/*
17 * Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver
18 * doesn't support setting internal PHY delay for TXC line for
19 * this PHY model. Use delay on MAC side instead.
20 */
21&fec1 {
22	phy-mode = "rgmii-rxid";
23};
24
25/* TODO: Apalis HDMI1 */
26
27/* Apalis I2C2 (DDC) */
28&i2c0 {
29	pinctrl-names = "default";
30	pinctrl-0 = <&pinctrl_lpi2c0>;
31	#address-cells = <1>;
32	#size-cells = <0>;
33	clock-frequency = <100000>;
34};
35
36&lsio_gpio0 {
37	gpio-line-names = "MXM3_279",
38			  "MXM3_277",
39			  "MXM3_135",
40			  "MXM3_203",
41			  "MXM3_201",
42			  "MXM3_275",
43			  "MXM3_110",
44			  "MXM3_120",
45			  "MXM3_1/GPIO1",
46			  "MXM3_3/GPIO2",
47			  "MXM3_124",
48			  "MXM3_122",
49			  "MXM3_5/GPIO3",
50			  "MXM3_7/GPIO4",
51			  "",
52			  "",
53			  "MXM3_4",
54			  "MXM3_211",
55			  "MXM3_209",
56			  "MXM3_2",
57			  "MXM3_136",
58			  "MXM3_134",
59			  "MXM3_6",
60			  "MXM3_8",
61			  "MXM3_112",
62			  "MXM3_118",
63			  "MXM3_114",
64			  "MXM3_116";
65};
66
67&lsio_gpio1 {
68	gpio-line-names = "",
69			  "",
70			  "",
71			  "",
72			  "MXM3_286",
73			  "",
74			  "MXM3_87",
75			  "MXM3_99",
76			  "MXM3_138",
77			  "MXM3_140",
78			  "MXM3_239",
79			  "",
80			  "MXM3_281",
81			  "MXM3_283",
82			  "MXM3_126",
83			  "MXM3_132",
84			  "",
85			  "",
86			  "",
87			  "",
88			  "MXM3_173",
89			  "MXM3_175",
90			  "MXM3_123";
91};
92
93&lsio_gpio2 {
94	gpio-line-names = "",
95			  "",
96			  "",
97			  "",
98			  "",
99			  "",
100			  "",
101			  "MXM3_198",
102			  "MXM3_35",
103			  "MXM3_164",
104			  "",
105			  "",
106			  "",
107			  "",
108			  "MXM3_217",
109			  "MXM3_215",
110			  "",
111			  "",
112			  "MXM3_193",
113			  "MXM3_194",
114			  "MXM3_37",
115			  "",
116			  "MXM3_271",
117			  "MXM3_273",
118			  "MXM3_195",
119			  "MXM3_197",
120			  "MXM3_177",
121			  "MXM3_179",
122			  "MXM3_181",
123			  "MXM3_183",
124			  "MXM3_185",
125			  "MXM3_187";
126};
127
128&lsio_gpio3 {
129	gpio-line-names = "MXM3_191",
130			  "",
131			  "MXM3_221",
132			  "MXM3_225",
133			  "MXM3_223",
134			  "MXM3_227",
135			  "MXM3_200",
136			  "MXM3_235",
137			  "MXM3_231",
138			  "MXM3_229",
139			  "MXM3_233",
140			  "MXM3_204",
141			  "MXM3_196",
142			  "",
143			  "MXM3_202",
144			  "",
145			  "",
146			  "",
147			  "MXM3_305",
148			  "MXM3_307",
149			  "MXM3_309",
150			  "MXM3_311",
151			  "MXM3_315",
152			  "MXM3_317",
153			  "MXM3_319",
154			  "MXM3_321",
155			  "MXM3_15/GPIO7",
156			  "MXM3_63",
157			  "MXM3_17/GPIO8",
158			  "MXM3_12",
159			  "MXM3_14",
160			  "MXM3_16";
161};
162
163&lsio_gpio4 {
164	gpio-line-names = "MXM3_18",
165			  "MXM3_11/GPIO5",
166			  "MXM3_13/GPIO6",
167			  "MXM3_274",
168			  "MXM3_84",
169			  "MXM3_262",
170			  "MXM3_96",
171			  "",
172			  "",
173			  "",
174			  "",
175			  "",
176			  "MXM3_190",
177			  "",
178			  "",
179			  "",
180			  "MXM3_269",
181			  "MXM3_251",
182			  "MXM3_253",
183			  "MXM3_295",
184			  "MXM3_299",
185			  "MXM3_301",
186			  "MXM3_297",
187			  "MXM3_293",
188			  "MXM3_291",
189			  "MXM3_289",
190			  "MXM3_287";
191
192	/* Enable pcie root / sata ref clock unconditionally */
193	pcie-sata-hog {
194		gpios = <27 GPIO_ACTIVE_HIGH>;
195	};
196
197};
198
199&lsio_gpio5 {
200	gpio-line-names = "",
201			  "",
202			  "",
203			  "",
204			  "",
205			  "",
206			  "",
207			  "",
208			  "",
209			  "",
210			  "",
211			  "",
212			  "",
213			  "",
214			  "MXM3_150",
215			  "MXM3_160",
216			  "MXM3_162",
217			  "MXM3_144",
218			  "MXM3_146",
219			  "MXM3_148",
220			  "MXM3_152",
221			  "MXM3_156",
222			  "MXM3_158",
223			  "MXM3_159",
224			  "MXM3_184",
225			  "MXM3_180",
226			  "MXM3_186",
227			  "MXM3_188",
228			  "MXM3_176",
229			  "MXM3_178";
230};
231
232&lsio_gpio6 {
233	gpio-line-names = "",
234			  "",
235			  "",
236			  "",
237			  "",
238			  "",
239			  "",
240			  "",
241			  "",
242			  "",
243			  "MXM3_261",
244			  "MXM3_263",
245			  "MXM3_259",
246			  "MXM3_257",
247			  "MXM3_255",
248			  "MXM3_128",
249			  "MXM3_130",
250			  "MXM3_265",
251			  "MXM3_249",
252			  "MXM3_247",
253			  "MXM3_245",
254			  "MXM3_243";
255};
256
257&pinctrl_fec1 {
258	fsl,pins =
259		/* Use pads in 1.8V mode */
260		<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD			0x000014a0>,
261		<IMX8QM_ENET0_MDC_CONN_ENET0_MDC				0x06000020>,
262		<IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO				0x06000020>,
263		<IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL		0x06000020>,
264		<IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC			0x06000020>,
265		<IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0			0x06000020>,
266		<IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1			0x06000020>,
267		<IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2			0x06000020>,
268		<IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3			0x06000020>,
269		<IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC			0x06000020>,
270		<IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL		0x06000020>,
271		<IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0			0x06000020>,
272		<IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1			0x06000020>,
273		<IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2			0x06000020>,
274		<IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3			0x06000020>,
275		<IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	0x06000020>,
276		/* On-module ETH_RESET# */
277		<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11				0x06000020>,
278		/* On-module ETH_INT# */
279		<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05				0x04000060>;
280};
281
282&pinctrl_fec1_sleep {
283	fsl,pins =
284		<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD			0x000014a0>,
285		<IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14				0x04000040>,
286		<IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13				0x04000040>,
287		<IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31			0x04000040>,
288		<IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30				0x04000040>,
289		<IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00			0x04000040>,
290		<IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01			0x04000040>,
291		<IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02			0x04000040>,
292		<IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03			0x04000040>,
293		<IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04				0x04000040>,
294		<IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05			0x04000040>,
295		<IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06			0x04000040>,
296		<IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07			0x04000040>,
297		<IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08			0x04000040>,
298		<IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09			0x04000040>,
299		<IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15			0x04000040>,
300		<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11				0x04000040>,
301		<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05				0x04000040>;
302};
303
304&iomuxc {
305	/* Apalis I2C2 (DDC) */
306	pinctrl_lpi2c0: lpi2c0grp {
307		fsl,pins =
308			<IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL			0x04000022>,
309			<IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA			0x04000022>;
310	};
311};
312
313/* On-module PCIe_CTRL0_CLKREQ */
314&pinctrl_pcie_sata_refclk {
315	fsl,pins =
316		<IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27			0x00000021>;
317};
318
319/* TODO: On-module Wi-Fi */
320
321/* Apalis MMC1 */
322&usdhc2 {
323	/*
324	 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
325	 * issues with certain SD cards, disable 1.8V signaling for now.
326	 */
327	no-1-8-v;
328};
329
330/* Apalis SD1 */
331&usdhc3 {
332	/*
333	 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
334	 * issues with certain SD cards, disable 1.8V signaling for now.
335	 */
336	no-1-8-v;
337};
338