1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for Travese Ten64 (LS1088) board
4 * Based on fsl-ls1088a-rdb.dts
5 * Copyright 2017-2020 NXP
6 * Copyright 2019-2021 Traverse Technologies
7 *
8 * Author: Mathew McBride <matt@traverse.com.au>
9 */
10
11/dts-v1/;
12
13#include "fsl-ls1088a.dtsi"
14
15#include <dt-bindings/gpio/gpio.h>
16#include <dt-bindings/input/input.h>
17
18/ {
19	model = "Traverse Ten64";
20	compatible = "traverse,ten64", "fsl,ls1088a";
21
22	aliases {
23		serial0 = &duart0;
24		serial1 = &duart1;
25	};
26
27	chosen {
28		stdout-path = "serial0:115200n8";
29	};
30
31	buttons {
32		compatible = "gpio-keys";
33
34		/* Fired by system controller when
35		 * external power off (e.g ATX Power Button)
36		 * asserted
37		 */
38		button-powerdn {
39			label = "External Power Down";
40			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
41			linux,code = <KEY_POWER>;
42		};
43
44		/* Rear Panel 'ADMIN' button (GPIO_H) */
45		button-admin {
46			label = "ADMIN button";
47			gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
48			linux,code = <KEY_WPS_BUTTON>;
49		};
50	};
51
52	leds {
53		compatible = "gpio-leds";
54
55		led-0 {
56			label = "ten64:green:sfp1:down";
57			gpios = <&gpio3 11 GPIO_ACTIVE_HIGH>;
58		};
59
60		led-1 {
61			label = "ten64:green:sfp2:up";
62			gpios = <&gpio3 12 GPIO_ACTIVE_HIGH>;
63		};
64
65		led-2 {
66			label = "ten64:admin";
67			gpios = <&sfpgpio 12 GPIO_ACTIVE_HIGH>;
68		};
69	};
70
71	sfp_xg0: dpmac2-sfp {
72		compatible = "sff,sfp";
73		i2c-bus = <&sfplower_i2c>;
74		tx-fault-gpios = <&sfpgpio 0 GPIO_ACTIVE_HIGH>;
75		tx-disable-gpios = <&sfpgpio 1 GPIO_ACTIVE_HIGH>;
76		mod-def0-gpios = <&sfpgpio 2 GPIO_ACTIVE_LOW>;
77		los-gpios = <&sfpgpio 3 GPIO_ACTIVE_HIGH>;
78		maximum-power-milliwatt = <2000>;
79	};
80
81	sfp_xg1: dpmac1-sfp {
82		compatible = "sff,sfp";
83		i2c-bus = <&sfpupper_i2c>;
84		tx-fault-gpios = <&sfpgpio 4 GPIO_ACTIVE_HIGH>;
85		tx-disable-gpios = <&sfpgpio 5 GPIO_ACTIVE_HIGH>;
86		mod-def0-gpios = <&sfpgpio 6 GPIO_ACTIVE_LOW>;
87		los-gpios = <&sfpgpio 7 GPIO_ACTIVE_HIGH>;
88		maximum-power-milliwatt = <2000>;
89	};
90
91	usb1v2_supply: regulator-usbhub-1v2 {
92		compatible = "regulator-fixed";
93		regulator-name = "usbhub_1v2";
94		regulator-min-microvolt = <1200000>;
95		regulator-max-microvolt = <1200000>;
96		regulator-always-on;
97	};
98
99	system3v3_supply: regulator-system-3v3 {
100		compatible = "regulator-fixed";
101		regulator-name = "system_3v3";
102		regulator-min-microvolt = <3300000>;
103		regulator-max-microvolt = <3300000>;
104		regulator-always-on;
105	};
106};
107
108/* XG1 - Upper SFP */
109&dpmac1 {
110	sfp = <&sfp_xg1>;
111	pcs-handle = <&pcs1>;
112	phy-connection-type = "10gbase-r";
113	managed = "in-band-status";
114};
115
116/* XG0 - Lower SFP */
117&dpmac2 {
118	sfp = <&sfp_xg0>;
119	pcs-handle = <&pcs2>;
120	phy-connection-type = "10gbase-r";
121	managed = "in-band-status";
122};
123
124/* DPMAC3..6 is GE4 to GE8 */
125&dpmac3 {
126	phy-handle = <&mdio1_phy5>;
127	phy-connection-type = "qsgmii";
128	managed = "in-band-status";
129	pcs-handle = <&pcs3_0>;
130};
131
132&dpmac4 {
133	phy-handle = <&mdio1_phy6>;
134	phy-connection-type = "qsgmii";
135	managed = "in-band-status";
136	pcs-handle = <&pcs3_1>;
137};
138
139&dpmac5 {
140	phy-handle = <&mdio1_phy7>;
141	phy-connection-type = "qsgmii";
142	managed = "in-band-status";
143	pcs-handle = <&pcs3_2>;
144};
145
146&dpmac6 {
147	phy-handle = <&mdio1_phy8>;
148	phy-connection-type = "qsgmii";
149	managed = "in-band-status";
150	pcs-handle = <&pcs3_3>;
151};
152
153/* DPMAC7..10 is GE0 to GE3 */
154&dpmac7 {
155	phy-handle = <&mdio1_phy1>;
156	phy-connection-type = "qsgmii";
157	managed = "in-band-status";
158	pcs-handle = <&pcs7_0>;
159};
160
161&dpmac8 {
162	phy-handle = <&mdio1_phy2>;
163	phy-connection-type = "qsgmii";
164	managed = "in-band-status";
165	pcs-handle = <&pcs7_1>;
166};
167
168&dpmac9 {
169	phy-handle = <&mdio1_phy3>;
170	phy-connection-type = "qsgmii";
171	managed = "in-band-status";
172	pcs-handle = <&pcs7_2>;
173};
174
175&dpmac10 {
176	phy-handle = <&mdio1_phy4>;
177	phy-connection-type = "qsgmii";
178	managed = "in-band-status";
179	pcs-handle = <&pcs7_3>;
180};
181
182&duart0 {
183	status = "okay";
184};
185
186&duart1 {
187	status = "okay";
188};
189
190&emdio1 {
191	status = "okay";
192
193	mdio1_phy5: ethernet-phy@c {
194		reg = <0xc>;
195	};
196
197	mdio1_phy6: ethernet-phy@d {
198		reg = <0xd>;
199	};
200
201	mdio1_phy7: ethernet-phy@e {
202		reg = <0xe>;
203	};
204
205	mdio1_phy8: ethernet-phy@f {
206		reg = <0xf>;
207	};
208
209	mdio1_phy1: ethernet-phy@1c {
210		reg = <0x1c>;
211	};
212
213	mdio1_phy2: ethernet-phy@1d {
214		reg = <0x1d>;
215	};
216
217	mdio1_phy3: ethernet-phy@1e {
218		reg = <0x1e>;
219	};
220
221	mdio1_phy4: ethernet-phy@1f {
222		reg = <0x1f>;
223	};
224};
225
226&esdhc {
227	status = "okay";
228};
229
230&i2c0 {
231	status = "okay";
232
233	sfpgpio: gpio@76 {
234		compatible = "ti,tca9539";
235		reg = <0x76>;
236		#gpio-cells = <2>;
237		gpio-controller;
238
239		admin-led-lower-hog {
240			gpio-hog;
241			gpios = <13 GPIO_ACTIVE_HIGH>;
242			output-low;
243		};
244	};
245
246	at97sc: tpm@29 {
247		compatible = "atmel,at97sc3204t";
248		reg = <0x29>;
249	};
250
251	usbhub: usb-hub@2d {
252		compatible = "microchip,usb5744";
253		reg = <0x2d>;
254	};
255
256};
257
258&i2c2 {
259	status = "okay";
260
261	rx8035: rtc@32 {
262		compatible = "epson,rx8035";
263		reg = <0x32>;
264	};
265};
266
267&i2c3 {
268	status = "okay";
269
270	i2c-mux@70 {
271		compatible = "nxp,pca9540";
272		#address-cells = <1>;
273		#size-cells = <0>;
274		reg = <0x70>;
275
276		sfpupper_i2c: i2c@0 {
277			#address-cells = <1>;
278			#size-cells = <0>;
279			reg = <0>;
280		};
281
282		sfplower_i2c: i2c@1 {
283			#address-cells = <1>;
284			#size-cells = <0>;
285			reg = <1>;
286		};
287	};
288};
289
290&pcs_mdio1 {
291	status = "okay";
292};
293
294&pcs_mdio2 {
295	status = "okay";
296};
297
298&pcs_mdio3 {
299	status = "okay";
300};
301
302&pcs_mdio7 {
303	status = "okay";
304};
305
306&qspi {
307	status = "okay";
308
309	en25s64: flash@0 {
310		compatible = "jedec,spi-nor";
311		#address-cells = <1>;
312		#size-cells = <1>;
313		reg = <0>;
314		spi-max-frequency = <20000000>;
315		spi-rx-bus-width = <4>;
316		spi-tx-bus-width = <4>;
317
318		partitions {
319			compatible = "fixed-partitions";
320			#address-cells = <1>;
321			#size-cells = <1>;
322
323			partition@0 {
324				label = "bl2";
325				reg = <0 0x100000>;
326			};
327
328			partition@100000 {
329				label = "bl3";
330				reg = <0x100000 0x200000>;
331			};
332
333			partition@300000 {
334				label = "mcfirmware";
335				reg = <0x300000 0x200000>;
336			};
337
338			partition@500000 {
339				label = "ubootenv";
340				reg = <0x500000 0x80000>;
341			};
342
343			partition@580000 {
344				label = "dpl";
345				reg = <0x580000 0x40000>;
346			};
347
348			partition@5c0000 {
349				label = "dpc";
350				reg = <0x5c0000 0x40000>;
351			};
352
353			partition@600000 {
354				label = "devicetree";
355				reg = <0x600000 0x40000>;
356			};
357		};
358	};
359
360	nand: flash@1 {
361		compatible = "spi-nand";
362		#address-cells = <1>;
363		#size-cells = <1>;
364		reg = <1>;
365		spi-max-frequency = <20000000>;
366		spi-rx-bus-width = <4>;
367		spi-tx-bus-width = <4>;
368
369		partitions {
370			compatible = "fixed-partitions";
371			#address-cells = <1>;
372			#size-cells = <1>;
373
374			/* reserved for future boot direct from NAND flash
375			 * (this would use the same layout as the 8MiB NOR flash)
376			 */
377			partition@0 {
378				label = "nand-boot-reserved";
379				reg = <0 0x800000>;
380			};
381
382			/* recovery / install environment */
383			partition@800000 {
384				label = "recovery";
385				reg = <0x800000 0x2000000>;
386			};
387
388			/* ubia (first OpenWrt) - a/b names to prevent confusion with ubi0/1/etc. */
389			partition@2800000 {
390				label = "ubia";
391				reg = <0x2800000 0x6C00000>;
392			};
393
394			/* ubib (second OpenWrt) */
395			partition@9400000 {
396				label = "ubib";
397				reg = <0x9400000 0x6C00000>;
398			};
399		};
400	};
401};
402
403/* LS1088A USB Port 0 - direct to bottom USB-A port */
404&usb0 {
405	status = "okay";
406};
407
408/* LS1088A USB Port 1 - to Microchip USB5744 USB Hub */
409&usb1 {
410	#address-cells = <1>;
411	#size-cells = <0>;
412	status = "okay";
413
414	hub_2_0: hub@1 {
415		compatible = "usb424,2744";
416		reg = <1>;
417		peer-hub = <&hub_3_0>;
418		i2c-bus = <&usbhub>;
419		vdd-supply = <&system3v3_supply>;
420		vdd2-supply = <&usb1v2_supply>;
421	};
422
423	hub_3_0: hub@2 {
424		compatible = "usb424,5744";
425		reg = <2>;
426		peer-hub = <&hub_2_0>;
427		i2c-bus = <&usbhub>;
428		vdd-supply = <&system3v3_supply>;
429		vdd2-supply = <&usb1v2_supply>;
430	};
431};
432