1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2011 - 2014 Xilinx 4 * Copyright (C) 2012 National Instruments Corp. 5 */ 6/dts-v1/; 7#include "zynq-7000.dtsi" 8 9/ { 10 model = "Xilinx ZC706 board"; 11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; 12 13 aliases { 14 ethernet0 = &gem0; 15 i2c0 = &i2c0; 16 serial0 = &uart1; 17 spi0 = &qspi; 18 mmc0 = &sdhci0; 19 nvmem0 = &eeprom; 20 rtc0 = &rtc; 21 }; 22 23 memory@0 { 24 device_type = "memory"; 25 reg = <0x0 0x40000000>; 26 }; 27 28 chosen { 29 bootargs = ""; 30 stdout-path = "serial0:115200n8"; 31 }; 32 33 usb_phy0: phy0 { 34 compatible = "usb-nop-xceiv"; 35 #phy-cells = <0>; 36 }; 37}; 38 39&clkc { 40 ps-clk-frequency = <33333333>; 41}; 42 43&gem0 { 44 status = "okay"; 45 phy-mode = "rgmii-id"; 46 phy-handle = <ðernet_phy>; 47 pinctrl-names = "default"; 48 pinctrl-0 = <&pinctrl_gem0_default>; 49 50 ethernet_phy: ethernet-phy@7 { 51 reg = <7>; 52 }; 53}; 54 55&gpio0 { 56 pinctrl-names = "default"; 57 pinctrl-0 = <&pinctrl_gpio0_default>; 58}; 59 60&i2c0 { 61 status = "okay"; 62 clock-frequency = <400000>; 63 pinctrl-names = "default"; 64 pinctrl-0 = <&pinctrl_i2c0_default>; 65 66 i2c-mux@74 { 67 compatible = "nxp,pca9548"; 68 #address-cells = <1>; 69 #size-cells = <0>; 70 reg = <0x74>; 71 72 i2c@0 { 73 #address-cells = <1>; 74 #size-cells = <0>; 75 reg = <0>; 76 si570: clock-generator@5d { 77 #clock-cells = <0>; 78 compatible = "silabs,si570"; 79 temperature-stability = <50>; 80 reg = <0x5d>; 81 factory-fout = <156250000>; 82 clock-frequency = <148500000>; 83 }; 84 }; 85 86 i2c@1 { 87 #address-cells = <1>; 88 #size-cells = <0>; 89 reg = <1>; 90 adv7511: hdmi-tx@39 { 91 compatible = "adi,adv7511"; 92 reg = <0x39>; 93 adi,input-depth = <8>; 94 adi,input-colorspace = "yuv422"; 95 adi,input-clock = "1x"; 96 adi,input-style = <3>; 97 adi,input-justification = "evenly"; 98 }; 99 }; 100 101 i2c@2 { 102 #address-cells = <1>; 103 #size-cells = <0>; 104 reg = <2>; 105 eeprom: eeprom@54 { 106 compatible = "atmel,24c08"; 107 reg = <0x54>; 108 }; 109 }; 110 111 i2c@3 { 112 #address-cells = <1>; 113 #size-cells = <0>; 114 reg = <3>; 115 gpio@21 { 116 compatible = "ti,tca6416"; 117 reg = <0x21>; 118 gpio-controller; 119 #gpio-cells = <2>; 120 }; 121 }; 122 123 i2c@4 { 124 #address-cells = <1>; 125 #size-cells = <0>; 126 reg = <4>; 127 rtc: rtc@51 { 128 compatible = "nxp,pcf8563"; 129 reg = <0x51>; 130 }; 131 }; 132 133 i2c@7 { 134 #address-cells = <1>; 135 #size-cells = <0>; 136 reg = <7>; 137 ucd90120@65 { 138 compatible = "ti,ucd90120"; 139 reg = <0x65>; 140 }; 141 }; 142 }; 143}; 144 145&pinctrl0 { 146 pinctrl_gem0_default: gem0-default { 147 mux { 148 function = "ethernet0"; 149 groups = "ethernet0_0_grp"; 150 }; 151 152 conf { 153 groups = "ethernet0_0_grp"; 154 slew-rate = <0>; 155 power-source = <4>; 156 }; 157 158 conf-rx { 159 pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27"; 160 bias-high-impedance; 161 low-power-disable; 162 }; 163 164 conf-tx { 165 pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21"; 166 low-power-enable; 167 bias-disable; 168 }; 169 170 mux-mdio { 171 function = "mdio0"; 172 groups = "mdio0_0_grp"; 173 }; 174 175 conf-mdio { 176 groups = "mdio0_0_grp"; 177 slew-rate = <0>; 178 power-source = <1>; 179 bias-disable; 180 }; 181 }; 182 183 pinctrl_gpio0_default: gpio0-default { 184 mux { 185 function = "gpio0"; 186 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp"; 187 }; 188 189 conf { 190 groups = "gpio0_7_grp", "gpio0_46_grp", "gpio0_47_grp"; 191 slew-rate = <0>; 192 power-source = <1>; 193 }; 194 195 conf-pull-up { 196 pins = "MIO46", "MIO47"; 197 bias-pull-up; 198 }; 199 200 conf-pull-none { 201 pins = "MIO7"; 202 bias-disable; 203 }; 204 }; 205 206 pinctrl_i2c0_default: i2c0-default { 207 mux { 208 groups = "i2c0_10_grp"; 209 function = "i2c0"; 210 }; 211 212 conf { 213 groups = "i2c0_10_grp"; 214 bias-pull-up; 215 slew-rate = <0>; 216 power-source = <1>; 217 }; 218 }; 219 220 pinctrl_sdhci0_default: sdhci0-default { 221 mux { 222 groups = "sdio0_2_grp"; 223 function = "sdio0"; 224 }; 225 226 conf { 227 groups = "sdio0_2_grp"; 228 slew-rate = <0>; 229 power-source = <1>; 230 bias-disable; 231 }; 232 233 mux-cd { 234 groups = "gpio0_14_grp"; 235 function = "sdio0_cd"; 236 }; 237 238 conf-cd { 239 groups = "gpio0_14_grp"; 240 bias-high-impedance; 241 bias-pull-up; 242 slew-rate = <0>; 243 power-source = <1>; 244 }; 245 246 mux-wp { 247 groups = "gpio0_15_grp"; 248 function = "sdio0_wp"; 249 }; 250 251 conf-wp { 252 groups = "gpio0_15_grp"; 253 bias-high-impedance; 254 bias-pull-up; 255 slew-rate = <0>; 256 power-source = <1>; 257 }; 258 }; 259 260 pinctrl_uart1_default: uart1-default { 261 mux { 262 groups = "uart1_10_grp"; 263 function = "uart1"; 264 }; 265 266 conf { 267 groups = "uart1_10_grp"; 268 slew-rate = <0>; 269 power-source = <1>; 270 }; 271 272 conf-rx { 273 pins = "MIO49"; 274 bias-high-impedance; 275 }; 276 277 conf-tx { 278 pins = "MIO48"; 279 bias-disable; 280 }; 281 }; 282 283 pinctrl_usb0_default: usb0-default { 284 mux { 285 groups = "usb0_0_grp"; 286 function = "usb0"; 287 }; 288 289 conf { 290 groups = "usb0_0_grp"; 291 slew-rate = <0>; 292 power-source = <1>; 293 }; 294 295 conf-rx { 296 pins = "MIO29", "MIO31", "MIO36"; 297 bias-high-impedance; 298 }; 299 300 conf-tx { 301 pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34", 302 "MIO35", "MIO37", "MIO38", "MIO39"; 303 bias-disable; 304 }; 305 }; 306}; 307 308&qspi { 309 bootph-all; 310 status = "okay"; 311 num-cs = <2>; 312 flash@0 { 313 compatible = "jedec,spi-nor"; 314 reg = <0>, <1>; 315 parallel-memories = /bits/ 64 <0x1000000 0x1000000>; /* 16MB */ 316 spi-tx-bus-width = <1>; 317 spi-rx-bus-width = <4>; 318 spi-max-frequency = <50000000>; 319 partitions { 320 compatible = "fixed-partitions"; 321 #address-cells = <1>; 322 #size-cells = <1>; 323 partition@0 { 324 label = "qspi-fsbl-uboot"; 325 reg = <0x0 0x100000>; 326 }; 327 partition@100000 { 328 label = "qspi-linux"; 329 reg = <0x100000 0x500000>; 330 }; 331 partition@600000 { 332 label = "qspi-device-tree"; 333 reg = <0x600000 0x20000>; 334 }; 335 partition@620000 { 336 label = "qspi-rootfs"; 337 reg = <0x620000 0x5e0000>; 338 }; 339 partition@c00000 { 340 label = "qspi-bitstream"; 341 reg = <0xc00000 0x400000>; 342 }; 343 }; 344 }; 345}; 346 347&sdhci0 { 348 bootph-all; 349 status = "okay"; 350 pinctrl-names = "default"; 351 pinctrl-0 = <&pinctrl_sdhci0_default>; 352}; 353 354&uart1 { 355 bootph-all; 356 status = "okay"; 357 pinctrl-names = "default"; 358 pinctrl-0 = <&pinctrl_uart1_default>; 359}; 360 361&usb0 { 362 status = "okay"; 363 dr_mode = "host"; 364 usb-phy = <&usb_phy0>; 365 pinctrl-names = "default"; 366 pinctrl-0 = <&pinctrl_usb0_default>; 367}; 368