1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2021 Michael Walle <michael@walle.cc>
4 */
5/dts-v1/;
6/include/ "zynq-7000.dtsi"
7
8/ {
9	model = "Ebang EBAZ4205";
10	compatible = "ebang,ebaz4205", "xlnx,zynq-7000";
11
12	aliases {
13		ethernet0 = &gem0;
14		serial0 = &uart1;
15	};
16
17	memory@0 {
18		device_type = "memory";
19		reg = <0x0 0x10000000>;
20	};
21
22	chosen {
23		stdout-path = "serial0:115200n8";
24	};
25};
26
27&clkc {
28	ps-clk-frequency = <33333333>;
29	fclk-enable = <8>;
30};
31
32&gem0 {
33	status = "okay";
34	phy-mode = "mii";
35	phy-handle = <&phy>;
36
37	/* PHY clock */
38	assigned-clocks = <&clkc 18>;
39	assigned-clock-rates = <25000000>;
40
41	phy: ethernet-phy@0 {
42		reg = <0>;
43	};
44};
45
46&gpio0 {
47	pinctrl-names = "default";
48	pinctrl-0 = <&pinctrl_gpio0_default>;
49};
50
51&nfc0 {
52	status = "okay";
53
54	#address-cells = <1>;
55	#size-cells = <0>;
56	nand@0 {
57		reg = <0>;
58	};
59};
60
61&pinctrl0 {
62	pinctrl_gpio0_default: gpio0-default {
63		mux {
64			groups = "gpio0_20_grp", "gpio0_32_grp";
65			function = "gpio0";
66		};
67
68		conf {
69			groups = "gpio0_20_grp", "gpio0_32_grp";
70			io-standard = <3>;
71			slew-rate = <0>;
72		};
73
74		conf-pull-up {
75			pins = "MIO20", "MIO32";
76			bias-disable;
77		};
78	};
79
80	pinctrl_sdhci0_default: sdhci0-default {
81		mux {
82			groups = "sdio0_2_grp";
83			function = "sdio0";
84		};
85
86		conf {
87			groups = "sdio0_2_grp";
88			io-standard = <3>;
89			slew-rate = <0>;
90			bias-disable;
91		};
92
93		mux-cd {
94			groups = "gpio0_34_grp";
95			function = "sdio0_cd";
96		};
97
98		conf-cd {
99			groups = "gpio0_34_grp";
100			io-standard = <3>;
101			slew-rate = <0>;
102			bias-high-impedance;
103			bias-pull-up;
104		};
105	};
106
107	pinctrl_uart1_default: uart1-default {
108		mux {
109			groups = "uart1_4_grp";
110			function = "uart1";
111		};
112
113		conf {
114			groups = "uart1_4_grp";
115			io-standard = <3>;
116			slew-rate = <0>;
117		};
118
119		conf-rx {
120			pins = "MIO25";
121			bias-high-impedance;
122		};
123
124		conf-tx {
125			pins = "MIO24";
126			bias-disable;
127		};
128	};
129};
130
131&smcc {
132	status = "okay";
133};
134
135&sdhci0 {
136	status = "okay";
137	disable-wp;
138	pinctrl-names = "default";
139	pinctrl-0 = <&pinctrl_sdhci0_default>;
140};
141
142&uart1 {
143	status = "okay";
144	pinctrl-names = "default";
145	pinctrl-0 = <&pinctrl_uart1_default>;
146};
147