1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/timer/nxp,sysctr-timer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: NXP System Counter Module(sys_ctr)
8
9maintainers:
10  - Bai Ping <ping.bai@nxp.com>
11
12description: |
13  The system counter(sys_ctr) is a programmable system counter
14  which provides a shared time base to Cortex A15, A7, A53, A73,
15  etc. it is intended for use in applications where the counter
16  is always powered and support multiple, unrelated clocks. The
17  compare frame inside can be used for timer purpose.
18
19properties:
20  compatible:
21    oneOf:
22      - enum:
23          - nxp,imx95-sysctr-timer
24          - nxp,sysctr-timer
25      - items:
26          - enum:
27              - nxp,imx94-sysctr-timer
28          - const: nxp,imx95-sysctr-timer
29
30  reg:
31    maxItems: 1
32
33  interrupts:
34    maxItems: 1
35
36  clocks:
37    maxItems: 1
38
39  clock-names:
40    const: per
41
42  nxp,no-divider:
43    description: if present, means there is no internal base clk divider.
44    type: boolean
45
46required:
47  - compatible
48  - reg
49  - interrupts
50  - clocks
51  - clock-names
52
53additionalProperties: false
54
55examples:
56  - |
57    #include <dt-bindings/interrupt-controller/arm-gic.h>
58
59    timer@306a0000 {
60        compatible = "nxp,sysctr-timer";
61        reg = <0x306a0000 0x20000>;
62        clocks = <&clk_8m>;
63        clock-names = "per";
64        interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
65     };
66