1# SPDX-License-Identifier: (GPL-2.0 OR MIT)
2# Copyright 2019 Linaro Ltd.
3%YAML 1.2
4---
5$id: http://devicetree.org/schemas/thermal/qcom-tsens.yaml#
6$schema: http://devicetree.org/meta-schemas/core.yaml#
7
8title: QCOM SoC Temperature Sensor (TSENS)
9
10maintainers:
11  - Amit Kucheria <amitk@kernel.org>
12
13description: |
14  QCOM SoCs have TSENS IP to allow temperature measurement. There are currently
15  three distinct major versions of the IP that is supported by a single driver.
16  The IP versions are named v0.1, v1 and v2 in the driver, where v0.1 captures
17  everything before v1 when there was no versioning information.
18
19properties:
20  compatible:
21    oneOf:
22      - description: msm8960 TSENS based
23        items:
24          - enum:
25              - qcom,ipq8064-tsens
26              - qcom,msm8960-tsens
27
28      - description: v0.1 of TSENS
29        items:
30          - enum:
31              - qcom,mdm9607-tsens
32              - qcom,msm8226-tsens
33              - qcom,msm8909-tsens
34              - qcom,msm8916-tsens
35              - qcom,msm8939-tsens
36              - qcom,msm8974-tsens
37          - const: qcom,tsens-v0_1
38
39      - description: v1 of TSENS
40        items:
41          - enum:
42              - qcom,msm8937-tsens
43              - qcom,msm8956-tsens
44              - qcom,msm8976-tsens
45              - qcom,qcs404-tsens
46          - const: qcom,tsens-v1
47
48      - description: v2 of TSENS
49        items:
50          - enum:
51              - qcom,msm8953-tsens
52              - qcom,msm8996-tsens
53              - qcom,msm8998-tsens
54              - qcom,qcm2290-tsens
55              - qcom,sa8255p-tsens
56              - qcom,sa8775p-tsens
57              - qcom,sar2130p-tsens
58              - qcom,sc7180-tsens
59              - qcom,sc7280-tsens
60              - qcom,sc8180x-tsens
61              - qcom,sc8280xp-tsens
62              - qcom,sdm630-tsens
63              - qcom,sdm845-tsens
64              - qcom,sm6115-tsens
65              - qcom,sm6350-tsens
66              - qcom,sm6375-tsens
67              - qcom,sm8150-tsens
68              - qcom,sm8250-tsens
69              - qcom,sm8350-tsens
70              - qcom,sm8450-tsens
71              - qcom,sm8550-tsens
72              - qcom,sm8650-tsens
73              - qcom,x1e80100-tsens
74          - const: qcom,tsens-v2
75
76      - description: v2 of TSENS with combined interrupt
77        enum:
78          - qcom,ipq5332-tsens
79          - qcom,ipq5424-tsens
80          - qcom,ipq8074-tsens
81
82      - description: v2 of TSENS with combined interrupt
83        items:
84          - enum:
85              - qcom,ipq6018-tsens
86              - qcom,ipq9574-tsens
87          - const: qcom,ipq8074-tsens
88
89  reg:
90    items:
91      - description: TM registers
92      - description: SROT registers
93
94  interrupts:
95    minItems: 1
96    maxItems: 2
97
98  interrupt-names:
99    minItems: 1
100    maxItems: 2
101
102  nvmem-cells:
103    oneOf:
104      - minItems: 1
105        maxItems: 2
106        description:
107          Reference to an nvmem node for the calibration data
108      - minItems: 5
109        maxItems: 35
110        description: |
111          Reference to nvmem cells for the calibration mode, two calibration
112          bases and two cells per each sensor
113        # special case for msm8974 / apq8084
114      - maxItems: 51
115        description: |
116          Reference to nvmem cells for the calibration mode, two calibration
117          bases and two cells per each sensor, main and backup copies, plus use_backup cell
118
119  nvmem-cell-names:
120    oneOf:
121      - minItems: 1
122        items:
123          - const: calib
124          - enum:
125              - calib_backup
126              - calib_sel
127      - minItems: 5
128        items:
129          - const: mode
130          - const: base1
131          - const: base2
132          - pattern: '^s[0-9]+_p1$'
133          - pattern: '^s[0-9]+_p2$'
134          - pattern: '^s[0-9]+_p1$'
135          - pattern: '^s[0-9]+_p2$'
136          - pattern: '^s[0-9]+_p1$'
137          - pattern: '^s[0-9]+_p2$'
138          - pattern: '^s[0-9]+_p1$'
139          - pattern: '^s[0-9]+_p2$'
140          - pattern: '^s[0-9]+_p1$'
141          - pattern: '^s[0-9]+_p2$'
142          - pattern: '^s[0-9]+_p1$'
143          - pattern: '^s[0-9]+_p2$'
144          - pattern: '^s[0-9]+_p1$'
145          - pattern: '^s[0-9]+_p2$'
146          - pattern: '^s[0-9]+_p1$'
147          - pattern: '^s[0-9]+_p2$'
148          - pattern: '^s[0-9]+_p1$'
149          - pattern: '^s[0-9]+_p2$'
150          - pattern: '^s[0-9]+_p1$'
151          - pattern: '^s[0-9]+_p2$'
152          - pattern: '^s[0-9]+_p1$'
153          - pattern: '^s[0-9]+_p2$'
154          - pattern: '^s[0-9]+_p1$'
155          - pattern: '^s[0-9]+_p2$'
156          - pattern: '^s[0-9]+_p1$'
157          - pattern: '^s[0-9]+_p2$'
158          - pattern: '^s[0-9]+_p1$'
159          - pattern: '^s[0-9]+_p2$'
160          - pattern: '^s[0-9]+_p1$'
161          - pattern: '^s[0-9]+_p2$'
162          - pattern: '^s[0-9]+_p1$'
163          - pattern: '^s[0-9]+_p2$'
164        # special case for msm8974 / apq8084
165      - items:
166          - const: mode
167          - const: base1
168          - const: base2
169          - const: use_backup
170          - const: mode_backup
171          - const: base1_backup
172          - const: base2_backup
173          - const: s0_p1
174          - const: s0_p2
175          - const: s1_p1
176          - const: s1_p2
177          - const: s2_p1
178          - const: s2_p2
179          - const: s3_p1
180          - const: s3_p2
181          - const: s4_p1
182          - const: s4_p2
183          - const: s5_p1
184          - const: s5_p2
185          - const: s6_p1
186          - const: s6_p2
187          - const: s7_p1
188          - const: s7_p2
189          - const: s8_p1
190          - const: s8_p2
191          - const: s9_p1
192          - const: s9_p2
193          - const: s10_p1
194          - const: s10_p2
195          - const: s0_p1_backup
196          - const: s0_p2_backup
197          - const: s1_p1_backup
198          - const: s1_p2_backup
199          - const: s2_p1_backup
200          - const: s2_p2_backup
201          - const: s3_p1_backup
202          - const: s3_p2_backup
203          - const: s4_p1_backup
204          - const: s4_p2_backup
205          - const: s5_p1_backup
206          - const: s5_p2_backup
207          - const: s6_p1_backup
208          - const: s6_p2_backup
209          - const: s7_p1_backup
210          - const: s7_p2_backup
211          - const: s8_p1_backup
212          - const: s8_p2_backup
213          - const: s9_p1_backup
214          - const: s9_p2_backup
215          - const: s10_p1_backup
216          - const: s10_p2_backup
217      - minItems: 8
218        items:
219          - const: mode
220          - const: base0
221          - const: base1
222          - pattern: '^tsens_sens[0-9]+_off$'
223          - pattern: '^tsens_sens[0-9]+_off$'
224          - pattern: '^tsens_sens[0-9]+_off$'
225          - pattern: '^tsens_sens[0-9]+_off$'
226          - pattern: '^tsens_sens[0-9]+_off$'
227          - pattern: '^tsens_sens[0-9]+_off$'
228          - pattern: '^tsens_sens[0-9]+_off$'
229
230  "#qcom,sensors":
231    description:
232      Number of sensors enabled on this platform
233    $ref: /schemas/types.yaml#/definitions/uint32
234    minimum: 1
235    maximum: 16
236
237  "#thermal-sensor-cells":
238    const: 1
239
240required:
241  - compatible
242  - interrupts
243  - interrupt-names
244  - "#qcom,sensors"
245
246allOf:
247  - $ref: thermal-sensor.yaml#
248
249  - if:
250      properties:
251        compatible:
252          contains:
253            enum:
254              - qcom,ipq8064-tsens
255              - qcom,msm8960-tsens
256              - qcom,tsens-v0_1
257              - qcom,tsens-v1
258    then:
259      properties:
260        interrupts:
261          items:
262            - description: Combined interrupt if upper or lower threshold crossed
263        interrupt-names:
264          items:
265            - const: uplow
266
267  - if:
268      properties:
269        compatible:
270          contains:
271            const: qcom,tsens-v2
272    then:
273      properties:
274        interrupts:
275          items:
276            - description: Combined interrupt if upper or lower threshold crossed
277            - description: Interrupt if critical threshold crossed
278        interrupt-names:
279          items:
280            - const: uplow
281            - const: critical
282
283  - if:
284      properties:
285        compatible:
286          contains:
287            enum:
288              - qcom,ipq5332-tsens
289              - qcom,ipq5424-tsens
290              - qcom,ipq8074-tsens
291    then:
292      properties:
293        interrupts:
294          items:
295            - description: Combined interrupt if upper, lower or critical thresholds crossed
296        interrupt-names:
297          items:
298            - const: combined
299
300  - if:
301      properties:
302        compatible:
303          contains:
304            enum:
305              - qcom,ipq5332-tsens
306              - qcom,ipq5424-tsens
307              - qcom,ipq8074-tsens
308              - qcom,tsens-v0_1
309              - qcom,tsens-v1
310              - qcom,tsens-v2
311
312    then:
313      required:
314        - reg
315
316unevaluatedProperties: false
317
318examples:
319  - |
320    #include <dt-bindings/interrupt-controller/arm-gic.h>
321    thermal-sensor {
322        compatible = "qcom,ipq8064-tsens";
323
324        nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
325        nvmem-cell-names = "calib", "calib_backup";
326        interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
327        interrupt-names = "uplow";
328
329        #qcom,sensors = <11>;
330        #thermal-sensor-cells = <1>;
331    };
332
333  - |
334    #include <dt-bindings/interrupt-controller/arm-gic.h>
335    // Example 1 (new calibration data: for pre v1 IP):
336    thermal-sensor@4a9000 {
337        compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
338        reg = <0x4a9000 0x1000>, /* TM */
339              <0x4a8000 0x1000>; /* SROT */
340
341        nvmem-cells = <&tsens_mode>,
342                      <&tsens_base1>, <&tsens_base2>,
343                      <&tsens_s0_p1>, <&tsens_s0_p2>,
344                      <&tsens_s1_p1>, <&tsens_s1_p2>,
345                      <&tsens_s2_p1>, <&tsens_s2_p2>,
346                      <&tsens_s4_p1>, <&tsens_s4_p2>,
347                      <&tsens_s5_p1>, <&tsens_s5_p2>;
348        nvmem-cell-names = "mode",
349                           "base1", "base2",
350                           "s0_p1", "s0_p2",
351                           "s1_p1", "s1_p2",
352                           "s2_p1", "s2_p2",
353                           "s4_p1", "s4_p2",
354                           "s5_p1", "s5_p2";
355
356        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
357        interrupt-names = "uplow";
358
359        #qcom,sensors = <5>;
360        #thermal-sensor-cells = <1>;
361    };
362
363  - |
364    #include <dt-bindings/interrupt-controller/arm-gic.h>
365    // Example 1 (legacy: for pre v1 IP):
366    tsens1: thermal-sensor@4a9000 {
367        compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";
368        reg = <0x4a9000 0x1000>, /* TM */
369              <0x4a8000 0x1000>; /* SROT */
370
371        nvmem-cells = <&tsens_caldata>, <&tsens_calsel>;
372        nvmem-cell-names = "calib", "calib_sel";
373
374        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
375        interrupt-names = "uplow";
376
377        #qcom,sensors = <5>;
378        #thermal-sensor-cells = <1>;
379    };
380
381  - |
382    #include <dt-bindings/interrupt-controller/arm-gic.h>
383    // Example 2 (for any platform containing v1 of the TSENS IP):
384    tsens2: thermal-sensor@4a9000 {
385        compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
386        reg = <0x004a9000 0x1000>, /* TM */
387              <0x004a8000 0x1000>; /* SROT */
388
389        nvmem-cells = <&tsens_caldata>;
390        nvmem-cell-names = "calib";
391
392        interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>;
393        interrupt-names = "uplow";
394
395        #qcom,sensors = <10>;
396        #thermal-sensor-cells = <1>;
397    };
398
399  - |
400    #include <dt-bindings/interrupt-controller/arm-gic.h>
401    // Example 3 (for any platform containing v2 of the TSENS IP):
402    tsens3: thermal-sensor@c263000 {
403        compatible = "qcom,sdm845-tsens", "qcom,tsens-v2";
404        reg = <0xc263000 0x1ff>,
405              <0xc222000 0x1ff>;
406
407        interrupts = <GIC_SPI 506 IRQ_TYPE_LEVEL_HIGH>,
408                     <GIC_SPI 508 IRQ_TYPE_LEVEL_HIGH>;
409        interrupt-names = "uplow", "critical";
410
411        #qcom,sensors = <13>;
412        #thermal-sensor-cells = <1>;
413    };
414
415  - |
416    #include <dt-bindings/interrupt-controller/arm-gic.h>
417    // Example 4 (for any IPQ8074 based SoC-s):
418    tsens4: thermal-sensor@4a9000 {
419        compatible = "qcom,ipq8074-tsens";
420        reg = <0x4a9000 0x1000>,
421              <0x4a8000 0x1000>;
422
423        interrupts = <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>;
424        interrupt-names = "combined";
425
426        #qcom,sensors = <16>;
427        #thermal-sensor-cells = <1>;
428    };
429...
430