1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/st,stm32mp25-ospi.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 Octal Serial Peripheral Interface (OSPI)
8
9maintainers:
10  - Patrice Chotard <patrice.chotard@foss.st.com>
11
12allOf:
13  - $ref: spi-controller.yaml#
14
15properties:
16  compatible:
17    const: st,stm32mp25-ospi
18
19  reg:
20    maxItems: 1
21
22  memory-region:
23    description:
24      Memory region to be used for memory-map read access.
25      In memory-mapped mode, read access are performed from the memory
26      device using the direct mapping.
27    maxItems: 1
28
29  clocks:
30    maxItems: 1
31
32  interrupts:
33    maxItems: 1
34
35  resets:
36    items:
37      - description: phandle to OSPI block reset
38      - description: phandle to delay block reset
39
40  dmas:
41    maxItems: 2
42
43  dma-names:
44    items:
45      - const: tx
46      - const: rx
47
48  st,syscfg-dlyb:
49    description: configure OCTOSPI delay block.
50    $ref: /schemas/types.yaml#/definitions/phandle-array
51    items:
52      - description: phandle to syscfg
53      - description: register offset within syscfg
54
55  access-controllers:
56    description: phandle to the rifsc device to check access right
57      and in some cases, an additional phandle to the rcc device for
58      secure clock control.
59    items:
60      - description: phandle to bus controller
61      - description: phandle to clock controller
62    minItems: 1
63
64  power-domains:
65    maxItems: 1
66
67required:
68  - compatible
69  - reg
70  - clocks
71  - interrupts
72  - st,syscfg-dlyb
73
74unevaluatedProperties: false
75
76examples:
77  - |
78    #include <dt-bindings/clock/st,stm32mp25-rcc.h>
79    #include <dt-bindings/interrupt-controller/arm-gic.h>
80    #include <dt-bindings/reset/st,stm32mp25-rcc.h>
81
82    spi@40430000 {
83      compatible = "st,stm32mp25-ospi";
84      reg = <0x40430000 0x400>;
85      memory-region = <&mm_ospi1>;
86      interrupts = <GIC_SPI 163 IRQ_TYPE_LEVEL_HIGH>;
87      dmas = <&hpdma 2 0x62 0x00003121 0x0>,
88             <&hpdma 2 0x42 0x00003112 0x0>;
89      dma-names = "tx", "rx";
90      clocks = <&scmi_clk CK_SCMI_OSPI1>;
91      resets = <&scmi_reset RST_SCMI_OSPI1>, <&scmi_reset RST_SCMI_OSPI1DLL>;
92      access-controllers = <&rifsc 74>;
93      power-domains = <&CLUSTER_PD>;
94      st,syscfg-dlyb = <&syscfg 0x1000>;
95
96      #address-cells = <1>;
97      #size-cells = <0>;
98
99      flash@0 {
100        compatible = "jedec,spi-nor";
101        reg = <0>;
102        spi-rx-bus-width = <4>;
103        spi-max-frequency = <108000000>;
104      };
105    };
106