1# SPDX-License-Identifier: GPL-2.0
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/spi/spi-rockchip.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Rockchip SPI Controller
8
9description:
10  The Rockchip SPI controller is used to interface with various devices such
11  as flash and display controllers using the SPI communication interface.
12
13allOf:
14  - $ref: spi-controller.yaml#
15
16maintainers:
17  - Heiko Stuebner <heiko@sntech.de>
18
19# Everything else is described in the common file
20properties:
21  compatible:
22    oneOf:
23      - const: rockchip,rk3036-spi
24      - const: rockchip,rk3066-spi
25      - const: rockchip,rk3228-spi
26      - const: rockchip,rv1108-spi
27      - items:
28          - enum:
29              - rockchip,px30-spi
30              - rockchip,rk3128-spi
31              - rockchip,rk3188-spi
32              - rockchip,rk3288-spi
33              - rockchip,rk3308-spi
34              - rockchip,rk3328-spi
35              - rockchip,rk3368-spi
36              - rockchip,rk3399-spi
37              - rockchip,rk3562-spi
38              - rockchip,rk3568-spi
39              - rockchip,rk3576-spi
40              - rockchip,rk3588-spi
41              - rockchip,rv1126-spi
42          - const: rockchip,rk3066-spi
43
44  reg:
45    maxItems: 1
46
47  interrupts:
48    maxItems: 1
49
50  clocks:
51    items:
52      - description: transfer-clock
53      - description: peripheral clock
54
55  clock-names:
56    items:
57      - const: spiclk
58      - const: apb_pclk
59
60  dmas:
61    items:
62      - description: TX DMA Channel
63      - description: RX DMA Channel
64
65  dma-names:
66    items:
67      - const: tx
68      - const: rx
69
70  rx-sample-delay-ns:
71    default: 0
72    description:
73      Nano seconds to delay after the SCLK edge before sampling Rx data
74      (may need to be fine tuned for high capacitance lines).
75      If not specified 0 will be used.
76
77  pinctrl-names:
78    minItems: 1
79    items:
80      - const: default
81      - const: sleep
82    description:
83      Names for the pin configuration(s); may be "default" or "sleep",
84      where the "sleep" configuration may describe the state
85      the pins should be in during system suspend.
86
87  power-domains:
88    maxItems: 1
89
90required:
91  - compatible
92  - reg
93  - interrupts
94  - clocks
95  - clock-names
96
97unevaluatedProperties: false
98
99examples:
100  - |
101    #include <dt-bindings/clock/rk3188-cru-common.h>
102    #include <dt-bindings/interrupt-controller/arm-gic.h>
103    #include <dt-bindings/interrupt-controller/irq.h>
104    spi0: spi@ff110000 {
105      compatible = "rockchip,rk3066-spi";
106      reg = <0xff110000 0x1000>;
107      interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
108      clocks = <&cru SCLK_SPI0>, <&cru PCLK_SPI0>;
109      clock-names = "spiclk", "apb_pclk";
110      dmas = <&pdma1 11>, <&pdma1 12>;
111      dma-names = "tx", "rx";
112      pinctrl-0 = <&spi1_pins>;
113      pinctrl-1 = <&spi1_sleep>;
114      pinctrl-names = "default", "sleep";
115      rx-sample-delay-ns = <10>;
116      #address-cells = <1>;
117      #size-cells = <0>;
118    };
119