1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/spi/adi,axi-spi-engine.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: Analog Devices AXI SPI Engine Controller 8 9description: | 10 The AXI SPI Engine controller is part of the SPI Engine framework[1] and 11 allows memory mapped access to the SPI Engine control bus. This allows it 12 to be used as a general purpose software driven SPI controller as well as 13 some optional advanced acceleration and offloading capabilities. 14 15 [1] https://wiki.analog.com/resources/fpga/peripherals/spi_engine 16 17maintainers: 18 - Michael Hennerich <Michael.Hennerich@analog.com> 19 - Nuno Sá <nuno.sa@analog.com> 20 21allOf: 22 - $ref: /schemas/spi/spi-controller.yaml# 23 24properties: 25 compatible: 26 const: adi,axi-spi-engine-1.00.a 27 28 reg: 29 maxItems: 1 30 31 interrupts: 32 maxItems: 1 33 34 clocks: 35 items: 36 - description: The AXI interconnect clock. 37 - description: The SPI controller clock. 38 39 clock-names: 40 items: 41 - const: s_axi_aclk 42 - const: spi_clk 43 44 trigger-sources: 45 description: 46 An array of trigger source phandles for offload instances. The index in 47 the array corresponds to the offload instance number. 48 minItems: 1 49 maxItems: 32 50 51 dmas: 52 description: 53 DMA channels connected to the input or output stream interface of an 54 offload instance. 55 minItems: 1 56 maxItems: 32 57 58 dma-names: 59 items: 60 pattern: "^offload(?:[12]?[0-9]|3[01])-[tr]x$" 61 minItems: 1 62 maxItems: 32 63 64required: 65 - compatible 66 - reg 67 - interrupts 68 - clocks 69 - clock-names 70 71unevaluatedProperties: false 72 73examples: 74 - | 75 spi@44a00000 { 76 compatible = "adi,axi-spi-engine-1.00.a"; 77 reg = <0x44a00000 0x1000>; 78 interrupts = <0 56 4>; 79 clocks = <&clkc 15>, <&clkc 15>; 80 clock-names = "s_axi_aclk", "spi_clk"; 81 82 trigger-sources = <&trigger_clock>; 83 dmas = <&dma 0>; 84 dma-names = "offload0-rx"; 85 86 #address-cells = <1>; 87 #size-cells = <0>; 88 89 /* SPI devices */ 90 }; 91