1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: STMicroelectronics STM32 Timers
8
9description: |
10  This hardware block provides 3 types of timer along with PWM functionality:
11    - advanced-control timers consist of a 16-bit auto-reload counter driven
12      by a programmable prescaler, break input feature, PWM outputs and
13      complementary PWM outputs channels.
14    - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15      driven by a programmable prescaler and PWM outputs.
16    - basic timers consist of a 16-bit auto-reload counter driven by a
17      programmable prescaler.
18
19maintainers:
20  - Fabrice Gasnier <fabrice.gasnier@foss.st.com>
21
22properties:
23  compatible:
24    enum:
25      - st,stm32-timers
26      - st,stm32mp25-timers
27
28  reg:
29    maxItems: 1
30
31  clocks:
32    maxItems: 1
33
34  clock-names:
35    items:
36      - const: int
37
38  resets:
39    maxItems: 1
40
41  power-domains:
42    maxItems: 1
43
44  dmas:
45    minItems: 1
46    maxItems: 7
47
48  dma-names:
49    items:
50      enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
51    minItems: 1
52    maxItems: 7
53
54  interrupts:
55    oneOf:
56      - maxItems: 1
57      - maxItems: 4
58
59  interrupt-names:
60    oneOf:
61      - items:
62          - const: global
63      - items:
64          - const: brk
65          - const: up
66          - const: trg-com
67          - const: cc
68
69  "#address-cells":
70    const: 1
71
72  "#size-cells":
73    const: 0
74
75  access-controllers:
76    minItems: 1
77    maxItems: 2
78
79  pwm:
80    type: object
81    additionalProperties: false
82
83    properties:
84      compatible:
85        enum:
86          - st,stm32-pwm
87          - st,stm32mp25-pwm
88
89      "#pwm-cells":
90        const: 3
91
92      st,breakinput:
93        description:
94          One or two <index level filter> to describe break input
95          configurations.
96        $ref: /schemas/types.yaml#/definitions/uint32-matrix
97        items:
98          items:
99            - description: |
100                "index" indicates on which break input (0 or 1) the
101                configuration should be applied.
102              enum: [0, 1]
103            - description: |
104                "level" gives the active level (0=low or 1=high) of the
105                input signal for this configuration
106              enum: [0, 1]
107            - description: |
108                "filter" gives the filtering value (up to 15) to be applied.
109              maximum: 15
110        minItems: 1
111        maxItems: 2
112
113    required:
114      - "#pwm-cells"
115      - compatible
116
117  counter:
118    type: object
119    additionalProperties: false
120
121    properties:
122      compatible:
123        enum:
124          - st,stm32-timer-counter
125          - st,stm32mp25-timer-counter
126
127    required:
128      - compatible
129
130patternProperties:
131  "^timer@[0-9]+$":
132    type: object
133    additionalProperties: false
134
135    properties:
136      compatible:
137        enum:
138          - st,stm32-timer-trigger
139          - st,stm32h7-timer-trigger
140          - st,stm32mp25-timer-trigger
141
142      reg:
143        description: Identify trigger hardware block.
144        items:
145          minimum: 0
146          maximum: 19
147
148    required:
149      - compatible
150      - reg
151
152required:
153  - compatible
154  - reg
155  - clocks
156  - clock-names
157
158additionalProperties: false
159
160examples:
161  - |
162    #include <dt-bindings/clock/stm32mp1-clks.h>
163    timers2: timer@40000000 {
164      #address-cells = <1>;
165      #size-cells = <0>;
166      compatible = "st,stm32-timers";
167      reg = <0x40000000 0x400>;
168      clocks = <&rcc TIM2_K>;
169      clock-names = "int";
170      dmas = <&dmamux1 18 0x400 0x1>,
171             <&dmamux1 19 0x400 0x1>,
172             <&dmamux1 20 0x400 0x1>,
173             <&dmamux1 21 0x400 0x1>,
174             <&dmamux1 22 0x400 0x1>;
175      dma-names = "ch1", "ch2", "ch3", "ch4", "up";
176      pwm {
177        compatible = "st,stm32-pwm";
178        #pwm-cells = <3>;
179        st,breakinput = <0 1 5>;
180      };
181      timer@1 {
182        compatible = "st,stm32-timer-trigger";
183        reg = <1>;
184      };
185      counter {
186        compatible = "st,stm32-timer-counter";
187      };
188    };
189
190...
191