1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/interrupt-controller/fsl,irqsteer.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Freescale IRQSTEER Interrupt Multiplexer
8
9maintainers:
10  - Lucas Stach <l.stach@pengutronix.de>
11
12properties:
13  compatible:
14    oneOf:
15      - const: fsl,imx-irqsteer
16      - items:
17          - enum:
18              - fsl,imx8m-irqsteer
19              - fsl,imx8mp-irqsteer
20              - fsl,imx8qm-irqsteer
21              - fsl,imx8qxp-irqsteer
22              - fsl,imx94-irqsteer
23          - const: fsl,imx-irqsteer
24
25  reg:
26    maxItems: 1
27
28  interrupts:
29    description: |
30      should contain the up to 8 parent interrupt lines used to multiplex
31      the input interrupts. They should be specified sequentially from
32      output 0 to 7.
33    items:
34      - description: output interrupt 0
35      - description: output interrupt 1
36      - description: output interrupt 2
37      - description: output interrupt 3
38      - description: output interrupt 4
39      - description: output interrupt 5
40      - description: output interrupt 6
41      - description: output interrupt 7
42    minItems: 1
43
44  clocks:
45    maxItems: 1
46
47  clock-names:
48    const: ipg
49
50  power-domains:
51    maxItems: 1
52
53  interrupt-controller: true
54
55  "#interrupt-cells":
56    const: 1
57
58  fsl,channel:
59    $ref: /schemas/types.yaml#/definitions/uint32
60    description: |
61      u32 value representing the output channel that all input IRQs should be
62      steered into.
63
64  fsl,num-irqs:
65    $ref: /schemas/types.yaml#/definitions/uint32
66    description: |
67      u32 value representing the number of input interrupts of this channel,
68      should be multiple of 32 input interrupts and up to 512 interrupts.
69
70required:
71  - compatible
72  - reg
73  - interrupts
74  - clocks
75  - clock-names
76  - interrupt-controller
77  - "#interrupt-cells"
78  - fsl,channel
79  - fsl,num-irqs
80
81allOf:
82  - if:
83      properties:
84        compatible:
85          contains:
86            enum:
87              - fsl,imx8mp-irqsteer
88              - fsl,imx8qm-irqsteer
89              - fsl,imx8qxp-irqsteer
90    then:
91      required:
92        - power-domains
93    else:
94      properties:
95        power-domains: false
96
97additionalProperties: false
98
99examples:
100  - |
101    #include <dt-bindings/clock/imx8mq-clock.h>
102    #include <dt-bindings/interrupt-controller/arm-gic.h>
103
104    interrupt-controller@32e2d000 {
105        compatible = "fsl,imx-irqsteer";
106        reg = <0x32e2d000 0x1000>;
107        interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
108        clocks = <&clk IMX8MQ_CLK_DISP_APB_ROOT>;
109        clock-names = "ipg";
110        fsl,channel = <0>;
111        fsl,num-irqs = <64>;
112        interrupt-controller;
113        #interrupt-cells = <1>;
114    };
115