1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/ti,omap4-i2c.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: I2C controllers on TI's OMAP and K3 SoCs
8
9maintainers:
10  - Vignesh Raghavendra <vigneshr@ti.com>
11
12properties:
13  compatible:
14    oneOf:
15      - enum:
16          - ti,omap2420-i2c
17          - ti,omap2430-i2c
18          - ti,omap3-i2c
19          - ti,omap4-i2c
20      - items:
21          - enum:
22              - ti,am4372-i2c
23              - ti,am64-i2c
24              - ti,am654-i2c
25              - ti,j721e-i2c
26          - const: ti,omap4-i2c
27
28  reg:
29    maxItems: 1
30
31  interrupts:
32    maxItems: 1
33
34  clocks:
35    maxItems: 1
36
37  clock-names:
38    const: fck
39
40  power-domains: true
41
42  ti,hwmods:
43    description:
44      Must be "i2c<n>", n being the instance number (1-based).
45      This property is applicable only on legacy platforms mainly omap2/3
46      and ti81xx and should not be used on other platforms.
47    $ref: /schemas/types.yaml#/definitions/string
48    deprecated: true
49
50  mux-states:
51    description:
52      mux controller node to route the I2C signals from SoC to clients.
53    maxItems: 1
54
55required:
56  - compatible
57  - reg
58  - interrupts
59
60allOf:
61  - $ref: /schemas/i2c/i2c-controller.yaml#
62
63  - if:
64      properties:
65        compatible:
66          enum:
67            - ti,omap2420-i2c
68            - ti,omap2430-i2c
69            - ti,omap3-i2c
70            - ti,omap4-i2c
71
72    then:
73      properties:
74        ti,hwmods:
75          items:
76            - pattern: "^i2c([1-9])$"
77
78    else:
79      properties:
80        ti,hwmods: false
81
82unevaluatedProperties: false
83
84examples:
85  - |
86    #include <dt-bindings/interrupt-controller/irq.h>
87    #include <dt-bindings/interrupt-controller/arm-gic.h>
88
89    main_i2c0: i2c@2000000 {
90        compatible = "ti,j721e-i2c", "ti,omap4-i2c";
91        reg = <0x2000000 0x100>;
92        interrupts = <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>;
93        #address-cells = <1>;
94        #size-cells = <0>;
95        mux-states = <&i2c_mux 1>;
96    };
97