1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2%YAML 1.2
3---
4$id: http://devicetree.org/schemas/i2c/i2c-exynos5.yaml#
5$schema: http://devicetree.org/meta-schemas/core.yaml#
6
7title: Samsung's High Speed I2C controller
8
9maintainers:
10  - Krzysztof Kozlowski <krzk@kernel.org>
11
12description: |
13  The Samsung's High Speed I2C controller is used to interface with I2C devices
14  at various speeds ranging from 100kHz to 3.4MHz.
15
16  In case the HSI2C controller is encapsulated within USI block (it's the case
17  e.g. for Exynos850 and Exynos Auto V9 SoCs), it might be also necessary to
18  define USI node in device tree file, choosing "i2c" configuration. Please see
19  Documentation/devicetree/bindings/soc/samsung/exynos-usi.yaml for details.
20
21properties:
22  compatible:
23    oneOf:
24      - enum:
25          - samsung,exynos5250-hsi2c    # Exynos5250 and Exynos5420
26          - samsung,exynos5260-hsi2c    # Exynos5260
27          - samsung,exynos7-hsi2c       # Exynos7
28          - samsung,exynos8895-hsi2c
29          - samsung,exynosautov9-hsi2c
30      - items:
31          - enum:
32              - samsung,exynos5433-hsi2c
33              - samsung,exynos7870-hsi2c
34              - tesla,fsd-hsi2c
35          - const: samsung,exynos7-hsi2c
36      - items:
37          - enum:
38              - google,gs101-hsi2c
39              - samsung,exynos850-hsi2c
40          - const: samsung,exynosautov9-hsi2c
41      - const: samsung,exynos5-hsi2c    # Exynos5250 and Exynos5420
42        deprecated: true
43
44  reg:
45    maxItems: 1
46
47  interrupts:
48    maxItems: 1
49
50  clock-frequency:
51    default: 100000
52    description:
53      Desired operating frequency in Hz of the bus.
54
55      If not specified, the bus operates in fast-speed mode at 100kHz.
56
57      If specified, the bus operates in high-speed mode only if the
58      clock-frequency is >= 1MHz.
59
60  clocks:
61    minItems: 1
62    items:
63      - description: I2C operating clock
64      - description: Bus clock (APB)
65
66  clock-names:
67    minItems: 1
68    items:
69      - const: hsi2c
70      - const: hsi2c_pclk
71
72required:
73  - compatible
74  - reg
75  - interrupts
76  - clocks
77
78allOf:
79  - $ref: /schemas/i2c/i2c-controller.yaml#
80  - if:
81      properties:
82        compatible:
83          contains:
84            enum:
85              - samsung,exynosautov9-hsi2c
86
87    then:
88      properties:
89        clocks:
90          minItems: 2
91
92        clock-names:
93          minItems: 2
94
95      required:
96        - clock-names
97
98    else:
99      properties:
100        clocks:
101          maxItems: 1
102
103unevaluatedProperties: false
104
105examples:
106  - |
107    #include <dt-bindings/clock/exynos5420.h>
108    #include <dt-bindings/interrupt-controller/arm-gic.h>
109    #include <dt-bindings/interrupt-controller/irq.h>
110
111    hsi2c_8: i2c@12e00000 {
112        compatible = "samsung,exynos5250-hsi2c";
113        reg = <0x12e00000 0x1000>;
114        interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
115        #address-cells = <1>;
116        #size-cells = <0>;
117        clock-frequency = <100000>;
118        clocks = <&clock CLK_USI4>;
119        clock-names = "hsi2c";
120
121        pmic@66 {
122            /* compatible = "samsung,s2mps11-pmic"; */
123            reg = <0x66>;
124        };
125    };
126
127  - |
128    #include <dt-bindings/clock/exynos850.h>
129    #include <dt-bindings/interrupt-controller/arm-gic.h>
130
131    hsi2c_2: i2c@138c0000 {
132        compatible = "samsung,exynosautov9-hsi2c";
133        reg = <0x138c0000 0xc0>;
134        interrupts = <GIC_SPI 195 IRQ_TYPE_LEVEL_HIGH>;
135        #address-cells = <1>;
136        #size-cells = <0>;
137        clocks = <&cmu_peri CLK_GOUT_HSI2C2_IPCLK>,
138                 <&cmu_peri CLK_GOUT_HSI2C2_PCLK>;
139        clock-names = "hsi2c", "hsi2c_pclk";
140
141        pmic@66 {
142            /* compatible = "samsung,s2mps11-pmic"; */
143            reg = <0x66>;
144        };
145    };
146