1# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/gpio/nxp,pcf8575.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: PCF857x-compatible I/O expanders 8 9maintainers: 10 - Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> 11 12description: 13 The PCF857x-compatible chips have "quasi-bidirectional" I/O lines that can be 14 driven high by a pull-up current source or driven low to ground. This 15 combines the direction and output level into a single bit per line, which 16 can't be read back. We can't actually know at initialization time whether a 17 line is configured (a) as output and driving the signal low/high, or (b) as 18 input and reporting a low/high value, without knowing the last value written 19 since the chip came out of reset (if any). The only reliable solution for 20 setting up line direction is thus to do it explicitly. 21 22properties: 23 compatible: 24 enum: 25 - maxim,max7328 26 - maxim,max7329 27 - nxp,pca8574 28 - nxp,pca8575 29 - nxp,pca9670 30 - nxp,pca9671 31 - nxp,pca9672 32 - nxp,pca9673 33 - nxp,pca9674 34 - nxp,pca9675 35 - nxp,pcf8574 36 - nxp,pcf8574a 37 - nxp,pcf8575 38 39 reg: 40 maxItems: 1 41 42 gpio-line-names: 43 minItems: 1 44 maxItems: 16 45 46 gpio-controller: true 47 48 '#gpio-cells': 49 const: 2 50 description: 51 The first cell is the GPIO number and the second cell specifies GPIO 52 flags, as defined in <dt-bindings/gpio/gpio.h>. Only the GPIO_ACTIVE_HIGH 53 and GPIO_ACTIVE_LOW flags are supported. 54 55 lines-initial-states: 56 $ref: /schemas/types.yaml#/definitions/uint32 57 description: 58 Bitmask that specifies the initial state of each line. 59 When a bit is set to zero, the corresponding line will be initialized to 60 the input (pulled-up) state. 61 When the bit is set to one, the line will be initialized to the 62 low-level output state. 63 If the property is not specified all lines will be initialized to the 64 input state. 65 66 interrupts: 67 maxItems: 1 68 69 interrupt-controller: true 70 71 '#interrupt-cells': 72 const: 2 73 74 wakeup-source: true 75 76 reset-gpios: 77 maxItems: 1 78 description: 79 GPIO controlling the (reset active LOW) RESET# pin. 80 81 The active polarity of the GPIO must translate to the low state of the 82 RESET# pin on the IC, i.e. if a GPIO is directly routed to the RESET# pin 83 without any inverter, GPIO_ACTIVE_LOW is expected. 84 85 Performing a reset makes all lines initialized to their input (pulled-up) 86 state. 87 88allOf: 89 - if: 90 properties: 91 compatible: 92 not: 93 contains: 94 enum: 95 - nxp,pca9670 96 - nxp,pca9671 97 - nxp,pca9672 98 - nxp,pca9673 99 then: 100 properties: 101 reset-gpios: false 102 103 # lines-initial-states XOR reset-gpios 104 # Performing a reset reinitializes all lines to a known state which 105 # may not match passed lines-initial-states 106 - if: 107 required: 108 - lines-initial-states 109 then: 110 properties: 111 reset-gpios: false 112 113patternProperties: 114 "^(.+-hog(-[0-9]+)?)$": 115 type: object 116 117 required: 118 - gpio-hog 119 120required: 121 - compatible 122 - reg 123 - gpio-controller 124 - '#gpio-cells' 125 126additionalProperties: false 127 128examples: 129 - | 130 i2c { 131 #address-cells = <1>; 132 #size-cells = <0>; 133 134 pcf8575: gpio@20 { 135 compatible = "nxp,pcf8575"; 136 reg = <0x20>; 137 interrupt-parent = <&irqpin2>; 138 interrupts = <3 0>; 139 gpio-controller; 140 #gpio-cells = <2>; 141 interrupt-controller; 142 #interrupt-cells = <2>; 143 }; 144 }; 145