1# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2%YAML 1.2 3--- 4$id: http://devicetree.org/schemas/dsp/fsl,dsp.yaml# 5$schema: http://devicetree.org/meta-schemas/core.yaml# 6 7title: NXP i.MX8 DSP core 8 9maintainers: 10 - Daniel Baluta <daniel.baluta@nxp.com> 11 - Shengjiu Wang <shengjiu.wang@nxp.com> 12 13description: | 14 Some boards from i.MX8 family contain a DSP core used for 15 advanced pre- and post- audio processing. 16 17properties: 18 compatible: 19 enum: 20 - fsl,imx8qxp-dsp 21 - fsl,imx8qm-dsp 22 - fsl,imx8mp-dsp 23 - fsl,imx8ulp-dsp 24 - fsl,imx8qxp-hifi4 25 - fsl,imx8qm-hifi4 26 - fsl,imx8mp-hifi4 27 - fsl,imx8ulp-hifi4 28 29 reg: 30 maxItems: 1 31 32 clocks: 33 items: 34 - description: ipg clock 35 - description: ocram clock 36 - description: core clock 37 - description: debug interface clock 38 - description: message unit clock 39 minItems: 3 40 41 clock-names: 42 items: 43 - const: ipg 44 - const: ocram 45 - const: core 46 - const: debug 47 - const: mu 48 minItems: 3 49 50 power-domains: 51 description: 52 List of phandle and PM domain specifier as documented in 53 Documentation/devicetree/bindings/power/power_domain.txt 54 minItems: 1 55 maxItems: 4 56 57 mboxes: 58 description: 59 List of <&phandle type channel> - 2 channels for TXDB, 2 channels for RXDB 60 or - 1 channel for TX, 1 channel for RX, 1 channel for RXDB 61 (see mailbox/fsl,mu.txt) 62 minItems: 3 63 maxItems: 4 64 65 mbox-names: 66 minItems: 3 67 maxItems: 4 68 69 memory-region: 70 description: 71 phandle to a node describing reserved memory (System RAM memory) 72 used by DSP (see bindings/reserved-memory/reserved-memory.txt) 73 minItems: 1 74 maxItems: 4 75 76 firmware-name: 77 description: | 78 Default name of the firmware to load to the remote processor. 79 80 fsl,dsp-ctrl: 81 $ref: /schemas/types.yaml#/definitions/phandle 82 description: 83 Phandle to syscon block which provide access for processor enablement 84 85 resets: 86 minItems: 1 87 88 reset-names: 89 minItems: 1 90 items: 91 - const: runstall 92 - const: softreset 93 94required: 95 - compatible 96 - reg 97 - clocks 98 - clock-names 99 - power-domains 100 - mboxes 101 - mbox-names 102 - memory-region 103 104allOf: 105 - if: 106 properties: 107 compatible: 108 contains: 109 enum: 110 - fsl,imx8qxp-dsp 111 - fsl,imx8qxp-hifi4 112 then: 113 properties: 114 power-domains: 115 minItems: 2 116 maxItems: 2 117 118 - if: 119 properties: 120 compatible: 121 contains: 122 enum: 123 - fsl,imx8qm-dsp 124 - fsl,imx8qm-hifi4 125 then: 126 properties: 127 power-domains: 128 minItems: 4 129 130 - if: 131 properties: 132 compatible: 133 contains: 134 enum: 135 - fsl,imx8mp-dsp 136 - fsl,imx8mp-hifi4 137 - fsl,imx8ulp-dsp 138 - fsl,imx8ulp-hifi4 139 then: 140 properties: 141 power-domains: 142 maxItems: 1 143 144 - if: 145 properties: 146 compatible: 147 contains: 148 enum: 149 - fsl,imx8qxp-hifi4 150 - fsl,imx8qm-hifi4 151 - fsl,imx8mp-hifi4 152 - fsl,imx8ulp-hifi4 153 then: 154 properties: 155 memory-region: 156 minItems: 4 157 mboxes: 158 maxItems: 3 159 mbox-names: 160 items: 161 - const: tx 162 - const: rx 163 - const: rxdb 164 else: 165 properties: 166 memory-region: 167 maxItems: 1 168 mboxes: 169 minItems: 4 170 mbox-names: 171 items: 172 - const: txdb0 173 - const: txdb1 174 - const: rxdb0 175 - const: rxdb1 176 - if: 177 properties: 178 compatible: 179 contains: 180 enum: 181 - fsl,imx8mp-dsp 182 - fsl,imx8mp-hifi4 183 then: 184 required: 185 - resets 186 - reset-names 187 188additionalProperties: false 189 190examples: 191 - | 192 #include <dt-bindings/firmware/imx/rsrc.h> 193 #include <dt-bindings/clock/imx8-clock.h> 194 dsp@596e8000 { 195 compatible = "fsl,imx8qxp-dsp"; 196 reg = <0x596e8000 0x88000>; 197 clocks = <&adma_lpcg IMX_ADMA_LPCG_DSP_IPG_CLK>, 198 <&adma_lpcg IMX_ADMA_LPCG_OCRAM_IPG_CLK>, 199 <&adma_lpcg IMX_ADMA_LPCG_DSP_CORE_CLK>; 200 clock-names = "ipg", "ocram", "core"; 201 power-domains = <&pd IMX_SC_R_MU_13B>, 202 <&pd IMX_SC_R_MU_2A>; 203 mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; 204 mboxes = <&lsio_mu13 2 0>, <&lsio_mu13 2 1>, <&lsio_mu13 3 0>, <&lsio_mu13 3 1>; 205 memory-region = <&dsp_reserved>; 206 }; 207 - | 208 #include <dt-bindings/clock/imx8mp-clock.h> 209 #include <dt-bindings/reset/imx8mp-reset-audiomix.h> 210 dsp_reserved: dsp@92400000 { 211 reg = <0x92400000 0x1000000>; 212 no-map; 213 }; 214 dsp_vdev0vring0: vdev0vring0@942f0000 { 215 reg = <0x942f0000 0x8000>; 216 no-map; 217 }; 218 dsp_vdev0vring1: vdev0vring1@942f8000 { 219 reg = <0x942f8000 0x8000>; 220 no-map; 221 }; 222 dsp_vdev0buffer: vdev0buffer@94300000 { 223 compatible = "shared-dma-pool"; 224 reg = <0x94300000 0x100000>; 225 no-map; 226 }; 227 228 dsp: dsp@3b6e8000 { 229 compatible = "fsl,imx8mp-hifi4"; 230 reg = <0x3b6e8000 0x88000>; 231 clocks = <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, 232 <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_OCRAMA_IPG>, 233 <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSP_ROOT>, 234 <&audio_blk_ctrl IMX8MP_CLK_AUDIOMIX_DSPDBG_ROOT>; 235 clock-names = "ipg", "ocram", "core", "debug"; 236 firmware-name = "imx/dsp/hifi4.bin"; 237 power-domains = <&audiomix_pd>; 238 mbox-names = "tx", "rx", "rxdb"; 239 mboxes = <&mu2 0 0>, 240 <&mu2 1 0>, 241 <&mu2 3 0>; 242 memory-region = <&dsp_vdev0buffer>, <&dsp_vdev0vring0>, 243 <&dsp_vdev0vring1>, <&dsp_reserved>; 244 resets = <&audio_blk_ctrl IMX8MP_AUDIOMIX_DSP_RUNSTALL>; 245 reset-names = "runstall"; 246 }; 247