1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * Synopsys DesignWare I2C adapter driver (slave only).
4 *
5 * Based on the Synopsys DesignWare I2C adapter driver (master).
6 *
7 * Copyright (C) 2016 Synopsys Inc.
8 */
9 #include <linux/delay.h>
10 #include <linux/err.h>
11 #include <linux/errno.h>
12 #include <linux/i2c.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <linux/regmap.h>
18
19 #define DEFAULT_SYMBOL_NAMESPACE I2C_DW
20
21 #include "i2c-designware-core.h"
22
i2c_dw_configure_fifo_slave(struct dw_i2c_dev * dev)23 static void i2c_dw_configure_fifo_slave(struct dw_i2c_dev *dev)
24 {
25 /* Configure Tx/Rx FIFO threshold levels. */
26 regmap_write(dev->map, DW_IC_TX_TL, 0);
27 regmap_write(dev->map, DW_IC_RX_TL, 0);
28
29 /* Configure the I2C slave. */
30 regmap_write(dev->map, DW_IC_CON, dev->slave_cfg);
31 regmap_write(dev->map, DW_IC_INTR_MASK, DW_IC_INTR_SLAVE_MASK);
32 }
33
34 /**
35 * i2c_dw_init_slave() - Initialize the designware i2c slave hardware
36 * @dev: device private data
37 *
38 * This function configures and enables the I2C in slave mode.
39 * This function is called during I2C init function, and in case of timeout at
40 * run time.
41 */
i2c_dw_init_slave(struct dw_i2c_dev * dev)42 static int i2c_dw_init_slave(struct dw_i2c_dev *dev)
43 {
44 int ret;
45
46 ret = i2c_dw_acquire_lock(dev);
47 if (ret)
48 return ret;
49
50 /* Disable the adapter. */
51 __i2c_dw_disable(dev);
52
53 /* Write SDA hold time if supported */
54 if (dev->sda_hold_time)
55 regmap_write(dev->map, DW_IC_SDA_HOLD, dev->sda_hold_time);
56
57 i2c_dw_configure_fifo_slave(dev);
58 i2c_dw_release_lock(dev);
59
60 return 0;
61 }
62
i2c_dw_reg_slave(struct i2c_client * slave)63 static int i2c_dw_reg_slave(struct i2c_client *slave)
64 {
65 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
66
67 if (dev->slave)
68 return -EBUSY;
69 if (slave->flags & I2C_CLIENT_TEN)
70 return -EAFNOSUPPORT;
71 pm_runtime_get_sync(dev->dev);
72
73 /*
74 * Set slave address in the IC_SAR register,
75 * the address to which the DW_apb_i2c responds.
76 */
77 __i2c_dw_disable_nowait(dev);
78 regmap_write(dev->map, DW_IC_SAR, slave->addr);
79 dev->slave = slave;
80
81 __i2c_dw_enable(dev);
82
83 dev->status = 0;
84
85 return 0;
86 }
87
i2c_dw_unreg_slave(struct i2c_client * slave)88 static int i2c_dw_unreg_slave(struct i2c_client *slave)
89 {
90 struct dw_i2c_dev *dev = i2c_get_adapdata(slave->adapter);
91
92 regmap_write(dev->map, DW_IC_INTR_MASK, 0);
93 i2c_dw_disable(dev);
94 synchronize_irq(dev->irq);
95 dev->slave = NULL;
96 pm_runtime_put(dev->dev);
97
98 return 0;
99 }
100
i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev * dev)101 static u32 i2c_dw_read_clear_intrbits_slave(struct dw_i2c_dev *dev)
102 {
103 unsigned int stat, dummy;
104
105 /*
106 * The IC_INTR_STAT register just indicates "enabled" interrupts.
107 * The unmasked raw version of interrupt status bits is available
108 * in the IC_RAW_INTR_STAT register.
109 *
110 * That is,
111 * stat = readl(IC_INTR_STAT);
112 * equals to,
113 * stat = readl(IC_RAW_INTR_STAT) & readl(IC_INTR_MASK);
114 *
115 * The raw version might be useful for debugging purposes.
116 */
117 regmap_read(dev->map, DW_IC_INTR_STAT, &stat);
118
119 /*
120 * Do not use the IC_CLR_INTR register to clear interrupts, or
121 * you'll miss some interrupts, triggered during the period from
122 * readl(IC_INTR_STAT) to readl(IC_CLR_INTR).
123 *
124 * Instead, use the separately-prepared IC_CLR_* registers.
125 */
126 if (stat & DW_IC_INTR_TX_ABRT)
127 regmap_read(dev->map, DW_IC_CLR_TX_ABRT, &dummy);
128 if (stat & DW_IC_INTR_RX_UNDER)
129 regmap_read(dev->map, DW_IC_CLR_RX_UNDER, &dummy);
130 if (stat & DW_IC_INTR_RX_OVER)
131 regmap_read(dev->map, DW_IC_CLR_RX_OVER, &dummy);
132 if (stat & DW_IC_INTR_TX_OVER)
133 regmap_read(dev->map, DW_IC_CLR_TX_OVER, &dummy);
134 if (stat & DW_IC_INTR_RX_DONE)
135 regmap_read(dev->map, DW_IC_CLR_RX_DONE, &dummy);
136 if (stat & DW_IC_INTR_ACTIVITY)
137 regmap_read(dev->map, DW_IC_CLR_ACTIVITY, &dummy);
138 if (stat & DW_IC_INTR_STOP_DET)
139 regmap_read(dev->map, DW_IC_CLR_STOP_DET, &dummy);
140 if (stat & DW_IC_INTR_START_DET)
141 regmap_read(dev->map, DW_IC_CLR_START_DET, &dummy);
142 if (stat & DW_IC_INTR_GEN_CALL)
143 regmap_read(dev->map, DW_IC_CLR_GEN_CALL, &dummy);
144
145 return stat;
146 }
147
148 /*
149 * Interrupt service routine. This gets called whenever an I2C slave interrupt
150 * occurs.
151 */
i2c_dw_isr_slave(int this_irq,void * dev_id)152 static irqreturn_t i2c_dw_isr_slave(int this_irq, void *dev_id)
153 {
154 struct dw_i2c_dev *dev = dev_id;
155 unsigned int raw_stat, stat, enabled, tmp;
156 u8 val = 0, slave_activity;
157
158 regmap_read(dev->map, DW_IC_ENABLE, &enabled);
159 regmap_read(dev->map, DW_IC_RAW_INTR_STAT, &raw_stat);
160 regmap_read(dev->map, DW_IC_STATUS, &tmp);
161 slave_activity = ((tmp & DW_IC_STATUS_SLAVE_ACTIVITY) >> 6);
162
163 if (!enabled || !(raw_stat & ~DW_IC_INTR_ACTIVITY) || !dev->slave)
164 return IRQ_NONE;
165
166 stat = i2c_dw_read_clear_intrbits_slave(dev);
167 dev_dbg(dev->dev,
168 "%#x STATUS SLAVE_ACTIVITY=%#x : RAW_INTR_STAT=%#x : INTR_STAT=%#x\n",
169 enabled, slave_activity, raw_stat, stat);
170
171 if (stat & DW_IC_INTR_RX_FULL) {
172 if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) {
173 dev->status |= STATUS_WRITE_IN_PROGRESS;
174 dev->status &= ~STATUS_READ_IN_PROGRESS;
175 i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_REQUESTED,
176 &val);
177 }
178
179 do {
180 regmap_read(dev->map, DW_IC_DATA_CMD, &tmp);
181 if (tmp & DW_IC_DATA_CMD_FIRST_DATA_BYTE)
182 i2c_slave_event(dev->slave,
183 I2C_SLAVE_WRITE_REQUESTED,
184 &val);
185 val = tmp;
186 i2c_slave_event(dev->slave, I2C_SLAVE_WRITE_RECEIVED,
187 &val);
188 regmap_read(dev->map, DW_IC_STATUS, &tmp);
189 } while (tmp & DW_IC_STATUS_RFNE);
190 }
191
192 if (stat & DW_IC_INTR_RD_REQ) {
193 if (slave_activity) {
194 regmap_read(dev->map, DW_IC_CLR_RD_REQ, &tmp);
195
196 if (!(dev->status & STATUS_READ_IN_PROGRESS)) {
197 i2c_slave_event(dev->slave,
198 I2C_SLAVE_READ_REQUESTED,
199 &val);
200 dev->status |= STATUS_READ_IN_PROGRESS;
201 dev->status &= ~STATUS_WRITE_IN_PROGRESS;
202 } else {
203 i2c_slave_event(dev->slave,
204 I2C_SLAVE_READ_PROCESSED,
205 &val);
206 }
207 regmap_write(dev->map, DW_IC_DATA_CMD, val);
208 }
209 }
210
211 if (stat & DW_IC_INTR_STOP_DET)
212 i2c_slave_event(dev->slave, I2C_SLAVE_STOP, &val);
213
214 return IRQ_HANDLED;
215 }
216
217 static const struct i2c_algorithm i2c_dw_algo = {
218 .functionality = i2c_dw_func,
219 .reg_slave = i2c_dw_reg_slave,
220 .unreg_slave = i2c_dw_unreg_slave,
221 };
222
i2c_dw_configure_slave(struct dw_i2c_dev * dev)223 void i2c_dw_configure_slave(struct dw_i2c_dev *dev)
224 {
225 dev->functionality = I2C_FUNC_SLAVE;
226
227 dev->slave_cfg = DW_IC_CON_RX_FIFO_FULL_HLD_CTRL |
228 DW_IC_CON_RESTART_EN | DW_IC_CON_STOP_DET_IFADDRESSED;
229
230 dev->mode = DW_IC_SLAVE;
231 }
232 EXPORT_SYMBOL_GPL(i2c_dw_configure_slave);
233
i2c_dw_probe_slave(struct dw_i2c_dev * dev)234 int i2c_dw_probe_slave(struct dw_i2c_dev *dev)
235 {
236 struct i2c_adapter *adap = &dev->adapter;
237 int ret;
238
239 dev->init = i2c_dw_init_slave;
240
241 ret = i2c_dw_init_regmap(dev);
242 if (ret)
243 return ret;
244
245 ret = i2c_dw_set_sda_hold(dev);
246 if (ret)
247 return ret;
248
249 ret = i2c_dw_set_fifo_size(dev);
250 if (ret)
251 return ret;
252
253 ret = dev->init(dev);
254 if (ret)
255 return ret;
256
257 snprintf(adap->name, sizeof(adap->name),
258 "Synopsys DesignWare I2C Slave adapter");
259 adap->retries = 3;
260 adap->algo = &i2c_dw_algo;
261 adap->dev.parent = dev->dev;
262 i2c_set_adapdata(adap, dev);
263
264 ret = devm_request_irq(dev->dev, dev->irq, i2c_dw_isr_slave,
265 IRQF_SHARED, dev_name(dev->dev), dev);
266 if (ret) {
267 dev_err(dev->dev, "failure requesting irq %i: %d\n",
268 dev->irq, ret);
269 return ret;
270 }
271
272 ret = i2c_add_numbered_adapter(adap);
273 if (ret)
274 dev_err(dev->dev, "failure adding adapter: %d\n", ret);
275
276 return ret;
277 }
278 EXPORT_SYMBOL_GPL(i2c_dw_probe_slave);
279
280 MODULE_AUTHOR("Luis Oliveira <lolivei@synopsys.com>");
281 MODULE_DESCRIPTION("Synopsys DesignWare I2C bus slave adapter");
282 MODULE_LICENSE("GPL v2");
283 MODULE_IMPORT_NS(I2C_DW_COMMON);
284