1 // SPDX-License-Identifier: GPL-2.0
2 /*
3  * Copyright (C) 2020, Google LLC
4  *
5  * MAXIM TCPCI based TCPC driver
6  */
7 
8 #include <linux/gpio.h>
9 #include <linux/gpio/consumer.h>
10 #include <linux/interrupt.h>
11 #include <linux/i2c.h>
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/of_gpio.h>
15 #include <linux/regmap.h>
16 #include <linux/usb/pd.h>
17 #include <linux/usb/tcpm.h>
18 #include <linux/usb/typec.h>
19 
20 #include "tcpci.h"
21 
22 #define PD_ACTIVITY_TIMEOUT_MS				10000
23 
24 #define TCPC_VENDOR_ALERT				0x80
25 
26 #define TCPC_RECEIVE_BUFFER_COUNT_OFFSET		0
27 #define TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET		1
28 #define TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET		2
29 
30 /*
31  * LongMessage not supported, hence 32 bytes for buf to be read from RECEIVE_BUFFER.
32  * DEVICE_CAPABILITIES_2.LongMessage = 0, the value in READABLE_BYTE_COUNT reg shall be
33  * less than or equal to 31. Since, RECEIVE_BUFFER len = 31 + 1(READABLE_BYTE_COUNT).
34  */
35 #define TCPC_RECEIVE_BUFFER_LEN				32
36 
37 #define MAX_BUCK_BOOST_SID				0x69
38 #define MAX_BUCK_BOOST_OP				0xb9
39 #define MAX_BUCK_BOOST_OFF				0
40 #define MAX_BUCK_BOOST_SOURCE				0xa
41 #define MAX_BUCK_BOOST_SINK				0x5
42 
43 struct max_tcpci_chip {
44 	struct tcpci_data data;
45 	struct tcpci *tcpci;
46 	struct device *dev;
47 	struct i2c_client *client;
48 	struct tcpm_port *port;
49 };
50 
51 static const struct regmap_range max_tcpci_tcpci_range[] = {
52 	regmap_reg_range(0x00, 0x95)
53 };
54 
55 const struct regmap_access_table max_tcpci_tcpci_write_table = {
56 	.yes_ranges = max_tcpci_tcpci_range,
57 	.n_yes_ranges = ARRAY_SIZE(max_tcpci_tcpci_range),
58 };
59 
60 static const struct regmap_config max_tcpci_regmap_config = {
61 	.reg_bits = 8,
62 	.val_bits = 8,
63 	.max_register = 0x95,
64 	.wr_table = &max_tcpci_tcpci_write_table,
65 };
66 
tdata_to_max_tcpci(struct tcpci_data * tdata)67 static struct max_tcpci_chip *tdata_to_max_tcpci(struct tcpci_data *tdata)
68 {
69 	return container_of(tdata, struct max_tcpci_chip, data);
70 }
71 
max_tcpci_read16(struct max_tcpci_chip * chip,unsigned int reg,u16 * val)72 static int max_tcpci_read16(struct max_tcpci_chip *chip, unsigned int reg, u16 *val)
73 {
74 	return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u16));
75 }
76 
max_tcpci_write16(struct max_tcpci_chip * chip,unsigned int reg,u16 val)77 static int max_tcpci_write16(struct max_tcpci_chip *chip, unsigned int reg, u16 val)
78 {
79 	return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u16));
80 }
81 
max_tcpci_read8(struct max_tcpci_chip * chip,unsigned int reg,u8 * val)82 static int max_tcpci_read8(struct max_tcpci_chip *chip, unsigned int reg, u8 *val)
83 {
84 	return regmap_raw_read(chip->data.regmap, reg, val, sizeof(u8));
85 }
86 
max_tcpci_write8(struct max_tcpci_chip * chip,unsigned int reg,u8 val)87 static int max_tcpci_write8(struct max_tcpci_chip *chip, unsigned int reg, u8 val)
88 {
89 	return regmap_raw_write(chip->data.regmap, reg, &val, sizeof(u8));
90 }
91 
max_tcpci_init_regs(struct max_tcpci_chip * chip)92 static void max_tcpci_init_regs(struct max_tcpci_chip *chip)
93 {
94 	u16 alert_mask = 0;
95 	int ret;
96 
97 	ret = max_tcpci_write16(chip, TCPC_ALERT, 0xffff);
98 	if (ret < 0) {
99 		dev_err(chip->dev, "Error writing to TCPC_ALERT ret:%d\n", ret);
100 		return;
101 	}
102 
103 	ret = max_tcpci_write16(chip, TCPC_VENDOR_ALERT, 0xffff);
104 	if (ret < 0) {
105 		dev_err(chip->dev, "Error writing to TCPC_VENDOR_ALERT ret:%d\n", ret);
106 		return;
107 	}
108 
109 	ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, 0xff);
110 	if (ret < 0) {
111 		dev_err(chip->dev, "Unable to clear TCPC_ALERT_EXTENDED ret:%d\n", ret);
112 		return;
113 	}
114 
115 	alert_mask = TCPC_ALERT_TX_SUCCESS | TCPC_ALERT_TX_DISCARDED | TCPC_ALERT_TX_FAILED |
116 		TCPC_ALERT_RX_HARD_RST | TCPC_ALERT_RX_STATUS | TCPC_ALERT_CC_STATUS |
117 		TCPC_ALERT_VBUS_DISCNCT | TCPC_ALERT_RX_BUF_OVF | TCPC_ALERT_POWER_STATUS |
118 		/* Enable Extended alert for detecting Fast Role Swap Signal */
119 		TCPC_ALERT_EXTND;
120 
121 	ret = max_tcpci_write16(chip, TCPC_ALERT_MASK, alert_mask);
122 	if (ret < 0) {
123 		dev_err(chip->dev,
124 			"Error enabling TCPC_ALERT: TCPC_ALERT_MASK write failed ret:%d\n", ret);
125 		return;
126 	}
127 
128 	/* Enable vbus voltage monitoring and voltage alerts */
129 	ret = max_tcpci_write8(chip, TCPC_POWER_CTRL, 0);
130 	if (ret < 0) {
131 		dev_err(chip->dev, "Error writing to TCPC_POWER_CTRL ret:%d\n", ret);
132 		return;
133 	}
134 
135 	ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED_MASK, TCPC_SINK_FAST_ROLE_SWAP);
136 	if (ret < 0)
137 		return;
138 }
139 
process_rx(struct max_tcpci_chip * chip,u16 status)140 static void process_rx(struct max_tcpci_chip *chip, u16 status)
141 {
142 	struct pd_message msg;
143 	u8 count, frame_type, rx_buf[TCPC_RECEIVE_BUFFER_LEN];
144 	int ret, payload_index;
145 	u8 *rx_buf_ptr;
146 
147 	/*
148 	 * READABLE_BYTE_COUNT: Indicates the number of bytes in the RX_BUF_BYTE_x registers
149 	 * plus one (for the RX_BUF_FRAME_TYPE) Table 4-36.
150 	 * Read the count and frame type.
151 	 */
152 	ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, 2);
153 	if (ret < 0) {
154 		dev_err(chip->dev, "TCPC_RX_BYTE_CNT read failed ret:%d", ret);
155 		return;
156 	}
157 
158 	count = rx_buf[TCPC_RECEIVE_BUFFER_COUNT_OFFSET];
159 	frame_type = rx_buf[TCPC_RECEIVE_BUFFER_FRAME_TYPE_OFFSET];
160 
161 	if (count == 0 || frame_type != TCPC_RX_BUF_FRAME_TYPE_SOP) {
162 		max_tcpci_write16(chip, TCPC_ALERT, TCPC_ALERT_RX_STATUS);
163 		dev_err(chip->dev, "%s", count ==  0 ? "error: count is 0" :
164 			"error frame_type is not SOP");
165 		return;
166 	}
167 
168 	if (count > sizeof(struct pd_message) || count + 1 > TCPC_RECEIVE_BUFFER_LEN) {
169 		dev_err(chip->dev, "Invalid TCPC_RX_BYTE_CNT %d", count);
170 		return;
171 	}
172 
173 	/*
174 	 * Read count + 1 as RX_BUF_BYTE_x is hidden and can only be read through
175 	 * TCPC_RX_BYTE_CNT
176 	 */
177 	count += 1;
178 	ret = regmap_raw_read(chip->data.regmap, TCPC_RX_BYTE_CNT, rx_buf, count);
179 	if (ret < 0) {
180 		dev_err(chip->dev, "Error: TCPC_RX_BYTE_CNT read failed: %d", ret);
181 		return;
182 	}
183 
184 	rx_buf_ptr = rx_buf + TCPC_RECEIVE_BUFFER_RX_BYTE_BUF_OFFSET;
185 	msg.header = cpu_to_le16(*(u16 *)rx_buf_ptr);
186 	rx_buf_ptr = rx_buf_ptr + sizeof(msg.header);
187 	for (payload_index = 0; payload_index < pd_header_cnt_le(msg.header); payload_index++,
188 	     rx_buf_ptr += sizeof(msg.payload[0]))
189 		msg.payload[payload_index] = cpu_to_le32(*(u32 *)rx_buf_ptr);
190 
191 	/*
192 	 * Read complete, clear RX status alert bit.
193 	 * Clear overflow as well if set.
194 	 */
195 	ret = max_tcpci_write16(chip, TCPC_ALERT, status & TCPC_ALERT_RX_BUF_OVF ?
196 				TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF :
197 				TCPC_ALERT_RX_STATUS);
198 	if (ret < 0)
199 		return;
200 
201 	tcpm_pd_receive(chip->port, &msg);
202 }
203 
max_tcpci_set_vbus(struct tcpci * tcpci,struct tcpci_data * tdata,bool source,bool sink)204 static int max_tcpci_set_vbus(struct tcpci *tcpci, struct tcpci_data *tdata, bool source, bool sink)
205 {
206 	struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
207 	u8 buffer_source[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SOURCE};
208 	u8 buffer_sink[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_SINK};
209 	u8 buffer_none[2] = {MAX_BUCK_BOOST_OP, MAX_BUCK_BOOST_OFF};
210 	struct i2c_client *i2c = chip->client;
211 	int ret;
212 
213 	struct i2c_msg msgs[] = {
214 		{
215 			.addr = MAX_BUCK_BOOST_SID,
216 			.flags = i2c->flags & I2C_M_TEN,
217 			.len = 2,
218 			.buf = source ? buffer_source : sink ? buffer_sink : buffer_none,
219 		},
220 	};
221 
222 	if (source && sink) {
223 		dev_err(chip->dev, "Both source and sink set\n");
224 		return -EINVAL;
225 	}
226 
227 	ret = i2c_transfer(i2c->adapter, msgs, 1);
228 
229 	return  ret < 0 ? ret : 1;
230 }
231 
process_power_status(struct max_tcpci_chip * chip)232 static void process_power_status(struct max_tcpci_chip *chip)
233 {
234 	u8 pwr_status;
235 	int ret;
236 
237 	ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &pwr_status);
238 	if (ret < 0)
239 		return;
240 
241 	if (pwr_status == 0xff) {
242 		max_tcpci_init_regs(chip);
243 	} else if (pwr_status & TCPC_POWER_STATUS_SOURCING_VBUS) {
244 		tcpm_sourcing_vbus(chip->port);
245 		/*
246 		 * Alawys re-enable boost here.
247 		 * In normal case, when say an headset is attached, TCPM would
248 		 * have instructed to TCPC to enable boost, so the call is a
249 		 * no-op.
250 		 * But for Fast Role Swap case, Boost turns on autonomously without
251 		 * AP intervention, but, needs AP to enable source mode explicitly
252 		 * for AP to regain control.
253 		 */
254 		max_tcpci_set_vbus(chip->tcpci, &chip->data, true, false);
255 	} else {
256 		tcpm_vbus_change(chip->port);
257 	}
258 }
259 
process_tx(struct max_tcpci_chip * chip,u16 status)260 static void process_tx(struct max_tcpci_chip *chip, u16 status)
261 {
262 	if (status & TCPC_ALERT_TX_SUCCESS)
263 		tcpm_pd_transmit_complete(chip->port, TCPC_TX_SUCCESS);
264 	else if (status & TCPC_ALERT_TX_DISCARDED)
265 		tcpm_pd_transmit_complete(chip->port, TCPC_TX_DISCARDED);
266 	else if (status & TCPC_ALERT_TX_FAILED)
267 		tcpm_pd_transmit_complete(chip->port, TCPC_TX_FAILED);
268 
269 	/* Reinit regs as Hard reset sets them to default value */
270 	if ((status & TCPC_ALERT_TX_SUCCESS) && (status & TCPC_ALERT_TX_FAILED))
271 		max_tcpci_init_regs(chip);
272 }
273 
_max_tcpci_irq(struct max_tcpci_chip * chip,u16 status)274 static irqreturn_t _max_tcpci_irq(struct max_tcpci_chip *chip, u16 status)
275 {
276 	u16 mask;
277 	int ret;
278 	u8 reg_status;
279 
280 	/*
281 	 * Clear alert status for everything except RX_STATUS, which shouldn't
282 	 * be cleared until we have successfully retrieved message.
283 	 */
284 	if (status & ~TCPC_ALERT_RX_STATUS) {
285 		mask = status & TCPC_ALERT_RX_BUF_OVF ?
286 			status & ~(TCPC_ALERT_RX_STATUS | TCPC_ALERT_RX_BUF_OVF) :
287 			status & ~TCPC_ALERT_RX_STATUS;
288 		ret = max_tcpci_write16(chip, TCPC_ALERT, mask);
289 		if (ret < 0) {
290 			dev_err(chip->dev, "ALERT clear failed\n");
291 			return ret;
292 		}
293 	}
294 
295 	if (status & TCPC_ALERT_RX_BUF_OVF && !(status & TCPC_ALERT_RX_STATUS)) {
296 		ret = max_tcpci_write16(chip, TCPC_ALERT, (TCPC_ALERT_RX_STATUS |
297 							  TCPC_ALERT_RX_BUF_OVF));
298 		if (ret < 0) {
299 			dev_err(chip->dev, "ALERT clear failed\n");
300 			return ret;
301 		}
302 	}
303 
304 	if (status & TCPC_ALERT_EXTND) {
305 		ret = max_tcpci_read8(chip, TCPC_ALERT_EXTENDED, &reg_status);
306 		if (ret < 0)
307 			return ret;
308 
309 		ret = max_tcpci_write8(chip, TCPC_ALERT_EXTENDED, reg_status);
310 		if (ret < 0)
311 			return ret;
312 
313 		if (reg_status & TCPC_SINK_FAST_ROLE_SWAP) {
314 			dev_info(chip->dev, "FRS Signal");
315 			tcpm_sink_frs(chip->port);
316 		}
317 	}
318 
319 	if (status & TCPC_ALERT_RX_STATUS)
320 		process_rx(chip, status);
321 
322 	if (status & TCPC_ALERT_VBUS_DISCNCT)
323 		tcpm_vbus_change(chip->port);
324 
325 	if (status & TCPC_ALERT_CC_STATUS)
326 		tcpm_cc_change(chip->port);
327 
328 	if (status & TCPC_ALERT_POWER_STATUS)
329 		process_power_status(chip);
330 
331 	if (status & TCPC_ALERT_RX_HARD_RST) {
332 		tcpm_pd_hard_reset(chip->port);
333 		max_tcpci_init_regs(chip);
334 	}
335 
336 	if (status & TCPC_ALERT_TX_SUCCESS || status & TCPC_ALERT_TX_DISCARDED || status &
337 	    TCPC_ALERT_TX_FAILED)
338 		process_tx(chip, status);
339 
340 	return IRQ_HANDLED;
341 }
342 
max_tcpci_irq(int irq,void * dev_id)343 static irqreturn_t max_tcpci_irq(int irq, void *dev_id)
344 {
345 	struct max_tcpci_chip *chip = dev_id;
346 	u16 status;
347 	irqreturn_t irq_return;
348 	int ret;
349 
350 	if (!chip->port)
351 		return IRQ_HANDLED;
352 
353 	ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
354 	if (ret < 0) {
355 		dev_err(chip->dev, "ALERT read failed\n");
356 		return ret;
357 	}
358 	while (status) {
359 		irq_return = _max_tcpci_irq(chip, status);
360 		/* Do not return if the ALERT is already set. */
361 		ret = max_tcpci_read16(chip, TCPC_ALERT, &status);
362 		if (ret < 0)
363 			break;
364 	}
365 
366 	return irq_return;
367 }
368 
max_tcpci_isr(int irq,void * dev_id)369 static irqreturn_t max_tcpci_isr(int irq, void *dev_id)
370 {
371 	struct max_tcpci_chip *chip = dev_id;
372 
373 	pm_wakeup_event(chip->dev, PD_ACTIVITY_TIMEOUT_MS);
374 
375 	if (!chip->port)
376 		return IRQ_HANDLED;
377 
378 	return IRQ_WAKE_THREAD;
379 }
380 
max_tcpci_init_alert(struct max_tcpci_chip * chip,struct i2c_client * client)381 static int max_tcpci_init_alert(struct max_tcpci_chip *chip, struct i2c_client *client)
382 {
383 	int ret;
384 
385 	ret = devm_request_threaded_irq(chip->dev, client->irq, max_tcpci_isr, max_tcpci_irq,
386 					(IRQF_TRIGGER_LOW | IRQF_ONESHOT), dev_name(chip->dev),
387 					chip);
388 
389 	if (ret < 0)
390 		return ret;
391 
392 	enable_irq_wake(client->irq);
393 	return 0;
394 }
395 
max_tcpci_start_toggling(struct tcpci * tcpci,struct tcpci_data * tdata,enum typec_cc_status cc)396 static int max_tcpci_start_toggling(struct tcpci *tcpci, struct tcpci_data *tdata,
397 				    enum typec_cc_status cc)
398 {
399 	struct max_tcpci_chip *chip = tdata_to_max_tcpci(tdata);
400 
401 	max_tcpci_init_regs(chip);
402 
403 	return 0;
404 }
405 
tcpci_init(struct tcpci * tcpci,struct tcpci_data * data)406 static int tcpci_init(struct tcpci *tcpci, struct tcpci_data *data)
407 {
408 	/*
409 	 * Generic TCPCI overwrites the regs once this driver initializes
410 	 * them. Prevent this by returning -1.
411 	 */
412 	return -1;
413 }
414 
max_tcpci_probe(struct i2c_client * client,const struct i2c_device_id * i2c_id)415 static int max_tcpci_probe(struct i2c_client *client, const struct i2c_device_id *i2c_id)
416 {
417 	int ret;
418 	struct max_tcpci_chip *chip;
419 	u8 power_status;
420 
421 	chip = devm_kzalloc(&client->dev, sizeof(*chip), GFP_KERNEL);
422 	if (!chip)
423 		return -ENOMEM;
424 
425 	chip->client = client;
426 	chip->data.regmap = devm_regmap_init_i2c(client, &max_tcpci_regmap_config);
427 	if (IS_ERR(chip->data.regmap)) {
428 		dev_err(&client->dev, "Regmap init failed\n");
429 		return PTR_ERR(chip->data.regmap);
430 	}
431 
432 	chip->dev = &client->dev;
433 	i2c_set_clientdata(client, chip);
434 
435 	ret = max_tcpci_read8(chip, TCPC_POWER_STATUS, &power_status);
436 	if (ret < 0)
437 		return ret;
438 
439 	/* Chip level tcpci callbacks */
440 	chip->data.set_vbus = max_tcpci_set_vbus;
441 	chip->data.start_drp_toggling = max_tcpci_start_toggling;
442 	chip->data.TX_BUF_BYTE_x_hidden = true;
443 	chip->data.init = tcpci_init;
444 
445 	max_tcpci_init_regs(chip);
446 	chip->tcpci = tcpci_register_port(chip->dev, &chip->data);
447 	if (IS_ERR_OR_NULL(chip->tcpci)) {
448 		dev_err(&client->dev, "TCPCI port registration failed");
449 		ret = PTR_ERR(chip->tcpci);
450 		return PTR_ERR(chip->tcpci);
451 	}
452 	chip->port = tcpci_get_tcpm_port(chip->tcpci);
453 	ret = max_tcpci_init_alert(chip, client);
454 	if (ret < 0)
455 		goto unreg_port;
456 
457 	device_init_wakeup(chip->dev, true);
458 	return 0;
459 
460 unreg_port:
461 	tcpci_unregister_port(chip->tcpci);
462 
463 	return ret;
464 }
465 
max_tcpci_remove(struct i2c_client * client)466 static int max_tcpci_remove(struct i2c_client *client)
467 {
468 	struct max_tcpci_chip *chip = i2c_get_clientdata(client);
469 
470 	if (!IS_ERR_OR_NULL(chip->tcpci))
471 		tcpci_unregister_port(chip->tcpci);
472 
473 	return 0;
474 }
475 
476 static const struct i2c_device_id max_tcpci_id[] = {
477 	{ "maxtcpc", 0 },
478 	{ }
479 };
480 MODULE_DEVICE_TABLE(i2c, max_tcpci_id);
481 
482 #ifdef CONFIG_OF
483 static const struct of_device_id max_tcpci_of_match[] = {
484 	{ .compatible = "maxim,tcpc", },
485 	{},
486 };
487 MODULE_DEVICE_TABLE(of, max_tcpci_of_match);
488 #endif
489 
490 static struct i2c_driver max_tcpci_i2c_driver = {
491 	.driver = {
492 		.name = "maxtcpc",
493 		.of_match_table = of_match_ptr(max_tcpci_of_match),
494 	},
495 	.probe = max_tcpci_probe,
496 	.remove = max_tcpci_remove,
497 	.id_table = max_tcpci_id,
498 };
499 module_i2c_driver(max_tcpci_i2c_driver);
500 
501 MODULE_AUTHOR("Badhri Jagan Sridharan <badhri@google.com>");
502 MODULE_DESCRIPTION("Maxim TCPCI based USB Type-C Port Controller Interface Driver");
503 MODULE_LICENSE("GPL v2");
504