1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3 * acpi-cpufreq.c - ACPI Processor P-States Driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
9 */
10
11 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13 #include <linux/kernel.h>
14 #include <linux/module.h>
15 #include <linux/init.h>
16 #include <linux/smp.h>
17 #include <linux/sched.h>
18 #include <linux/cpufreq.h>
19 #include <linux/compiler.h>
20 #include <linux/dmi.h>
21 #include <linux/slab.h>
22
23 #include <linux/acpi.h>
24 #include <linux/io.h>
25 #include <linux/delay.h>
26 #include <linux/uaccess.h>
27
28 #include <acpi/processor.h>
29
30 #include <asm/msr.h>
31 #include <asm/processor.h>
32 #include <asm/cpufeature.h>
33 #include <asm/cpu_device_id.h>
34
35 MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
36 MODULE_DESCRIPTION("ACPI Processor P-States Driver");
37 MODULE_LICENSE("GPL");
38
39 enum {
40 UNDEFINED_CAPABLE = 0,
41 SYSTEM_INTEL_MSR_CAPABLE,
42 SYSTEM_AMD_MSR_CAPABLE,
43 SYSTEM_IO_CAPABLE,
44 };
45
46 #define INTEL_MSR_RANGE (0xffff)
47 #define AMD_MSR_RANGE (0x7)
48 #define HYGON_MSR_RANGE (0x7)
49
50 #define MSR_K7_HWCR_CPB_DIS (1ULL << 25)
51
52 struct acpi_cpufreq_data {
53 unsigned int resume;
54 unsigned int cpu_feature;
55 unsigned int acpi_perf_cpu;
56 cpumask_var_t freqdomain_cpus;
57 void (*cpu_freq_write)(struct acpi_pct_register *reg, u32 val);
58 u32 (*cpu_freq_read)(struct acpi_pct_register *reg);
59 };
60
61 /* acpi_perf_data is a pointer to percpu data. */
62 static struct acpi_processor_performance __percpu *acpi_perf_data;
63
to_perf_data(struct acpi_cpufreq_data * data)64 static inline struct acpi_processor_performance *to_perf_data(struct acpi_cpufreq_data *data)
65 {
66 return per_cpu_ptr(acpi_perf_data, data->acpi_perf_cpu);
67 }
68
69 static struct cpufreq_driver acpi_cpufreq_driver;
70
71 static unsigned int acpi_pstate_strict;
72
boost_state(unsigned int cpu)73 static bool boost_state(unsigned int cpu)
74 {
75 u32 lo, hi;
76 u64 msr;
77
78 switch (boot_cpu_data.x86_vendor) {
79 case X86_VENDOR_INTEL:
80 rdmsr_on_cpu(cpu, MSR_IA32_MISC_ENABLE, &lo, &hi);
81 msr = lo | ((u64)hi << 32);
82 return !(msr & MSR_IA32_MISC_ENABLE_TURBO_DISABLE);
83 case X86_VENDOR_HYGON:
84 case X86_VENDOR_AMD:
85 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
86 msr = lo | ((u64)hi << 32);
87 return !(msr & MSR_K7_HWCR_CPB_DIS);
88 }
89 return false;
90 }
91
boost_set_msr(bool enable)92 static int boost_set_msr(bool enable)
93 {
94 u32 msr_addr;
95 u64 msr_mask, val;
96
97 switch (boot_cpu_data.x86_vendor) {
98 case X86_VENDOR_INTEL:
99 msr_addr = MSR_IA32_MISC_ENABLE;
100 msr_mask = MSR_IA32_MISC_ENABLE_TURBO_DISABLE;
101 break;
102 case X86_VENDOR_HYGON:
103 case X86_VENDOR_AMD:
104 msr_addr = MSR_K7_HWCR;
105 msr_mask = MSR_K7_HWCR_CPB_DIS;
106 break;
107 default:
108 return -EINVAL;
109 }
110
111 rdmsrl(msr_addr, val);
112
113 if (enable)
114 val &= ~msr_mask;
115 else
116 val |= msr_mask;
117
118 wrmsrl(msr_addr, val);
119 return 0;
120 }
121
boost_set_msr_each(void * p_en)122 static void boost_set_msr_each(void *p_en)
123 {
124 bool enable = (bool) p_en;
125
126 boost_set_msr(enable);
127 }
128
set_boost(struct cpufreq_policy * policy,int val)129 static int set_boost(struct cpufreq_policy *policy, int val)
130 {
131 on_each_cpu_mask(policy->cpus, boost_set_msr_each,
132 (void *)(long)val, 1);
133 pr_debug("CPU %*pbl: Core Boosting %sabled.\n",
134 cpumask_pr_args(policy->cpus), val ? "en" : "dis");
135
136 return 0;
137 }
138
show_freqdomain_cpus(struct cpufreq_policy * policy,char * buf)139 static ssize_t show_freqdomain_cpus(struct cpufreq_policy *policy, char *buf)
140 {
141 struct acpi_cpufreq_data *data = policy->driver_data;
142
143 if (unlikely(!data))
144 return -ENODEV;
145
146 return cpufreq_show_cpus(data->freqdomain_cpus, buf);
147 }
148
149 cpufreq_freq_attr_ro(freqdomain_cpus);
150
151 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
store_cpb(struct cpufreq_policy * policy,const char * buf,size_t count)152 static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
153 size_t count)
154 {
155 int ret;
156 unsigned int val = 0;
157
158 if (!acpi_cpufreq_driver.set_boost)
159 return -EINVAL;
160
161 ret = kstrtouint(buf, 10, &val);
162 if (ret || val > 1)
163 return -EINVAL;
164
165 get_online_cpus();
166 set_boost(policy, val);
167 put_online_cpus();
168
169 return count;
170 }
171
show_cpb(struct cpufreq_policy * policy,char * buf)172 static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
173 {
174 return sprintf(buf, "%u\n", acpi_cpufreq_driver.boost_enabled);
175 }
176
177 cpufreq_freq_attr_rw(cpb);
178 #endif
179
check_est_cpu(unsigned int cpuid)180 static int check_est_cpu(unsigned int cpuid)
181 {
182 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
183
184 return cpu_has(cpu, X86_FEATURE_EST);
185 }
186
check_amd_hwpstate_cpu(unsigned int cpuid)187 static int check_amd_hwpstate_cpu(unsigned int cpuid)
188 {
189 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
190
191 return cpu_has(cpu, X86_FEATURE_HW_PSTATE);
192 }
193
extract_io(struct cpufreq_policy * policy,u32 value)194 static unsigned extract_io(struct cpufreq_policy *policy, u32 value)
195 {
196 struct acpi_cpufreq_data *data = policy->driver_data;
197 struct acpi_processor_performance *perf;
198 int i;
199
200 perf = to_perf_data(data);
201
202 for (i = 0; i < perf->state_count; i++) {
203 if (value == perf->states[i].status)
204 return policy->freq_table[i].frequency;
205 }
206 return 0;
207 }
208
extract_msr(struct cpufreq_policy * policy,u32 msr)209 static unsigned extract_msr(struct cpufreq_policy *policy, u32 msr)
210 {
211 struct acpi_cpufreq_data *data = policy->driver_data;
212 struct cpufreq_frequency_table *pos;
213 struct acpi_processor_performance *perf;
214
215 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD)
216 msr &= AMD_MSR_RANGE;
217 else if (boot_cpu_data.x86_vendor == X86_VENDOR_HYGON)
218 msr &= HYGON_MSR_RANGE;
219 else
220 msr &= INTEL_MSR_RANGE;
221
222 perf = to_perf_data(data);
223
224 cpufreq_for_each_entry(pos, policy->freq_table)
225 if (msr == perf->states[pos->driver_data].status)
226 return pos->frequency;
227 return policy->freq_table[0].frequency;
228 }
229
extract_freq(struct cpufreq_policy * policy,u32 val)230 static unsigned extract_freq(struct cpufreq_policy *policy, u32 val)
231 {
232 struct acpi_cpufreq_data *data = policy->driver_data;
233
234 switch (data->cpu_feature) {
235 case SYSTEM_INTEL_MSR_CAPABLE:
236 case SYSTEM_AMD_MSR_CAPABLE:
237 return extract_msr(policy, val);
238 case SYSTEM_IO_CAPABLE:
239 return extract_io(policy, val);
240 default:
241 return 0;
242 }
243 }
244
cpu_freq_read_intel(struct acpi_pct_register * not_used)245 static u32 cpu_freq_read_intel(struct acpi_pct_register *not_used)
246 {
247 u32 val, dummy __always_unused;
248
249 rdmsr(MSR_IA32_PERF_CTL, val, dummy);
250 return val;
251 }
252
cpu_freq_write_intel(struct acpi_pct_register * not_used,u32 val)253 static void cpu_freq_write_intel(struct acpi_pct_register *not_used, u32 val)
254 {
255 u32 lo, hi;
256
257 rdmsr(MSR_IA32_PERF_CTL, lo, hi);
258 lo = (lo & ~INTEL_MSR_RANGE) | (val & INTEL_MSR_RANGE);
259 wrmsr(MSR_IA32_PERF_CTL, lo, hi);
260 }
261
cpu_freq_read_amd(struct acpi_pct_register * not_used)262 static u32 cpu_freq_read_amd(struct acpi_pct_register *not_used)
263 {
264 u32 val, dummy __always_unused;
265
266 rdmsr(MSR_AMD_PERF_CTL, val, dummy);
267 return val;
268 }
269
cpu_freq_write_amd(struct acpi_pct_register * not_used,u32 val)270 static void cpu_freq_write_amd(struct acpi_pct_register *not_used, u32 val)
271 {
272 wrmsr(MSR_AMD_PERF_CTL, val, 0);
273 }
274
cpu_freq_read_io(struct acpi_pct_register * reg)275 static u32 cpu_freq_read_io(struct acpi_pct_register *reg)
276 {
277 u32 val;
278
279 acpi_os_read_port(reg->address, &val, reg->bit_width);
280 return val;
281 }
282
cpu_freq_write_io(struct acpi_pct_register * reg,u32 val)283 static void cpu_freq_write_io(struct acpi_pct_register *reg, u32 val)
284 {
285 acpi_os_write_port(reg->address, val, reg->bit_width);
286 }
287
288 struct drv_cmd {
289 struct acpi_pct_register *reg;
290 u32 val;
291 union {
292 void (*write)(struct acpi_pct_register *reg, u32 val);
293 u32 (*read)(struct acpi_pct_register *reg);
294 } func;
295 };
296
297 /* Called via smp_call_function_single(), on the target CPU */
do_drv_read(void * _cmd)298 static void do_drv_read(void *_cmd)
299 {
300 struct drv_cmd *cmd = _cmd;
301
302 cmd->val = cmd->func.read(cmd->reg);
303 }
304
drv_read(struct acpi_cpufreq_data * data,const struct cpumask * mask)305 static u32 drv_read(struct acpi_cpufreq_data *data, const struct cpumask *mask)
306 {
307 struct acpi_processor_performance *perf = to_perf_data(data);
308 struct drv_cmd cmd = {
309 .reg = &perf->control_register,
310 .func.read = data->cpu_freq_read,
311 };
312 int err;
313
314 err = smp_call_function_any(mask, do_drv_read, &cmd, 1);
315 WARN_ON_ONCE(err); /* smp_call_function_any() was buggy? */
316 return cmd.val;
317 }
318
319 /* Called via smp_call_function_many(), on the target CPUs */
do_drv_write(void * _cmd)320 static void do_drv_write(void *_cmd)
321 {
322 struct drv_cmd *cmd = _cmd;
323
324 cmd->func.write(cmd->reg, cmd->val);
325 }
326
drv_write(struct acpi_cpufreq_data * data,const struct cpumask * mask,u32 val)327 static void drv_write(struct acpi_cpufreq_data *data,
328 const struct cpumask *mask, u32 val)
329 {
330 struct acpi_processor_performance *perf = to_perf_data(data);
331 struct drv_cmd cmd = {
332 .reg = &perf->control_register,
333 .val = val,
334 .func.write = data->cpu_freq_write,
335 };
336 int this_cpu;
337
338 this_cpu = get_cpu();
339 if (cpumask_test_cpu(this_cpu, mask))
340 do_drv_write(&cmd);
341
342 smp_call_function_many(mask, do_drv_write, &cmd, 1);
343 put_cpu();
344 }
345
get_cur_val(const struct cpumask * mask,struct acpi_cpufreq_data * data)346 static u32 get_cur_val(const struct cpumask *mask, struct acpi_cpufreq_data *data)
347 {
348 u32 val;
349
350 if (unlikely(cpumask_empty(mask)))
351 return 0;
352
353 val = drv_read(data, mask);
354
355 pr_debug("%s = %u\n", __func__, val);
356
357 return val;
358 }
359
get_cur_freq_on_cpu(unsigned int cpu)360 static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
361 {
362 struct acpi_cpufreq_data *data;
363 struct cpufreq_policy *policy;
364 unsigned int freq;
365 unsigned int cached_freq;
366
367 pr_debug("%s (%d)\n", __func__, cpu);
368
369 policy = cpufreq_cpu_get_raw(cpu);
370 if (unlikely(!policy))
371 return 0;
372
373 data = policy->driver_data;
374 if (unlikely(!data || !policy->freq_table))
375 return 0;
376
377 cached_freq = policy->freq_table[to_perf_data(data)->state].frequency;
378 freq = extract_freq(policy, get_cur_val(cpumask_of(cpu), data));
379 if (freq != cached_freq) {
380 /*
381 * The dreaded BIOS frequency change behind our back.
382 * Force set the frequency on next target call.
383 */
384 data->resume = 1;
385 }
386
387 pr_debug("cur freq = %u\n", freq);
388
389 return freq;
390 }
391
check_freqs(struct cpufreq_policy * policy,const struct cpumask * mask,unsigned int freq)392 static unsigned int check_freqs(struct cpufreq_policy *policy,
393 const struct cpumask *mask, unsigned int freq)
394 {
395 struct acpi_cpufreq_data *data = policy->driver_data;
396 unsigned int cur_freq;
397 unsigned int i;
398
399 for (i = 0; i < 100; i++) {
400 cur_freq = extract_freq(policy, get_cur_val(mask, data));
401 if (cur_freq == freq)
402 return 1;
403 udelay(10);
404 }
405 return 0;
406 }
407
acpi_cpufreq_target(struct cpufreq_policy * policy,unsigned int index)408 static int acpi_cpufreq_target(struct cpufreq_policy *policy,
409 unsigned int index)
410 {
411 struct acpi_cpufreq_data *data = policy->driver_data;
412 struct acpi_processor_performance *perf;
413 const struct cpumask *mask;
414 unsigned int next_perf_state = 0; /* Index into perf table */
415 int result = 0;
416
417 if (unlikely(!data)) {
418 return -ENODEV;
419 }
420
421 perf = to_perf_data(data);
422 next_perf_state = policy->freq_table[index].driver_data;
423 if (perf->state == next_perf_state) {
424 if (unlikely(data->resume)) {
425 pr_debug("Called after resume, resetting to P%d\n",
426 next_perf_state);
427 data->resume = 0;
428 } else {
429 pr_debug("Already at target state (P%d)\n",
430 next_perf_state);
431 return 0;
432 }
433 }
434
435 /*
436 * The core won't allow CPUs to go away until the governor has been
437 * stopped, so we can rely on the stability of policy->cpus.
438 */
439 mask = policy->shared_type == CPUFREQ_SHARED_TYPE_ANY ?
440 cpumask_of(policy->cpu) : policy->cpus;
441
442 drv_write(data, mask, perf->states[next_perf_state].control);
443
444 if (acpi_pstate_strict) {
445 if (!check_freqs(policy, mask,
446 policy->freq_table[index].frequency)) {
447 pr_debug("%s (%d)\n", __func__, policy->cpu);
448 result = -EAGAIN;
449 }
450 }
451
452 if (!result)
453 perf->state = next_perf_state;
454
455 return result;
456 }
457
acpi_cpufreq_fast_switch(struct cpufreq_policy * policy,unsigned int target_freq)458 static unsigned int acpi_cpufreq_fast_switch(struct cpufreq_policy *policy,
459 unsigned int target_freq)
460 {
461 struct acpi_cpufreq_data *data = policy->driver_data;
462 struct acpi_processor_performance *perf;
463 struct cpufreq_frequency_table *entry;
464 unsigned int next_perf_state, next_freq, index;
465
466 /*
467 * Find the closest frequency above target_freq.
468 */
469 if (policy->cached_target_freq == target_freq)
470 index = policy->cached_resolved_idx;
471 else
472 index = cpufreq_table_find_index_dl(policy, target_freq);
473
474 entry = &policy->freq_table[index];
475 next_freq = entry->frequency;
476 next_perf_state = entry->driver_data;
477
478 perf = to_perf_data(data);
479 if (perf->state == next_perf_state) {
480 if (unlikely(data->resume))
481 data->resume = 0;
482 else
483 return next_freq;
484 }
485
486 data->cpu_freq_write(&perf->control_register,
487 perf->states[next_perf_state].control);
488 perf->state = next_perf_state;
489 return next_freq;
490 }
491
492 static unsigned long
acpi_cpufreq_guess_freq(struct acpi_cpufreq_data * data,unsigned int cpu)493 acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
494 {
495 struct acpi_processor_performance *perf;
496
497 perf = to_perf_data(data);
498 if (cpu_khz) {
499 /* search the closest match to cpu_khz */
500 unsigned int i;
501 unsigned long freq;
502 unsigned long freqn = perf->states[0].core_frequency * 1000;
503
504 for (i = 0; i < (perf->state_count-1); i++) {
505 freq = freqn;
506 freqn = perf->states[i+1].core_frequency * 1000;
507 if ((2 * cpu_khz) > (freqn + freq)) {
508 perf->state = i;
509 return freq;
510 }
511 }
512 perf->state = perf->state_count-1;
513 return freqn;
514 } else {
515 /* assume CPU is at P0... */
516 perf->state = 0;
517 return perf->states[0].core_frequency * 1000;
518 }
519 }
520
free_acpi_perf_data(void)521 static void free_acpi_perf_data(void)
522 {
523 unsigned int i;
524
525 /* Freeing a NULL pointer is OK, and alloc_percpu zeroes. */
526 for_each_possible_cpu(i)
527 free_cpumask_var(per_cpu_ptr(acpi_perf_data, i)
528 ->shared_cpu_map);
529 free_percpu(acpi_perf_data);
530 }
531
cpufreq_boost_online(unsigned int cpu)532 static int cpufreq_boost_online(unsigned int cpu)
533 {
534 /*
535 * On the CPU_UP path we simply keep the boost-disable flag
536 * in sync with the current global state.
537 */
538 return boost_set_msr(acpi_cpufreq_driver.boost_enabled);
539 }
540
cpufreq_boost_down_prep(unsigned int cpu)541 static int cpufreq_boost_down_prep(unsigned int cpu)
542 {
543 /*
544 * Clear the boost-disable bit on the CPU_DOWN path so that
545 * this cpu cannot block the remaining ones from boosting.
546 */
547 return boost_set_msr(1);
548 }
549
550 /*
551 * acpi_cpufreq_early_init - initialize ACPI P-States library
552 *
553 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
554 * in order to determine correct frequency and voltage pairings. We can
555 * do _PDC and _PSD and find out the processor dependency for the
556 * actual init that will happen later...
557 */
acpi_cpufreq_early_init(void)558 static int __init acpi_cpufreq_early_init(void)
559 {
560 unsigned int i;
561 pr_debug("%s\n", __func__);
562
563 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
564 if (!acpi_perf_data) {
565 pr_debug("Memory allocation error for acpi_perf_data.\n");
566 return -ENOMEM;
567 }
568 for_each_possible_cpu(i) {
569 if (!zalloc_cpumask_var_node(
570 &per_cpu_ptr(acpi_perf_data, i)->shared_cpu_map,
571 GFP_KERNEL, cpu_to_node(i))) {
572
573 /* Freeing a NULL pointer is OK: alloc_percpu zeroes. */
574 free_acpi_perf_data();
575 return -ENOMEM;
576 }
577 }
578
579 /* Do initialization in ACPI core */
580 acpi_processor_preregister_performance(acpi_perf_data);
581 return 0;
582 }
583
584 #ifdef CONFIG_SMP
585 /*
586 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
587 * or do it in BIOS firmware and won't inform about it to OS. If not
588 * detected, this has a side effect of making CPU run at a different speed
589 * than OS intended it to run at. Detect it and handle it cleanly.
590 */
591 static int bios_with_sw_any_bug;
592
sw_any_bug_found(const struct dmi_system_id * d)593 static int sw_any_bug_found(const struct dmi_system_id *d)
594 {
595 bios_with_sw_any_bug = 1;
596 return 0;
597 }
598
599 static const struct dmi_system_id sw_any_bug_dmi_table[] = {
600 {
601 .callback = sw_any_bug_found,
602 .ident = "Supermicro Server X6DLP",
603 .matches = {
604 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
605 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
606 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
607 },
608 },
609 { }
610 };
611
acpi_cpufreq_blacklist(struct cpuinfo_x86 * c)612 static int acpi_cpufreq_blacklist(struct cpuinfo_x86 *c)
613 {
614 /* Intel Xeon Processor 7100 Series Specification Update
615 * https://www.intel.com/Assets/PDF/specupdate/314554.pdf
616 * AL30: A Machine Check Exception (MCE) Occurring during an
617 * Enhanced Intel SpeedStep Technology Ratio Change May Cause
618 * Both Processor Cores to Lock Up. */
619 if (c->x86_vendor == X86_VENDOR_INTEL) {
620 if ((c->x86 == 15) &&
621 (c->x86_model == 6) &&
622 (c->x86_stepping == 8)) {
623 pr_info("Intel(R) Xeon(R) 7100 Errata AL30, processors may lock up on frequency changes: disabling acpi-cpufreq\n");
624 return -ENODEV;
625 }
626 }
627 return 0;
628 }
629 #endif
630
acpi_cpufreq_cpu_init(struct cpufreq_policy * policy)631 static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
632 {
633 unsigned int i;
634 unsigned int valid_states = 0;
635 unsigned int cpu = policy->cpu;
636 struct acpi_cpufreq_data *data;
637 unsigned int result = 0;
638 struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
639 struct acpi_processor_performance *perf;
640 struct cpufreq_frequency_table *freq_table;
641 #ifdef CONFIG_SMP
642 static int blacklisted;
643 #endif
644
645 pr_debug("%s\n", __func__);
646
647 #ifdef CONFIG_SMP
648 if (blacklisted)
649 return blacklisted;
650 blacklisted = acpi_cpufreq_blacklist(c);
651 if (blacklisted)
652 return blacklisted;
653 #endif
654
655 data = kzalloc(sizeof(*data), GFP_KERNEL);
656 if (!data)
657 return -ENOMEM;
658
659 if (!zalloc_cpumask_var(&data->freqdomain_cpus, GFP_KERNEL)) {
660 result = -ENOMEM;
661 goto err_free;
662 }
663
664 perf = per_cpu_ptr(acpi_perf_data, cpu);
665 data->acpi_perf_cpu = cpu;
666 policy->driver_data = data;
667
668 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
669 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
670
671 result = acpi_processor_register_performance(perf, cpu);
672 if (result)
673 goto err_free_mask;
674
675 policy->shared_type = perf->shared_type;
676
677 /*
678 * Will let policy->cpus know about dependency only when software
679 * coordination is required.
680 */
681 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
682 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
683 cpumask_copy(policy->cpus, perf->shared_cpu_map);
684 }
685 cpumask_copy(data->freqdomain_cpus, perf->shared_cpu_map);
686
687 #ifdef CONFIG_SMP
688 dmi_check_system(sw_any_bug_dmi_table);
689 if (bios_with_sw_any_bug && !policy_is_shared(policy)) {
690 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
691 cpumask_copy(policy->cpus, topology_core_cpumask(cpu));
692 }
693
694 if (check_amd_hwpstate_cpu(cpu) && boot_cpu_data.x86 < 0x19 &&
695 !acpi_pstate_strict) {
696 cpumask_clear(policy->cpus);
697 cpumask_set_cpu(cpu, policy->cpus);
698 cpumask_copy(data->freqdomain_cpus,
699 topology_sibling_cpumask(cpu));
700 policy->shared_type = CPUFREQ_SHARED_TYPE_HW;
701 pr_info_once("overriding BIOS provided _PSD data\n");
702 }
703 #endif
704
705 /* capability check */
706 if (perf->state_count <= 1) {
707 pr_debug("No P-States\n");
708 result = -ENODEV;
709 goto err_unreg;
710 }
711
712 if (perf->control_register.space_id != perf->status_register.space_id) {
713 result = -ENODEV;
714 goto err_unreg;
715 }
716
717 switch (perf->control_register.space_id) {
718 case ACPI_ADR_SPACE_SYSTEM_IO:
719 if (boot_cpu_data.x86_vendor == X86_VENDOR_AMD &&
720 boot_cpu_data.x86 == 0xf) {
721 pr_debug("AMD K8 systems must use native drivers.\n");
722 result = -ENODEV;
723 goto err_unreg;
724 }
725 pr_debug("SYSTEM IO addr space\n");
726 data->cpu_feature = SYSTEM_IO_CAPABLE;
727 data->cpu_freq_read = cpu_freq_read_io;
728 data->cpu_freq_write = cpu_freq_write_io;
729 break;
730 case ACPI_ADR_SPACE_FIXED_HARDWARE:
731 pr_debug("HARDWARE addr space\n");
732 if (check_est_cpu(cpu)) {
733 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
734 data->cpu_freq_read = cpu_freq_read_intel;
735 data->cpu_freq_write = cpu_freq_write_intel;
736 break;
737 }
738 if (check_amd_hwpstate_cpu(cpu)) {
739 data->cpu_feature = SYSTEM_AMD_MSR_CAPABLE;
740 data->cpu_freq_read = cpu_freq_read_amd;
741 data->cpu_freq_write = cpu_freq_write_amd;
742 break;
743 }
744 result = -ENODEV;
745 goto err_unreg;
746 default:
747 pr_debug("Unknown addr space %d\n",
748 (u32) (perf->control_register.space_id));
749 result = -ENODEV;
750 goto err_unreg;
751 }
752
753 freq_table = kcalloc(perf->state_count + 1, sizeof(*freq_table),
754 GFP_KERNEL);
755 if (!freq_table) {
756 result = -ENOMEM;
757 goto err_unreg;
758 }
759
760 /* detect transition latency */
761 policy->cpuinfo.transition_latency = 0;
762 for (i = 0; i < perf->state_count; i++) {
763 if ((perf->states[i].transition_latency * 1000) >
764 policy->cpuinfo.transition_latency)
765 policy->cpuinfo.transition_latency =
766 perf->states[i].transition_latency * 1000;
767 }
768
769 /* Check for high latency (>20uS) from buggy BIOSes, like on T42 */
770 if (perf->control_register.space_id == ACPI_ADR_SPACE_FIXED_HARDWARE &&
771 policy->cpuinfo.transition_latency > 20 * 1000) {
772 policy->cpuinfo.transition_latency = 20 * 1000;
773 pr_info_once("P-state transition latency capped at 20 uS\n");
774 }
775
776 /* table init */
777 for (i = 0; i < perf->state_count; i++) {
778 if (i > 0 && perf->states[i].core_frequency >=
779 freq_table[valid_states-1].frequency / 1000)
780 continue;
781
782 freq_table[valid_states].driver_data = i;
783 freq_table[valid_states].frequency =
784 perf->states[i].core_frequency * 1000;
785 valid_states++;
786 }
787 freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
788 policy->freq_table = freq_table;
789 perf->state = 0;
790
791 switch (perf->control_register.space_id) {
792 case ACPI_ADR_SPACE_SYSTEM_IO:
793 /*
794 * The core will not set policy->cur, because
795 * cpufreq_driver->get is NULL, so we need to set it here.
796 * However, we have to guess it, because the current speed is
797 * unknown and not detectable via IO ports.
798 */
799 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
800 break;
801 case ACPI_ADR_SPACE_FIXED_HARDWARE:
802 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
803 break;
804 default:
805 break;
806 }
807
808 /* notify BIOS that we exist */
809 acpi_processor_notify_smm(THIS_MODULE);
810
811 pr_debug("CPU%u - ACPI performance management activated.\n", cpu);
812 for (i = 0; i < perf->state_count; i++)
813 pr_debug(" %cP%d: %d MHz, %d mW, %d uS\n",
814 (i == perf->state ? '*' : ' '), i,
815 (u32) perf->states[i].core_frequency,
816 (u32) perf->states[i].power,
817 (u32) perf->states[i].transition_latency);
818
819 /*
820 * the first call to ->target() should result in us actually
821 * writing something to the appropriate registers.
822 */
823 data->resume = 1;
824
825 policy->fast_switch_possible = !acpi_pstate_strict &&
826 !(policy_is_shared(policy) && policy->shared_type != CPUFREQ_SHARED_TYPE_ANY);
827
828 return result;
829
830 err_unreg:
831 acpi_processor_unregister_performance(cpu);
832 err_free_mask:
833 free_cpumask_var(data->freqdomain_cpus);
834 err_free:
835 kfree(data);
836 policy->driver_data = NULL;
837
838 return result;
839 }
840
acpi_cpufreq_cpu_exit(struct cpufreq_policy * policy)841 static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
842 {
843 struct acpi_cpufreq_data *data = policy->driver_data;
844
845 pr_debug("%s\n", __func__);
846
847 policy->fast_switch_possible = false;
848 policy->driver_data = NULL;
849 acpi_processor_unregister_performance(data->acpi_perf_cpu);
850 free_cpumask_var(data->freqdomain_cpus);
851 kfree(policy->freq_table);
852 kfree(data);
853
854 return 0;
855 }
856
acpi_cpufreq_cpu_ready(struct cpufreq_policy * policy)857 static void acpi_cpufreq_cpu_ready(struct cpufreq_policy *policy)
858 {
859 struct acpi_processor_performance *perf = per_cpu_ptr(acpi_perf_data,
860 policy->cpu);
861
862 if (perf->states[0].core_frequency * 1000 != policy->cpuinfo.max_freq)
863 pr_warn(FW_WARN "P-state 0 is not max freq\n");
864 }
865
acpi_cpufreq_resume(struct cpufreq_policy * policy)866 static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
867 {
868 struct acpi_cpufreq_data *data = policy->driver_data;
869
870 pr_debug("%s\n", __func__);
871
872 data->resume = 1;
873
874 return 0;
875 }
876
877 static struct freq_attr *acpi_cpufreq_attr[] = {
878 &cpufreq_freq_attr_scaling_available_freqs,
879 &freqdomain_cpus,
880 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
881 &cpb,
882 #endif
883 NULL,
884 };
885
886 static struct cpufreq_driver acpi_cpufreq_driver = {
887 .verify = cpufreq_generic_frequency_table_verify,
888 .target_index = acpi_cpufreq_target,
889 .fast_switch = acpi_cpufreq_fast_switch,
890 .bios_limit = acpi_processor_get_bios_limit,
891 .init = acpi_cpufreq_cpu_init,
892 .exit = acpi_cpufreq_cpu_exit,
893 .ready = acpi_cpufreq_cpu_ready,
894 .resume = acpi_cpufreq_resume,
895 .name = "acpi-cpufreq",
896 .attr = acpi_cpufreq_attr,
897 };
898
899 static enum cpuhp_state acpi_cpufreq_online;
900
acpi_cpufreq_boost_init(void)901 static void __init acpi_cpufreq_boost_init(void)
902 {
903 int ret;
904
905 if (!(boot_cpu_has(X86_FEATURE_CPB) || boot_cpu_has(X86_FEATURE_IDA))) {
906 pr_debug("Boost capabilities not present in the processor\n");
907 return;
908 }
909
910 acpi_cpufreq_driver.set_boost = set_boost;
911 acpi_cpufreq_driver.boost_enabled = boost_state(0);
912
913 /*
914 * This calls the online callback on all online cpu and forces all
915 * MSRs to the same value.
916 */
917 ret = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "cpufreq/acpi:online",
918 cpufreq_boost_online, cpufreq_boost_down_prep);
919 if (ret < 0) {
920 pr_err("acpi_cpufreq: failed to register hotplug callbacks\n");
921 return;
922 }
923 acpi_cpufreq_online = ret;
924 }
925
acpi_cpufreq_boost_exit(void)926 static void acpi_cpufreq_boost_exit(void)
927 {
928 if (acpi_cpufreq_online > 0)
929 cpuhp_remove_state_nocalls(acpi_cpufreq_online);
930 }
931
acpi_cpufreq_init(void)932 static int __init acpi_cpufreq_init(void)
933 {
934 int ret;
935
936 if (acpi_disabled)
937 return -ENODEV;
938
939 /* don't keep reloading if cpufreq_driver exists */
940 if (cpufreq_get_current_driver())
941 return -EEXIST;
942
943 pr_debug("%s\n", __func__);
944
945 ret = acpi_cpufreq_early_init();
946 if (ret)
947 return ret;
948
949 #ifdef CONFIG_X86_ACPI_CPUFREQ_CPB
950 /* this is a sysfs file with a strange name and an even stranger
951 * semantic - per CPU instantiation, but system global effect.
952 * Lets enable it only on AMD CPUs for compatibility reasons and
953 * only if configured. This is considered legacy code, which
954 * will probably be removed at some point in the future.
955 */
956 if (!check_amd_hwpstate_cpu(0)) {
957 struct freq_attr **attr;
958
959 pr_debug("CPB unsupported, do not expose it\n");
960
961 for (attr = acpi_cpufreq_attr; *attr; attr++)
962 if (*attr == &cpb) {
963 *attr = NULL;
964 break;
965 }
966 }
967 #endif
968 acpi_cpufreq_boost_init();
969
970 ret = cpufreq_register_driver(&acpi_cpufreq_driver);
971 if (ret) {
972 free_acpi_perf_data();
973 acpi_cpufreq_boost_exit();
974 }
975 return ret;
976 }
977
acpi_cpufreq_exit(void)978 static void __exit acpi_cpufreq_exit(void)
979 {
980 pr_debug("%s\n", __func__);
981
982 acpi_cpufreq_boost_exit();
983
984 cpufreq_unregister_driver(&acpi_cpufreq_driver);
985
986 free_acpi_perf_data();
987 }
988
989 module_param(acpi_pstate_strict, uint, 0644);
990 MODULE_PARM_DESC(acpi_pstate_strict,
991 "value 0 or non-zero. non-zero -> strict ACPI checks are "
992 "performed during frequency changes.");
993
994 late_initcall(acpi_cpufreq_init);
995 module_exit(acpi_cpufreq_exit);
996
997 static const struct x86_cpu_id __maybe_unused acpi_cpufreq_ids[] = {
998 X86_MATCH_FEATURE(X86_FEATURE_ACPI, NULL),
999 X86_MATCH_FEATURE(X86_FEATURE_HW_PSTATE, NULL),
1000 {}
1001 };
1002 MODULE_DEVICE_TABLE(x86cpu, acpi_cpufreq_ids);
1003
1004 static const struct acpi_device_id __maybe_unused processor_device_ids[] = {
1005 {ACPI_PROCESSOR_OBJECT_HID, },
1006 {ACPI_PROCESSOR_DEVICE_HID, },
1007 {},
1008 };
1009 MODULE_DEVICE_TABLE(acpi, processor_device_ids);
1010
1011 MODULE_ALIAS("acpi");
1012