1 /*
2 * linux/include/linux/mmc/host.h
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * Host driver specific definitions.
9 */
10 #ifndef LINUX_MMC_HOST_H
11 #define LINUX_MMC_HOST_H
12
13 #include <linux/leds.h>
14 #include <linux/sched.h>
15 #include <linux/fault-inject.h>
16
17 #include <linux/mmc/core.h>
18 #include <linux/mmc/pm.h>
19
20 struct mmc_ios {
21 unsigned int clock; /* clock rate */
22 unsigned short vdd;
23
24 /* vdd stores the bit number of the selected voltage range from below. */
25
26 unsigned char bus_mode; /* command output mode */
27
28 #define MMC_BUSMODE_OPENDRAIN 1
29 #define MMC_BUSMODE_PUSHPULL 2
30
31 unsigned char chip_select; /* SPI chip select */
32
33 #define MMC_CS_DONTCARE 0
34 #define MMC_CS_HIGH 1
35 #define MMC_CS_LOW 2
36
37 unsigned char power_mode; /* power supply mode */
38
39 #define MMC_POWER_OFF 0
40 #define MMC_POWER_UP 1
41 #define MMC_POWER_ON 2
42
43 unsigned char bus_width; /* data bus width */
44
45 #define MMC_BUS_WIDTH_1 0
46 #define MMC_BUS_WIDTH_4 2
47 #define MMC_BUS_WIDTH_8 3
48
49 unsigned char timing; /* timing specification used */
50
51 #define MMC_TIMING_LEGACY 0
52 #define MMC_TIMING_MMC_HS 1
53 #define MMC_TIMING_SD_HS 2
54 #define MMC_TIMING_UHS_SDR12 MMC_TIMING_LEGACY
55 #define MMC_TIMING_UHS_SDR25 MMC_TIMING_SD_HS
56 #define MMC_TIMING_UHS_SDR50 3
57 #define MMC_TIMING_UHS_SDR104 4
58 #define MMC_TIMING_UHS_DDR50 5
59 #define MMC_TIMING_MMC_HS200 6
60
61 #define MMC_SDR_MODE 0
62 #define MMC_1_2V_DDR_MODE 1
63 #define MMC_1_8V_DDR_MODE 2
64 #define MMC_1_2V_SDR_MODE 3
65 #define MMC_1_8V_SDR_MODE 4
66
67 unsigned char signal_voltage; /* signalling voltage (1.8V or 3.3V) */
68
69 #define MMC_SIGNAL_VOLTAGE_330 0
70 #define MMC_SIGNAL_VOLTAGE_180 1
71 #define MMC_SIGNAL_VOLTAGE_120 2
72
73 unsigned char drv_type; /* driver type (A, B, C, D) */
74
75 #define MMC_SET_DRIVER_TYPE_B 0
76 #define MMC_SET_DRIVER_TYPE_A 1
77 #define MMC_SET_DRIVER_TYPE_C 2
78 #define MMC_SET_DRIVER_TYPE_D 3
79 };
80
81 struct mmc_host_ops {
82 /*
83 * Hosts that support power saving can use the 'enable' and 'disable'
84 * methods to exit and enter power saving states. 'enable' is called
85 * when the host is claimed and 'disable' is called (or scheduled with
86 * a delay) when the host is released. The 'disable' is scheduled if
87 * the disable delay set by 'mmc_set_disable_delay()' is non-zero,
88 * otherwise 'disable' is called immediately. 'disable' may be
89 * scheduled repeatedly, to permit ever greater power saving at the
90 * expense of ever greater latency to re-enable. Rescheduling is
91 * determined by the return value of the 'disable' method. A positive
92 * value gives the delay in milliseconds.
93 *
94 * In the case where a host function (like set_ios) may be called
95 * with or without the host claimed, enabling and disabling can be
96 * done directly and will nest correctly. Call 'mmc_host_enable()' and
97 * 'mmc_host_lazy_disable()' for this purpose, but note that these
98 * functions must be paired.
99 *
100 * Alternatively, 'mmc_host_enable()' may be paired with
101 * 'mmc_host_disable()' which calls 'disable' immediately. In this
102 * case the 'disable' method will be called with 'lazy' set to 0.
103 * This is mainly useful for error paths.
104 *
105 * Because lazy disable may be called from a work queue, the 'disable'
106 * method must claim the host when 'lazy' != 0, which will work
107 * correctly because recursion is detected and handled.
108 */
109 int (*enable)(struct mmc_host *host);
110 int (*disable)(struct mmc_host *host, int lazy);
111 /*
112 * It is optional for the host to implement pre_req and post_req in
113 * order to support double buffering of requests (prepare one
114 * request while another request is active).
115 * pre_req() must always be followed by a post_req().
116 * To undo a call made to pre_req(), call post_req() with
117 * a nonzero err condition.
118 */
119 void (*post_req)(struct mmc_host *host, struct mmc_request *req,
120 int err);
121 void (*pre_req)(struct mmc_host *host, struct mmc_request *req,
122 bool is_first_req);
123 void (*request)(struct mmc_host *host, struct mmc_request *req);
124 /*
125 * Avoid calling these three functions too often or in a "fast path",
126 * since underlaying controller might implement them in an expensive
127 * and/or slow way.
128 *
129 * Also note that these functions might sleep, so don't call them
130 * in the atomic contexts!
131 *
132 * Return values for the get_ro callback should be:
133 * 0 for a read/write card
134 * 1 for a read-only card
135 * -ENOSYS when not supported (equal to NULL callback)
136 * or a negative errno value when something bad happened
137 *
138 * Return values for the get_cd callback should be:
139 * 0 for a absent card
140 * 1 for a present card
141 * -ENOSYS when not supported (equal to NULL callback)
142 * or a negative errno value when something bad happened
143 */
144 void (*set_ios)(struct mmc_host *host, struct mmc_ios *ios);
145 int (*get_ro)(struct mmc_host *host);
146 int (*get_cd)(struct mmc_host *host);
147
148 void (*enable_sdio_irq)(struct mmc_host *host, int enable);
149
150 /* optional callback for HC quirks */
151 void (*init_card)(struct mmc_host *host, struct mmc_card *card);
152
153 int (*start_signal_voltage_switch)(struct mmc_host *host, struct mmc_ios *ios);
154
155 /* The tuning command opcode value is different for SD and eMMC cards */
156 int (*execute_tuning)(struct mmc_host *host, u32 opcode);
157 void (*enable_preset_value)(struct mmc_host *host, bool enable);
158 int (*select_drive_strength)(unsigned int max_dtr, int host_drv, int card_drv);
159 void (*hw_reset)(struct mmc_host *host);
160 };
161
162 struct mmc_card;
163 struct device;
164
165 struct mmc_async_req {
166 /* active mmc request */
167 struct mmc_request *mrq;
168 /*
169 * Check error status of completed mmc request.
170 * Returns 0 if success otherwise non zero.
171 */
172 int (*err_check) (struct mmc_card *, struct mmc_async_req *);
173 };
174
175 struct mmc_hotplug {
176 unsigned int irq;
177 void *handler_priv;
178 };
179
180 struct mmc_host {
181 struct device *parent;
182 struct device class_dev;
183 int index;
184 const struct mmc_host_ops *ops;
185 unsigned int f_min;
186 unsigned int f_max;
187 unsigned int f_init;
188 u32 ocr_avail;
189 u32 ocr_avail_sdio; /* SDIO-specific OCR */
190 u32 ocr_avail_sd; /* SD-specific OCR */
191 u32 ocr_avail_mmc; /* MMC-specific OCR */
192 struct notifier_block pm_notify;
193
194 #define MMC_VDD_165_195 0x00000080 /* VDD voltage 1.65 - 1.95 */
195 #define MMC_VDD_20_21 0x00000100 /* VDD voltage 2.0 ~ 2.1 */
196 #define MMC_VDD_21_22 0x00000200 /* VDD voltage 2.1 ~ 2.2 */
197 #define MMC_VDD_22_23 0x00000400 /* VDD voltage 2.2 ~ 2.3 */
198 #define MMC_VDD_23_24 0x00000800 /* VDD voltage 2.3 ~ 2.4 */
199 #define MMC_VDD_24_25 0x00001000 /* VDD voltage 2.4 ~ 2.5 */
200 #define MMC_VDD_25_26 0x00002000 /* VDD voltage 2.5 ~ 2.6 */
201 #define MMC_VDD_26_27 0x00004000 /* VDD voltage 2.6 ~ 2.7 */
202 #define MMC_VDD_27_28 0x00008000 /* VDD voltage 2.7 ~ 2.8 */
203 #define MMC_VDD_28_29 0x00010000 /* VDD voltage 2.8 ~ 2.9 */
204 #define MMC_VDD_29_30 0x00020000 /* VDD voltage 2.9 ~ 3.0 */
205 #define MMC_VDD_30_31 0x00040000 /* VDD voltage 3.0 ~ 3.1 */
206 #define MMC_VDD_31_32 0x00080000 /* VDD voltage 3.1 ~ 3.2 */
207 #define MMC_VDD_32_33 0x00100000 /* VDD voltage 3.2 ~ 3.3 */
208 #define MMC_VDD_33_34 0x00200000 /* VDD voltage 3.3 ~ 3.4 */
209 #define MMC_VDD_34_35 0x00400000 /* VDD voltage 3.4 ~ 3.5 */
210 #define MMC_VDD_35_36 0x00800000 /* VDD voltage 3.5 ~ 3.6 */
211
212 unsigned long caps; /* Host capabilities */
213
214 #define MMC_CAP_4_BIT_DATA (1 << 0) /* Can the host do 4 bit transfers */
215 #define MMC_CAP_MMC_HIGHSPEED (1 << 1) /* Can do MMC high-speed timing */
216 #define MMC_CAP_SD_HIGHSPEED (1 << 2) /* Can do SD high-speed timing */
217 #define MMC_CAP_SDIO_IRQ (1 << 3) /* Can signal pending SDIO IRQs */
218 #define MMC_CAP_SPI (1 << 4) /* Talks only SPI protocols */
219 #define MMC_CAP_NEEDS_POLL (1 << 5) /* Needs polling for card-detection */
220 #define MMC_CAP_8_BIT_DATA (1 << 6) /* Can the host do 8 bit transfers */
221 #define MMC_CAP_DISABLE (1 << 7) /* Can the host be disabled */
222 #define MMC_CAP_NONREMOVABLE (1 << 8) /* Nonremovable e.g. eMMC */
223 #define MMC_CAP_WAIT_WHILE_BUSY (1 << 9) /* Waits while card is busy */
224 #define MMC_CAP_ERASE (1 << 10) /* Allow erase/trim commands */
225 #define MMC_CAP_1_8V_DDR (1 << 11) /* can support */
226 /* DDR mode at 1.8V */
227 #define MMC_CAP_1_2V_DDR (1 << 12) /* can support */
228 /* DDR mode at 1.2V */
229 #define MMC_CAP_POWER_OFF_CARD (1 << 13) /* Can power off after boot */
230 #define MMC_CAP_BUS_WIDTH_TEST (1 << 14) /* CMD14/CMD19 bus width ok */
231 #define MMC_CAP_UHS_SDR12 (1 << 15) /* Host supports UHS SDR12 mode */
232 #define MMC_CAP_UHS_SDR25 (1 << 16) /* Host supports UHS SDR25 mode */
233 #define MMC_CAP_UHS_SDR50 (1 << 17) /* Host supports UHS SDR50 mode */
234 #define MMC_CAP_UHS_SDR104 (1 << 18) /* Host supports UHS SDR104 mode */
235 #define MMC_CAP_UHS_DDR50 (1 << 19) /* Host supports UHS DDR50 mode */
236 #define MMC_CAP_SET_XPC_330 (1 << 20) /* Host supports >150mA current at 3.3V */
237 #define MMC_CAP_SET_XPC_300 (1 << 21) /* Host supports >150mA current at 3.0V */
238 #define MMC_CAP_SET_XPC_180 (1 << 22) /* Host supports >150mA current at 1.8V */
239 #define MMC_CAP_DRIVER_TYPE_A (1 << 23) /* Host supports Driver Type A */
240 #define MMC_CAP_DRIVER_TYPE_C (1 << 24) /* Host supports Driver Type C */
241 #define MMC_CAP_DRIVER_TYPE_D (1 << 25) /* Host supports Driver Type D */
242 #define MMC_CAP_MAX_CURRENT_200 (1 << 26) /* Host max current limit is 200mA */
243 #define MMC_CAP_MAX_CURRENT_400 (1 << 27) /* Host max current limit is 400mA */
244 #define MMC_CAP_MAX_CURRENT_600 (1 << 28) /* Host max current limit is 600mA */
245 #define MMC_CAP_MAX_CURRENT_800 (1 << 29) /* Host max current limit is 800mA */
246 #define MMC_CAP_CMD23 (1 << 30) /* CMD23 supported. */
247 #define MMC_CAP_HW_RESET (1 << 31) /* Hardware reset */
248
249 unsigned int caps2; /* More host capabilities */
250
251 #define MMC_CAP2_BOOTPART_NOACC (1 << 0) /* Boot partition no access */
252 #define MMC_CAP2_CACHE_CTRL (1 << 1) /* Allow cache control */
253 #define MMC_CAP2_POWEROFF_NOTIFY (1 << 2) /* Notify poweroff supported */
254 #define MMC_CAP2_NO_MULTI_READ (1 << 3) /* Multiblock reads don't work */
255 #define MMC_CAP2_NO_SLEEP_CMD (1 << 4) /* Don't allow sleep command */
256 #define MMC_CAP2_HS200_1_8V_SDR (1 << 5) /* can support */
257 #define MMC_CAP2_HS200_1_2V_SDR (1 << 6) /* can support */
258 #define MMC_CAP2_HS200 (MMC_CAP2_HS200_1_8V_SDR | \
259 MMC_CAP2_HS200_1_2V_SDR)
260 #define MMC_CAP2_BROKEN_VOLTAGE (1 << 7) /* Use the broken voltage */
261
262 mmc_pm_flag_t pm_caps; /* supported pm features */
263 unsigned int power_notify_type;
264 #define MMC_HOST_PW_NOTIFY_NONE 0
265 #define MMC_HOST_PW_NOTIFY_SHORT 1
266 #define MMC_HOST_PW_NOTIFY_LONG 2
267
268 #ifdef CONFIG_MMC_CLKGATE
269 int clk_requests; /* internal reference counter */
270 unsigned int clk_delay; /* number of MCI clk hold cycles */
271 bool clk_gated; /* clock gated */
272 struct delayed_work clk_gate_work; /* delayed clock gate */
273 unsigned int clk_old; /* old clock value cache */
274 spinlock_t clk_lock; /* lock for clk fields */
275 struct mutex clk_gate_mutex; /* mutex for clock gating */
276 struct device_attribute clkgate_delay_attr;
277 unsigned long clkgate_delay;
278 #endif
279
280 /* host specific block data */
281 unsigned int max_seg_size; /* see blk_queue_max_segment_size */
282 unsigned short max_segs; /* see blk_queue_max_segments */
283 unsigned short unused;
284 unsigned int max_req_size; /* maximum number of bytes in one req */
285 unsigned int max_blk_size; /* maximum size of one mmc block */
286 unsigned int max_blk_count; /* maximum number of blocks in one req */
287 unsigned int max_discard_to; /* max. discard timeout in ms */
288
289 /* private data */
290 spinlock_t lock; /* lock for claim and bus ops */
291
292 struct mmc_ios ios; /* current io bus settings */
293 u32 ocr; /* the current OCR setting */
294
295 /* group bitfields together to minimize padding */
296 unsigned int use_spi_crc:1;
297 unsigned int claimed:1; /* host exclusively claimed */
298 unsigned int bus_dead:1; /* bus has been released */
299 #ifdef CONFIG_MMC_DEBUG
300 unsigned int removed:1; /* host is being removed */
301 #endif
302
303 /* Only used with MMC_CAP_DISABLE */
304 int enabled; /* host is enabled */
305 int rescan_disable; /* disable card detection */
306 int nesting_cnt; /* "enable" nesting count */
307 int en_dis_recurs; /* detect recursion */
308 unsigned int disable_delay; /* disable delay in msecs */
309 struct delayed_work disable; /* disabling work */
310
311 struct mmc_card *card; /* device attached to this host */
312
313 wait_queue_head_t wq;
314 struct task_struct *claimer; /* task that has host claimed */
315 int claim_cnt; /* "claim" nesting count */
316
317 struct delayed_work detect;
318 int detect_change; /* card detect flag */
319 struct mmc_hotplug hotplug;
320
321 const struct mmc_bus_ops *bus_ops; /* current bus driver */
322 unsigned int bus_refs; /* reference counter */
323
324 unsigned int sdio_irqs;
325 struct task_struct *sdio_irq_thread;
326 atomic_t sdio_irq_thread_abort;
327
328 mmc_pm_flag_t pm_flags; /* requested pm features */
329
330 #ifdef CONFIG_LEDS_TRIGGERS
331 struct led_trigger *led; /* activity led */
332 #endif
333
334 #ifdef CONFIG_REGULATOR
335 bool regulator_enabled; /* regulator state */
336 #endif
337
338 struct dentry *debugfs_root;
339
340 struct mmc_async_req *areq; /* active async req */
341
342 #ifdef CONFIG_FAIL_MMC_REQUEST
343 struct fault_attr fail_mmc_request;
344 #endif
345
346 unsigned int actual_clock; /* Actual HC clock rate */
347
348 unsigned long private[0] ____cacheline_aligned;
349 };
350
351 extern struct mmc_host *mmc_alloc_host(int extra, struct device *);
352 extern int mmc_add_host(struct mmc_host *);
353 extern void mmc_remove_host(struct mmc_host *);
354 extern void mmc_free_host(struct mmc_host *);
355
mmc_priv(struct mmc_host * host)356 static inline void *mmc_priv(struct mmc_host *host)
357 {
358 return (void *)host->private;
359 }
360
361 #define mmc_host_is_spi(host) ((host)->caps & MMC_CAP_SPI)
362
363 #define mmc_dev(x) ((x)->parent)
364 #define mmc_classdev(x) (&(x)->class_dev)
365 #define mmc_hostname(x) (dev_name(&(x)->class_dev))
366
367 extern int mmc_suspend_host(struct mmc_host *);
368 extern int mmc_resume_host(struct mmc_host *);
369
370 extern int mmc_power_save_host(struct mmc_host *host);
371 extern int mmc_power_restore_host(struct mmc_host *host);
372
373 extern void mmc_detect_change(struct mmc_host *, unsigned long delay);
374 extern void mmc_request_done(struct mmc_host *, struct mmc_request *);
375
376 extern int mmc_cache_ctrl(struct mmc_host *, u8);
377
mmc_signal_sdio_irq(struct mmc_host * host)378 static inline void mmc_signal_sdio_irq(struct mmc_host *host)
379 {
380 host->ops->enable_sdio_irq(host, 0);
381 wake_up_process(host->sdio_irq_thread);
382 }
383
384 struct regulator;
385
386 #ifdef CONFIG_REGULATOR
387 int mmc_regulator_get_ocrmask(struct regulator *supply);
388 int mmc_regulator_set_ocr(struct mmc_host *mmc,
389 struct regulator *supply,
390 unsigned short vdd_bit);
391 #else
mmc_regulator_get_ocrmask(struct regulator * supply)392 static inline int mmc_regulator_get_ocrmask(struct regulator *supply)
393 {
394 return 0;
395 }
396
mmc_regulator_set_ocr(struct mmc_host * mmc,struct regulator * supply,unsigned short vdd_bit)397 static inline int mmc_regulator_set_ocr(struct mmc_host *mmc,
398 struct regulator *supply,
399 unsigned short vdd_bit)
400 {
401 return 0;
402 }
403 #endif
404
405 int mmc_card_awake(struct mmc_host *host);
406 int mmc_card_sleep(struct mmc_host *host);
407 int mmc_card_can_sleep(struct mmc_host *host);
408
409 int mmc_host_enable(struct mmc_host *host);
410 int mmc_host_disable(struct mmc_host *host);
411 int mmc_host_lazy_disable(struct mmc_host *host);
412 int mmc_pm_notify(struct notifier_block *notify_block, unsigned long, void *);
413
mmc_set_disable_delay(struct mmc_host * host,unsigned int disable_delay)414 static inline void mmc_set_disable_delay(struct mmc_host *host,
415 unsigned int disable_delay)
416 {
417 host->disable_delay = disable_delay;
418 }
419
420 /* Module parameter */
421 extern bool mmc_assume_removable;
422
mmc_card_is_removable(struct mmc_host * host)423 static inline int mmc_card_is_removable(struct mmc_host *host)
424 {
425 return !(host->caps & MMC_CAP_NONREMOVABLE) && mmc_assume_removable;
426 }
427
mmc_card_keep_power(struct mmc_host * host)428 static inline int mmc_card_keep_power(struct mmc_host *host)
429 {
430 return host->pm_flags & MMC_PM_KEEP_POWER;
431 }
432
mmc_card_wake_sdio_irq(struct mmc_host * host)433 static inline int mmc_card_wake_sdio_irq(struct mmc_host *host)
434 {
435 return host->pm_flags & MMC_PM_WAKE_SDIO_IRQ;
436 }
437
mmc_host_cmd23(struct mmc_host * host)438 static inline int mmc_host_cmd23(struct mmc_host *host)
439 {
440 return host->caps & MMC_CAP_CMD23;
441 }
442
mmc_boot_partition_access(struct mmc_host * host)443 static inline int mmc_boot_partition_access(struct mmc_host *host)
444 {
445 return !(host->caps2 & MMC_CAP2_BOOTPART_NOACC);
446 }
447
448 #ifdef CONFIG_MMC_CLKGATE
449 void mmc_host_clk_hold(struct mmc_host *host);
450 void mmc_host_clk_release(struct mmc_host *host);
451 unsigned int mmc_host_clk_rate(struct mmc_host *host);
452
453 #else
mmc_host_clk_hold(struct mmc_host * host)454 static inline void mmc_host_clk_hold(struct mmc_host *host)
455 {
456 }
457
mmc_host_clk_release(struct mmc_host * host)458 static inline void mmc_host_clk_release(struct mmc_host *host)
459 {
460 }
461
mmc_host_clk_rate(struct mmc_host * host)462 static inline unsigned int mmc_host_clk_rate(struct mmc_host *host)
463 {
464 return host->ios.clock;
465 }
466 #endif
467 #endif /* LINUX_MMC_HOST_H */
468