1 #ifndef _LINUX_IRQ_H
2 #define _LINUX_IRQ_H
3
4 /*
5 * Please do not include this file in generic code. There is currently
6 * no requirement for any architecture to implement anything held
7 * within this file.
8 *
9 * Thanks. --rmk
10 */
11
12 #include <linux/smp.h>
13
14 #ifndef CONFIG_S390
15
16 #include <linux/linkage.h>
17 #include <linux/cache.h>
18 #include <linux/spinlock.h>
19 #include <linux/cpumask.h>
20 #include <linux/gfp.h>
21 #include <linux/irqreturn.h>
22 #include <linux/irqnr.h>
23 #include <linux/errno.h>
24 #include <linux/topology.h>
25 #include <linux/wait.h>
26
27 #include <asm/irq.h>
28 #include <asm/ptrace.h>
29 #include <asm/irq_regs.h>
30
31 struct seq_file;
32 struct module;
33 struct irq_desc;
34 struct irq_data;
35 typedef void (*irq_flow_handler_t)(unsigned int irq,
36 struct irq_desc *desc);
37 typedef void (*irq_preflow_handler_t)(struct irq_data *data);
38
39 /*
40 * IRQ line status.
41 *
42 * Bits 0-7 are the same as the IRQF_* bits in linux/interrupt.h
43 *
44 * IRQ_TYPE_NONE - default, unspecified type
45 * IRQ_TYPE_EDGE_RISING - rising edge triggered
46 * IRQ_TYPE_EDGE_FALLING - falling edge triggered
47 * IRQ_TYPE_EDGE_BOTH - rising and falling edge triggered
48 * IRQ_TYPE_LEVEL_HIGH - high level triggered
49 * IRQ_TYPE_LEVEL_LOW - low level triggered
50 * IRQ_TYPE_LEVEL_MASK - Mask to filter out the level bits
51 * IRQ_TYPE_SENSE_MASK - Mask for all the above bits
52 * IRQ_TYPE_PROBE - Special flag for probing in progress
53 *
54 * Bits which can be modified via irq_set/clear/modify_status_flags()
55 * IRQ_LEVEL - Interrupt is level type. Will be also
56 * updated in the code when the above trigger
57 * bits are modified via irq_set_irq_type()
58 * IRQ_PER_CPU - Mark an interrupt PER_CPU. Will protect
59 * it from affinity setting
60 * IRQ_NOPROBE - Interrupt cannot be probed by autoprobing
61 * IRQ_NOREQUEST - Interrupt cannot be requested via
62 * request_irq()
63 * IRQ_NOTHREAD - Interrupt cannot be threaded
64 * IRQ_NOAUTOEN - Interrupt is not automatically enabled in
65 * request/setup_irq()
66 * IRQ_NO_BALANCING - Interrupt cannot be balanced (affinity set)
67 * IRQ_MOVE_PCNTXT - Interrupt can be migrated from process context
68 * IRQ_NESTED_TRHEAD - Interrupt nests into another thread
69 * IRQ_PER_CPU_DEVID - Dev_id is a per-cpu variable
70 */
71 enum {
72 IRQ_TYPE_NONE = 0x00000000,
73 IRQ_TYPE_EDGE_RISING = 0x00000001,
74 IRQ_TYPE_EDGE_FALLING = 0x00000002,
75 IRQ_TYPE_EDGE_BOTH = (IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING),
76 IRQ_TYPE_LEVEL_HIGH = 0x00000004,
77 IRQ_TYPE_LEVEL_LOW = 0x00000008,
78 IRQ_TYPE_LEVEL_MASK = (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH),
79 IRQ_TYPE_SENSE_MASK = 0x0000000f,
80
81 IRQ_TYPE_PROBE = 0x00000010,
82
83 IRQ_LEVEL = (1 << 8),
84 IRQ_PER_CPU = (1 << 9),
85 IRQ_NOPROBE = (1 << 10),
86 IRQ_NOREQUEST = (1 << 11),
87 IRQ_NOAUTOEN = (1 << 12),
88 IRQ_NO_BALANCING = (1 << 13),
89 IRQ_MOVE_PCNTXT = (1 << 14),
90 IRQ_NESTED_THREAD = (1 << 15),
91 IRQ_NOTHREAD = (1 << 16),
92 IRQ_PER_CPU_DEVID = (1 << 17),
93 };
94
95 #define IRQF_MODIFY_MASK \
96 (IRQ_TYPE_SENSE_MASK | IRQ_NOPROBE | IRQ_NOREQUEST | \
97 IRQ_NOAUTOEN | IRQ_MOVE_PCNTXT | IRQ_LEVEL | IRQ_NO_BALANCING | \
98 IRQ_PER_CPU | IRQ_NESTED_THREAD | IRQ_NOTHREAD | IRQ_PER_CPU_DEVID)
99
100 #define IRQ_NO_BALANCING_MASK (IRQ_PER_CPU | IRQ_NO_BALANCING)
101
102 /*
103 * Return value for chip->irq_set_affinity()
104 *
105 * IRQ_SET_MASK_OK - OK, core updates irq_data.affinity
106 * IRQ_SET_MASK_NOCPY - OK, chip did update irq_data.affinity
107 */
108 enum {
109 IRQ_SET_MASK_OK = 0,
110 IRQ_SET_MASK_OK_NOCOPY,
111 };
112
113 struct msi_desc;
114 struct irq_domain;
115
116 /**
117 * struct irq_data - per irq and irq chip data passed down to chip functions
118 * @irq: interrupt number
119 * @hwirq: hardware interrupt number, local to the interrupt domain
120 * @node: node index useful for balancing
121 * @state_use_accessors: status information for irq chip functions.
122 * Use accessor functions to deal with it
123 * @chip: low level interrupt hardware access
124 * @domain: Interrupt translation domain; responsible for mapping
125 * between hwirq number and linux irq number.
126 * @handler_data: per-IRQ data for the irq_chip methods
127 * @chip_data: platform-specific per-chip private data for the chip
128 * methods, to allow shared chip implementations
129 * @msi_desc: MSI descriptor
130 * @affinity: IRQ affinity on SMP
131 *
132 * The fields here need to overlay the ones in irq_desc until we
133 * cleaned up the direct references and switched everything over to
134 * irq_data.
135 */
136 struct irq_data {
137 unsigned int irq;
138 unsigned long hwirq;
139 unsigned int node;
140 unsigned int state_use_accessors;
141 struct irq_chip *chip;
142 struct irq_domain *domain;
143 void *handler_data;
144 void *chip_data;
145 struct msi_desc *msi_desc;
146 #ifdef CONFIG_SMP
147 cpumask_var_t affinity;
148 #endif
149 };
150
151 /*
152 * Bit masks for irq_data.state
153 *
154 * IRQD_TRIGGER_MASK - Mask for the trigger type bits
155 * IRQD_SETAFFINITY_PENDING - Affinity setting is pending
156 * IRQD_NO_BALANCING - Balancing disabled for this IRQ
157 * IRQD_PER_CPU - Interrupt is per cpu
158 * IRQD_AFFINITY_SET - Interrupt affinity was set
159 * IRQD_LEVEL - Interrupt is level triggered
160 * IRQD_WAKEUP_STATE - Interrupt is configured for wakeup
161 * from suspend
162 * IRDQ_MOVE_PCNTXT - Interrupt can be moved in process
163 * context
164 * IRQD_IRQ_DISABLED - Disabled state of the interrupt
165 * IRQD_IRQ_MASKED - Masked state of the interrupt
166 * IRQD_IRQ_INPROGRESS - In progress state of the interrupt
167 */
168 enum {
169 IRQD_TRIGGER_MASK = 0xf,
170 IRQD_SETAFFINITY_PENDING = (1 << 8),
171 IRQD_NO_BALANCING = (1 << 10),
172 IRQD_PER_CPU = (1 << 11),
173 IRQD_AFFINITY_SET = (1 << 12),
174 IRQD_LEVEL = (1 << 13),
175 IRQD_WAKEUP_STATE = (1 << 14),
176 IRQD_MOVE_PCNTXT = (1 << 15),
177 IRQD_IRQ_DISABLED = (1 << 16),
178 IRQD_IRQ_MASKED = (1 << 17),
179 IRQD_IRQ_INPROGRESS = (1 << 18),
180 };
181
irqd_is_setaffinity_pending(struct irq_data * d)182 static inline bool irqd_is_setaffinity_pending(struct irq_data *d)
183 {
184 return d->state_use_accessors & IRQD_SETAFFINITY_PENDING;
185 }
186
irqd_is_per_cpu(struct irq_data * d)187 static inline bool irqd_is_per_cpu(struct irq_data *d)
188 {
189 return d->state_use_accessors & IRQD_PER_CPU;
190 }
191
irqd_can_balance(struct irq_data * d)192 static inline bool irqd_can_balance(struct irq_data *d)
193 {
194 return !(d->state_use_accessors & (IRQD_PER_CPU | IRQD_NO_BALANCING));
195 }
196
irqd_affinity_was_set(struct irq_data * d)197 static inline bool irqd_affinity_was_set(struct irq_data *d)
198 {
199 return d->state_use_accessors & IRQD_AFFINITY_SET;
200 }
201
irqd_mark_affinity_was_set(struct irq_data * d)202 static inline void irqd_mark_affinity_was_set(struct irq_data *d)
203 {
204 d->state_use_accessors |= IRQD_AFFINITY_SET;
205 }
206
irqd_get_trigger_type(struct irq_data * d)207 static inline u32 irqd_get_trigger_type(struct irq_data *d)
208 {
209 return d->state_use_accessors & IRQD_TRIGGER_MASK;
210 }
211
212 /*
213 * Must only be called inside irq_chip.irq_set_type() functions.
214 */
irqd_set_trigger_type(struct irq_data * d,u32 type)215 static inline void irqd_set_trigger_type(struct irq_data *d, u32 type)
216 {
217 d->state_use_accessors &= ~IRQD_TRIGGER_MASK;
218 d->state_use_accessors |= type & IRQD_TRIGGER_MASK;
219 }
220
irqd_is_level_type(struct irq_data * d)221 static inline bool irqd_is_level_type(struct irq_data *d)
222 {
223 return d->state_use_accessors & IRQD_LEVEL;
224 }
225
irqd_is_wakeup_set(struct irq_data * d)226 static inline bool irqd_is_wakeup_set(struct irq_data *d)
227 {
228 return d->state_use_accessors & IRQD_WAKEUP_STATE;
229 }
230
irqd_can_move_in_process_context(struct irq_data * d)231 static inline bool irqd_can_move_in_process_context(struct irq_data *d)
232 {
233 return d->state_use_accessors & IRQD_MOVE_PCNTXT;
234 }
235
irqd_irq_disabled(struct irq_data * d)236 static inline bool irqd_irq_disabled(struct irq_data *d)
237 {
238 return d->state_use_accessors & IRQD_IRQ_DISABLED;
239 }
240
irqd_irq_masked(struct irq_data * d)241 static inline bool irqd_irq_masked(struct irq_data *d)
242 {
243 return d->state_use_accessors & IRQD_IRQ_MASKED;
244 }
245
irqd_irq_inprogress(struct irq_data * d)246 static inline bool irqd_irq_inprogress(struct irq_data *d)
247 {
248 return d->state_use_accessors & IRQD_IRQ_INPROGRESS;
249 }
250
251 /*
252 * Functions for chained handlers which can be enabled/disabled by the
253 * standard disable_irq/enable_irq calls. Must be called with
254 * irq_desc->lock held.
255 */
irqd_set_chained_irq_inprogress(struct irq_data * d)256 static inline void irqd_set_chained_irq_inprogress(struct irq_data *d)
257 {
258 d->state_use_accessors |= IRQD_IRQ_INPROGRESS;
259 }
260
irqd_clr_chained_irq_inprogress(struct irq_data * d)261 static inline void irqd_clr_chained_irq_inprogress(struct irq_data *d)
262 {
263 d->state_use_accessors &= ~IRQD_IRQ_INPROGRESS;
264 }
265
266 /**
267 * struct irq_chip - hardware interrupt chip descriptor
268 *
269 * @name: name for /proc/interrupts
270 * @irq_startup: start up the interrupt (defaults to ->enable if NULL)
271 * @irq_shutdown: shut down the interrupt (defaults to ->disable if NULL)
272 * @irq_enable: enable the interrupt (defaults to chip->unmask if NULL)
273 * @irq_disable: disable the interrupt
274 * @irq_ack: start of a new interrupt
275 * @irq_mask: mask an interrupt source
276 * @irq_mask_ack: ack and mask an interrupt source
277 * @irq_unmask: unmask an interrupt source
278 * @irq_eoi: end of interrupt
279 * @irq_set_affinity: set the CPU affinity on SMP machines
280 * @irq_retrigger: resend an IRQ to the CPU
281 * @irq_set_type: set the flow type (IRQ_TYPE_LEVEL/etc.) of an IRQ
282 * @irq_set_wake: enable/disable power-management wake-on of an IRQ
283 * @irq_bus_lock: function to lock access to slow bus (i2c) chips
284 * @irq_bus_sync_unlock:function to sync and unlock slow bus (i2c) chips
285 * @irq_cpu_online: configure an interrupt source for a secondary CPU
286 * @irq_cpu_offline: un-configure an interrupt source for a secondary CPU
287 * @irq_suspend: function called from core code on suspend once per chip
288 * @irq_resume: function called from core code on resume once per chip
289 * @irq_pm_shutdown: function called from core code on shutdown once per chip
290 * @irq_print_chip: optional to print special chip info in show_interrupts
291 * @flags: chip specific flags
292 *
293 * @release: release function solely used by UML
294 */
295 struct irq_chip {
296 const char *name;
297 unsigned int (*irq_startup)(struct irq_data *data);
298 void (*irq_shutdown)(struct irq_data *data);
299 void (*irq_enable)(struct irq_data *data);
300 void (*irq_disable)(struct irq_data *data);
301
302 void (*irq_ack)(struct irq_data *data);
303 void (*irq_mask)(struct irq_data *data);
304 void (*irq_mask_ack)(struct irq_data *data);
305 void (*irq_unmask)(struct irq_data *data);
306 void (*irq_eoi)(struct irq_data *data);
307
308 int (*irq_set_affinity)(struct irq_data *data, const struct cpumask *dest, bool force);
309 int (*irq_retrigger)(struct irq_data *data);
310 int (*irq_set_type)(struct irq_data *data, unsigned int flow_type);
311 int (*irq_set_wake)(struct irq_data *data, unsigned int on);
312
313 void (*irq_bus_lock)(struct irq_data *data);
314 void (*irq_bus_sync_unlock)(struct irq_data *data);
315
316 void (*irq_cpu_online)(struct irq_data *data);
317 void (*irq_cpu_offline)(struct irq_data *data);
318
319 void (*irq_suspend)(struct irq_data *data);
320 void (*irq_resume)(struct irq_data *data);
321 void (*irq_pm_shutdown)(struct irq_data *data);
322
323 void (*irq_print_chip)(struct irq_data *data, struct seq_file *p);
324
325 unsigned long flags;
326
327 /* Currently used only by UML, might disappear one day.*/
328 #ifdef CONFIG_IRQ_RELEASE_METHOD
329 void (*release)(unsigned int irq, void *dev_id);
330 #endif
331 };
332
333 /*
334 * irq_chip specific flags
335 *
336 * IRQCHIP_SET_TYPE_MASKED: Mask before calling chip.irq_set_type()
337 * IRQCHIP_EOI_IF_HANDLED: Only issue irq_eoi() when irq was handled
338 * IRQCHIP_MASK_ON_SUSPEND: Mask non wake irqs in the suspend path
339 * IRQCHIP_ONOFFLINE_ENABLED: Only call irq_on/off_line callbacks
340 * when irq enabled
341 * IRQCHIP_SKIP_SET_WAKE: Skip chip.irq_set_wake(), for this irq chip
342 */
343 enum {
344 IRQCHIP_SET_TYPE_MASKED = (1 << 0),
345 IRQCHIP_EOI_IF_HANDLED = (1 << 1),
346 IRQCHIP_MASK_ON_SUSPEND = (1 << 2),
347 IRQCHIP_ONOFFLINE_ENABLED = (1 << 3),
348 IRQCHIP_SKIP_SET_WAKE = (1 << 4),
349 };
350
351 /* This include will go away once we isolated irq_desc usage to core code */
352 #include <linux/irqdesc.h>
353
354 /*
355 * Pick up the arch-dependent methods:
356 */
357 #include <asm/hw_irq.h>
358
359 #ifndef NR_IRQS_LEGACY
360 # define NR_IRQS_LEGACY 0
361 #endif
362
363 #ifndef ARCH_IRQ_INIT_FLAGS
364 # define ARCH_IRQ_INIT_FLAGS 0
365 #endif
366
367 #define IRQ_DEFAULT_INIT_FLAGS ARCH_IRQ_INIT_FLAGS
368
369 struct irqaction;
370 extern int setup_irq(unsigned int irq, struct irqaction *new);
371 extern void remove_irq(unsigned int irq, struct irqaction *act);
372 extern int setup_percpu_irq(unsigned int irq, struct irqaction *new);
373 extern void remove_percpu_irq(unsigned int irq, struct irqaction *act);
374
375 extern void irq_cpu_online(void);
376 extern void irq_cpu_offline(void);
377 extern int __irq_set_affinity_locked(struct irq_data *data, const struct cpumask *cpumask);
378
379 #ifdef CONFIG_GENERIC_HARDIRQS
380
381 #if defined(CONFIG_SMP) && defined(CONFIG_GENERIC_PENDING_IRQ)
382 void irq_move_irq(struct irq_data *data);
383 void irq_move_masked_irq(struct irq_data *data);
384 #else
irq_move_irq(struct irq_data * data)385 static inline void irq_move_irq(struct irq_data *data) { }
irq_move_masked_irq(struct irq_data * data)386 static inline void irq_move_masked_irq(struct irq_data *data) { }
387 #endif
388
389 extern int no_irq_affinity;
390
391 /*
392 * Built-in IRQ handlers for various IRQ types,
393 * callable via desc->handle_irq()
394 */
395 extern void handle_level_irq(unsigned int irq, struct irq_desc *desc);
396 extern void handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc);
397 extern void handle_edge_irq(unsigned int irq, struct irq_desc *desc);
398 extern void handle_edge_eoi_irq(unsigned int irq, struct irq_desc *desc);
399 extern void handle_simple_irq(unsigned int irq, struct irq_desc *desc);
400 extern void handle_percpu_irq(unsigned int irq, struct irq_desc *desc);
401 extern void handle_percpu_devid_irq(unsigned int irq, struct irq_desc *desc);
402 extern void handle_bad_irq(unsigned int irq, struct irq_desc *desc);
403 extern void handle_nested_irq(unsigned int irq);
404
405 /* Handling of unhandled and spurious interrupts: */
406 extern void note_interrupt(unsigned int irq, struct irq_desc *desc,
407 irqreturn_t action_ret);
408
409
410 /* Enable/disable irq debugging output: */
411 extern int noirqdebug_setup(char *str);
412
413 /* Checks whether the interrupt can be requested by request_irq(): */
414 extern int can_request_irq(unsigned int irq, unsigned long irqflags);
415
416 /* Dummy irq-chip implementations: */
417 extern struct irq_chip no_irq_chip;
418 extern struct irq_chip dummy_irq_chip;
419
420 extern void
421 irq_set_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
422 irq_flow_handler_t handle, const char *name);
423
irq_set_chip_and_handler(unsigned int irq,struct irq_chip * chip,irq_flow_handler_t handle)424 static inline void irq_set_chip_and_handler(unsigned int irq, struct irq_chip *chip,
425 irq_flow_handler_t handle)
426 {
427 irq_set_chip_and_handler_name(irq, chip, handle, NULL);
428 }
429
430 extern int irq_set_percpu_devid(unsigned int irq);
431
432 extern void
433 __irq_set_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
434 const char *name);
435
436 static inline void
irq_set_handler(unsigned int irq,irq_flow_handler_t handle)437 irq_set_handler(unsigned int irq, irq_flow_handler_t handle)
438 {
439 __irq_set_handler(irq, handle, 0, NULL);
440 }
441
442 /*
443 * Set a highlevel chained flow handler for a given IRQ.
444 * (a chained handler is automatically enabled and set to
445 * IRQ_NOREQUEST, IRQ_NOPROBE, and IRQ_NOTHREAD)
446 */
447 static inline void
irq_set_chained_handler(unsigned int irq,irq_flow_handler_t handle)448 irq_set_chained_handler(unsigned int irq, irq_flow_handler_t handle)
449 {
450 __irq_set_handler(irq, handle, 1, NULL);
451 }
452
453 void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set);
454
irq_set_status_flags(unsigned int irq,unsigned long set)455 static inline void irq_set_status_flags(unsigned int irq, unsigned long set)
456 {
457 irq_modify_status(irq, 0, set);
458 }
459
irq_clear_status_flags(unsigned int irq,unsigned long clr)460 static inline void irq_clear_status_flags(unsigned int irq, unsigned long clr)
461 {
462 irq_modify_status(irq, clr, 0);
463 }
464
irq_set_noprobe(unsigned int irq)465 static inline void irq_set_noprobe(unsigned int irq)
466 {
467 irq_modify_status(irq, 0, IRQ_NOPROBE);
468 }
469
irq_set_probe(unsigned int irq)470 static inline void irq_set_probe(unsigned int irq)
471 {
472 irq_modify_status(irq, IRQ_NOPROBE, 0);
473 }
474
irq_set_nothread(unsigned int irq)475 static inline void irq_set_nothread(unsigned int irq)
476 {
477 irq_modify_status(irq, 0, IRQ_NOTHREAD);
478 }
479
irq_set_thread(unsigned int irq)480 static inline void irq_set_thread(unsigned int irq)
481 {
482 irq_modify_status(irq, IRQ_NOTHREAD, 0);
483 }
484
irq_set_nested_thread(unsigned int irq,bool nest)485 static inline void irq_set_nested_thread(unsigned int irq, bool nest)
486 {
487 if (nest)
488 irq_set_status_flags(irq, IRQ_NESTED_THREAD);
489 else
490 irq_clear_status_flags(irq, IRQ_NESTED_THREAD);
491 }
492
irq_set_percpu_devid_flags(unsigned int irq)493 static inline void irq_set_percpu_devid_flags(unsigned int irq)
494 {
495 irq_set_status_flags(irq,
496 IRQ_NOAUTOEN | IRQ_PER_CPU | IRQ_NOTHREAD |
497 IRQ_NOPROBE | IRQ_PER_CPU_DEVID);
498 }
499
500 /* Handle dynamic irq creation and destruction */
501 extern unsigned int create_irq_nr(unsigned int irq_want, int node);
502 extern int create_irq(void);
503 extern void destroy_irq(unsigned int irq);
504
505 /*
506 * Dynamic irq helper functions. Obsolete. Use irq_alloc_desc* and
507 * irq_free_desc instead.
508 */
509 extern void dynamic_irq_cleanup(unsigned int irq);
dynamic_irq_init(unsigned int irq)510 static inline void dynamic_irq_init(unsigned int irq)
511 {
512 dynamic_irq_cleanup(irq);
513 }
514
515 /* Set/get chip/data for an IRQ: */
516 extern int irq_set_chip(unsigned int irq, struct irq_chip *chip);
517 extern int irq_set_handler_data(unsigned int irq, void *data);
518 extern int irq_set_chip_data(unsigned int irq, void *data);
519 extern int irq_set_irq_type(unsigned int irq, unsigned int type);
520 extern int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry);
521 extern struct irq_data *irq_get_irq_data(unsigned int irq);
522
irq_get_chip(unsigned int irq)523 static inline struct irq_chip *irq_get_chip(unsigned int irq)
524 {
525 struct irq_data *d = irq_get_irq_data(irq);
526 return d ? d->chip : NULL;
527 }
528
irq_data_get_irq_chip(struct irq_data * d)529 static inline struct irq_chip *irq_data_get_irq_chip(struct irq_data *d)
530 {
531 return d->chip;
532 }
533
irq_get_chip_data(unsigned int irq)534 static inline void *irq_get_chip_data(unsigned int irq)
535 {
536 struct irq_data *d = irq_get_irq_data(irq);
537 return d ? d->chip_data : NULL;
538 }
539
irq_data_get_irq_chip_data(struct irq_data * d)540 static inline void *irq_data_get_irq_chip_data(struct irq_data *d)
541 {
542 return d->chip_data;
543 }
544
irq_get_handler_data(unsigned int irq)545 static inline void *irq_get_handler_data(unsigned int irq)
546 {
547 struct irq_data *d = irq_get_irq_data(irq);
548 return d ? d->handler_data : NULL;
549 }
550
irq_data_get_irq_handler_data(struct irq_data * d)551 static inline void *irq_data_get_irq_handler_data(struct irq_data *d)
552 {
553 return d->handler_data;
554 }
555
irq_get_msi_desc(unsigned int irq)556 static inline struct msi_desc *irq_get_msi_desc(unsigned int irq)
557 {
558 struct irq_data *d = irq_get_irq_data(irq);
559 return d ? d->msi_desc : NULL;
560 }
561
irq_data_get_msi(struct irq_data * d)562 static inline struct msi_desc *irq_data_get_msi(struct irq_data *d)
563 {
564 return d->msi_desc;
565 }
566
567 int __irq_alloc_descs(int irq, unsigned int from, unsigned int cnt, int node,
568 struct module *owner);
569
570 /* use macros to avoid needing export.h for THIS_MODULE */
571 #define irq_alloc_descs(irq, from, cnt, node) \
572 __irq_alloc_descs(irq, from, cnt, node, THIS_MODULE)
573
574 #define irq_alloc_desc(node) \
575 irq_alloc_descs(-1, 0, 1, node)
576
577 #define irq_alloc_desc_at(at, node) \
578 irq_alloc_descs(at, at, 1, node)
579
580 #define irq_alloc_desc_from(from, node) \
581 irq_alloc_descs(-1, from, 1, node)
582
583 void irq_free_descs(unsigned int irq, unsigned int cnt);
584 int irq_reserve_irqs(unsigned int from, unsigned int cnt);
585
irq_free_desc(unsigned int irq)586 static inline void irq_free_desc(unsigned int irq)
587 {
588 irq_free_descs(irq, 1);
589 }
590
irq_reserve_irq(unsigned int irq)591 static inline int irq_reserve_irq(unsigned int irq)
592 {
593 return irq_reserve_irqs(irq, 1);
594 }
595
596 #ifndef irq_reg_writel
597 # define irq_reg_writel(val, addr) writel(val, addr)
598 #endif
599 #ifndef irq_reg_readl
600 # define irq_reg_readl(addr) readl(addr)
601 #endif
602
603 /**
604 * struct irq_chip_regs - register offsets for struct irq_gci
605 * @enable: Enable register offset to reg_base
606 * @disable: Disable register offset to reg_base
607 * @mask: Mask register offset to reg_base
608 * @ack: Ack register offset to reg_base
609 * @eoi: Eoi register offset to reg_base
610 * @type: Type configuration register offset to reg_base
611 * @polarity: Polarity configuration register offset to reg_base
612 */
613 struct irq_chip_regs {
614 unsigned long enable;
615 unsigned long disable;
616 unsigned long mask;
617 unsigned long ack;
618 unsigned long eoi;
619 unsigned long type;
620 unsigned long polarity;
621 };
622
623 /**
624 * struct irq_chip_type - Generic interrupt chip instance for a flow type
625 * @chip: The real interrupt chip which provides the callbacks
626 * @regs: Register offsets for this chip
627 * @handler: Flow handler associated with this chip
628 * @type: Chip can handle these flow types
629 *
630 * A irq_generic_chip can have several instances of irq_chip_type when
631 * it requires different functions and register offsets for different
632 * flow types.
633 */
634 struct irq_chip_type {
635 struct irq_chip chip;
636 struct irq_chip_regs regs;
637 irq_flow_handler_t handler;
638 u32 type;
639 };
640
641 /**
642 * struct irq_chip_generic - Generic irq chip data structure
643 * @lock: Lock to protect register and cache data access
644 * @reg_base: Register base address (virtual)
645 * @irq_base: Interrupt base nr for this chip
646 * @irq_cnt: Number of interrupts handled by this chip
647 * @mask_cache: Cached mask register
648 * @type_cache: Cached type register
649 * @polarity_cache: Cached polarity register
650 * @wake_enabled: Interrupt can wakeup from suspend
651 * @wake_active: Interrupt is marked as an wakeup from suspend source
652 * @num_ct: Number of available irq_chip_type instances (usually 1)
653 * @private: Private data for non generic chip callbacks
654 * @list: List head for keeping track of instances
655 * @chip_types: Array of interrupt irq_chip_types
656 *
657 * Note, that irq_chip_generic can have multiple irq_chip_type
658 * implementations which can be associated to a particular irq line of
659 * an irq_chip_generic instance. That allows to share and protect
660 * state in an irq_chip_generic instance when we need to implement
661 * different flow mechanisms (level/edge) for it.
662 */
663 struct irq_chip_generic {
664 raw_spinlock_t lock;
665 void __iomem *reg_base;
666 unsigned int irq_base;
667 unsigned int irq_cnt;
668 u32 mask_cache;
669 u32 type_cache;
670 u32 polarity_cache;
671 u32 wake_enabled;
672 u32 wake_active;
673 unsigned int num_ct;
674 void *private;
675 struct list_head list;
676 struct irq_chip_type chip_types[0];
677 };
678
679 /**
680 * enum irq_gc_flags - Initialization flags for generic irq chips
681 * @IRQ_GC_INIT_MASK_CACHE: Initialize the mask_cache by reading mask reg
682 * @IRQ_GC_INIT_NESTED_LOCK: Set the lock class of the irqs to nested for
683 * irq chips which need to call irq_set_wake() on
684 * the parent irq. Usually GPIO implementations
685 */
686 enum irq_gc_flags {
687 IRQ_GC_INIT_MASK_CACHE = 1 << 0,
688 IRQ_GC_INIT_NESTED_LOCK = 1 << 1,
689 };
690
691 /* Generic chip callback functions */
692 void irq_gc_noop(struct irq_data *d);
693 void irq_gc_mask_disable_reg(struct irq_data *d);
694 void irq_gc_mask_set_bit(struct irq_data *d);
695 void irq_gc_mask_clr_bit(struct irq_data *d);
696 void irq_gc_unmask_enable_reg(struct irq_data *d);
697 void irq_gc_ack_set_bit(struct irq_data *d);
698 void irq_gc_ack_clr_bit(struct irq_data *d);
699 void irq_gc_mask_disable_reg_and_ack(struct irq_data *d);
700 void irq_gc_eoi(struct irq_data *d);
701 int irq_gc_set_wake(struct irq_data *d, unsigned int on);
702
703 /* Setup functions for irq_chip_generic */
704 struct irq_chip_generic *
705 irq_alloc_generic_chip(const char *name, int nr_ct, unsigned int irq_base,
706 void __iomem *reg_base, irq_flow_handler_t handler);
707 void irq_setup_generic_chip(struct irq_chip_generic *gc, u32 msk,
708 enum irq_gc_flags flags, unsigned int clr,
709 unsigned int set);
710 int irq_setup_alt_chip(struct irq_data *d, unsigned int type);
711 void irq_remove_generic_chip(struct irq_chip_generic *gc, u32 msk,
712 unsigned int clr, unsigned int set);
713
irq_data_get_chip_type(struct irq_data * d)714 static inline struct irq_chip_type *irq_data_get_chip_type(struct irq_data *d)
715 {
716 return container_of(d->chip, struct irq_chip_type, chip);
717 }
718
719 #define IRQ_MSK(n) (u32)((n) < 32 ? ((1 << (n)) - 1) : UINT_MAX)
720
721 #ifdef CONFIG_SMP
irq_gc_lock(struct irq_chip_generic * gc)722 static inline void irq_gc_lock(struct irq_chip_generic *gc)
723 {
724 raw_spin_lock(&gc->lock);
725 }
726
irq_gc_unlock(struct irq_chip_generic * gc)727 static inline void irq_gc_unlock(struct irq_chip_generic *gc)
728 {
729 raw_spin_unlock(&gc->lock);
730 }
731 #else
irq_gc_lock(struct irq_chip_generic * gc)732 static inline void irq_gc_lock(struct irq_chip_generic *gc) { }
irq_gc_unlock(struct irq_chip_generic * gc)733 static inline void irq_gc_unlock(struct irq_chip_generic *gc) { }
734 #endif
735
736 #endif /* CONFIG_GENERIC_HARDIRQS */
737
738 #endif /* !CONFIG_S390 */
739
740 #endif /* _LINUX_IRQ_H */
741