1 /*
2 * linux/drivers/video/ep93xx-fb.c
3 *
4 * Framebuffer support for the EP93xx series.
5 *
6 * Copyright (C) 2007 Bluewater Systems Ltd
7 * Author: Ryan Mallon
8 *
9 * Copyright (c) 2009 H Hartley Sweeten <hsweeten@visionengravers.com>
10 *
11 * Based on the Cirrus Logic ep93xxfb driver, and various other ep93xxfb
12 * drivers.
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
17 *
18 */
19
20 #include <linux/platform_device.h>
21 #include <linux/module.h>
22 #include <linux/dma-mapping.h>
23 #include <linux/slab.h>
24 #include <linux/clk.h>
25 #include <linux/fb.h>
26
27 #include <mach/fb.h>
28
29 /* Vertical Frame Timing Registers */
30 #define EP93XXFB_VLINES_TOTAL 0x0000 /* SW locked */
31 #define EP93XXFB_VSYNC 0x0004 /* SW locked */
32 #define EP93XXFB_VACTIVE 0x0008 /* SW locked */
33 #define EP93XXFB_VBLANK 0x0228 /* SW locked */
34 #define EP93XXFB_VCLK 0x000c /* SW locked */
35
36 /* Horizontal Frame Timing Registers */
37 #define EP93XXFB_HCLKS_TOTAL 0x0010 /* SW locked */
38 #define EP93XXFB_HSYNC 0x0014 /* SW locked */
39 #define EP93XXFB_HACTIVE 0x0018 /* SW locked */
40 #define EP93XXFB_HBLANK 0x022c /* SW locked */
41 #define EP93XXFB_HCLK 0x001c /* SW locked */
42
43 /* Frame Buffer Memory Configuration Registers */
44 #define EP93XXFB_SCREEN_PAGE 0x0028
45 #define EP93XXFB_SCREEN_HPAGE 0x002c
46 #define EP93XXFB_SCREEN_LINES 0x0030
47 #define EP93XXFB_LINE_LENGTH 0x0034
48 #define EP93XXFB_VLINE_STEP 0x0038
49 #define EP93XXFB_LINE_CARRY 0x003c /* SW locked */
50 #define EP93XXFB_EOL_OFFSET 0x0230
51
52 /* Other Video Registers */
53 #define EP93XXFB_BRIGHTNESS 0x0020
54 #define EP93XXFB_ATTRIBS 0x0024 /* SW locked */
55 #define EP93XXFB_SWLOCK 0x007c /* SW locked */
56 #define EP93XXFB_AC_RATE 0x0214
57 #define EP93XXFB_FIFO_LEVEL 0x0234
58 #define EP93XXFB_PIXELMODE 0x0054
59 #define EP93XXFB_PIXELMODE_32BPP (0x7 << 0)
60 #define EP93XXFB_PIXELMODE_24BPP (0x6 << 0)
61 #define EP93XXFB_PIXELMODE_16BPP (0x4 << 0)
62 #define EP93XXFB_PIXELMODE_8BPP (0x2 << 0)
63 #define EP93XXFB_PIXELMODE_SHIFT_1P_24B (0x0 << 3)
64 #define EP93XXFB_PIXELMODE_SHIFT_1P_18B (0x1 << 3)
65 #define EP93XXFB_PIXELMODE_COLOR_LUT (0x0 << 10)
66 #define EP93XXFB_PIXELMODE_COLOR_888 (0x4 << 10)
67 #define EP93XXFB_PIXELMODE_COLOR_555 (0x5 << 10)
68 #define EP93XXFB_PARL_IF_OUT 0x0058
69 #define EP93XXFB_PARL_IF_IN 0x005c
70
71 /* Blink Control Registers */
72 #define EP93XXFB_BLINK_RATE 0x0040
73 #define EP93XXFB_BLINK_MASK 0x0044
74 #define EP93XXFB_BLINK_PATTRN 0x0048
75 #define EP93XXFB_PATTRN_MASK 0x004c
76 #define EP93XXFB_BKGRND_OFFSET 0x0050
77
78 /* Hardware Cursor Registers */
79 #define EP93XXFB_CURSOR_ADR_START 0x0060
80 #define EP93XXFB_CURSOR_ADR_RESET 0x0064
81 #define EP93XXFB_CURSOR_SIZE 0x0068
82 #define EP93XXFB_CURSOR_COLOR1 0x006c
83 #define EP93XXFB_CURSOR_COLOR2 0x0070
84 #define EP93XXFB_CURSOR_BLINK_COLOR1 0x021c
85 #define EP93XXFB_CURSOR_BLINK_COLOR2 0x0220
86 #define EP93XXFB_CURSOR_XY_LOC 0x0074
87 #define EP93XXFB_CURSOR_DSCAN_HY_LOC 0x0078
88 #define EP93XXFB_CURSOR_BLINK_RATE_CTRL 0x0224
89
90 /* LUT Registers */
91 #define EP93XXFB_GRY_SCL_LUTR 0x0080
92 #define EP93XXFB_GRY_SCL_LUTG 0x0280
93 #define EP93XXFB_GRY_SCL_LUTB 0x0300
94 #define EP93XXFB_LUT_SW_CONTROL 0x0218
95 #define EP93XXFB_LUT_SW_CONTROL_SWTCH (1 << 0)
96 #define EP93XXFB_LUT_SW_CONTROL_SSTAT (1 << 1)
97 #define EP93XXFB_COLOR_LUT 0x0400
98
99 /* Video Signature Registers */
100 #define EP93XXFB_VID_SIG_RSLT_VAL 0x0200
101 #define EP93XXFB_VID_SIG_CTRL 0x0204
102 #define EP93XXFB_VSIG 0x0208
103 #define EP93XXFB_HSIG 0x020c
104 #define EP93XXFB_SIG_CLR_STR 0x0210
105
106 /* Minimum / Maximum resolutions supported */
107 #define EP93XXFB_MIN_XRES 64
108 #define EP93XXFB_MIN_YRES 64
109 #define EP93XXFB_MAX_XRES 1024
110 #define EP93XXFB_MAX_YRES 768
111
112 struct ep93xx_fbi {
113 struct ep93xxfb_mach_info *mach_info;
114 struct clk *clk;
115 struct resource *res;
116 void __iomem *mmio_base;
117 unsigned int pseudo_palette[256];
118 };
119
120 static int check_screenpage_bug = 1;
121 module_param(check_screenpage_bug, int, 0644);
122 MODULE_PARM_DESC(check_screenpage_bug,
123 "Check for bit 27 screen page bug. Default = 1");
124
ep93xxfb_readl(struct ep93xx_fbi * fbi,unsigned int off)125 static inline unsigned int ep93xxfb_readl(struct ep93xx_fbi *fbi,
126 unsigned int off)
127 {
128 return __raw_readl(fbi->mmio_base + off);
129 }
130
ep93xxfb_writel(struct ep93xx_fbi * fbi,unsigned int val,unsigned int off)131 static inline void ep93xxfb_writel(struct ep93xx_fbi *fbi,
132 unsigned int val, unsigned int off)
133 {
134 __raw_writel(val, fbi->mmio_base + off);
135 }
136
137 /*
138 * Write to one of the locked raster registers.
139 */
ep93xxfb_out_locked(struct ep93xx_fbi * fbi,unsigned int val,unsigned int reg)140 static inline void ep93xxfb_out_locked(struct ep93xx_fbi *fbi,
141 unsigned int val, unsigned int reg)
142 {
143 /*
144 * We don't need a lock or delay here since the raster register
145 * block will remain unlocked until the next access.
146 */
147 ep93xxfb_writel(fbi, 0xaa, EP93XXFB_SWLOCK);
148 ep93xxfb_writel(fbi, val, reg);
149 }
150
ep93xxfb_set_video_attribs(struct fb_info * info)151 static void ep93xxfb_set_video_attribs(struct fb_info *info)
152 {
153 struct ep93xx_fbi *fbi = info->par;
154 unsigned int attribs;
155
156 attribs = EP93XXFB_ENABLE;
157 attribs |= fbi->mach_info->flags;
158 ep93xxfb_out_locked(fbi, attribs, EP93XXFB_ATTRIBS);
159 }
160
ep93xxfb_set_pixelmode(struct fb_info * info)161 static int ep93xxfb_set_pixelmode(struct fb_info *info)
162 {
163 struct ep93xx_fbi *fbi = info->par;
164 unsigned int val;
165
166 info->var.transp.offset = 0;
167 info->var.transp.length = 0;
168
169 switch (info->var.bits_per_pixel) {
170 case 8:
171 val = EP93XXFB_PIXELMODE_8BPP | EP93XXFB_PIXELMODE_COLOR_LUT |
172 EP93XXFB_PIXELMODE_SHIFT_1P_18B;
173
174 info->var.red.offset = 0;
175 info->var.red.length = 8;
176 info->var.green.offset = 0;
177 info->var.green.length = 8;
178 info->var.blue.offset = 0;
179 info->var.blue.length = 8;
180 info->fix.visual = FB_VISUAL_PSEUDOCOLOR;
181 break;
182
183 case 16:
184 val = EP93XXFB_PIXELMODE_16BPP | EP93XXFB_PIXELMODE_COLOR_555 |
185 EP93XXFB_PIXELMODE_SHIFT_1P_18B;
186
187 info->var.red.offset = 11;
188 info->var.red.length = 5;
189 info->var.green.offset = 5;
190 info->var.green.length = 6;
191 info->var.blue.offset = 0;
192 info->var.blue.length = 5;
193 info->fix.visual = FB_VISUAL_TRUECOLOR;
194 break;
195
196 case 24:
197 val = EP93XXFB_PIXELMODE_24BPP | EP93XXFB_PIXELMODE_COLOR_888 |
198 EP93XXFB_PIXELMODE_SHIFT_1P_24B;
199
200 info->var.red.offset = 16;
201 info->var.red.length = 8;
202 info->var.green.offset = 8;
203 info->var.green.length = 8;
204 info->var.blue.offset = 0;
205 info->var.blue.length = 8;
206 info->fix.visual = FB_VISUAL_TRUECOLOR;
207 break;
208
209 case 32:
210 val = EP93XXFB_PIXELMODE_32BPP | EP93XXFB_PIXELMODE_COLOR_888 |
211 EP93XXFB_PIXELMODE_SHIFT_1P_24B;
212
213 info->var.red.offset = 16;
214 info->var.red.length = 8;
215 info->var.green.offset = 8;
216 info->var.green.length = 8;
217 info->var.blue.offset = 0;
218 info->var.blue.length = 8;
219 info->fix.visual = FB_VISUAL_TRUECOLOR;
220 break;
221
222 default:
223 return -EINVAL;
224 }
225
226 ep93xxfb_writel(fbi, val, EP93XXFB_PIXELMODE);
227 return 0;
228 }
229
ep93xxfb_set_timing(struct fb_info * info)230 static void ep93xxfb_set_timing(struct fb_info *info)
231 {
232 struct ep93xx_fbi *fbi = info->par;
233 unsigned int vlines_total, hclks_total, start, stop;
234
235 vlines_total = info->var.yres + info->var.upper_margin +
236 info->var.lower_margin + info->var.vsync_len - 1;
237
238 hclks_total = info->var.xres + info->var.left_margin +
239 info->var.right_margin + info->var.hsync_len - 1;
240
241 ep93xxfb_out_locked(fbi, vlines_total, EP93XXFB_VLINES_TOTAL);
242 ep93xxfb_out_locked(fbi, hclks_total, EP93XXFB_HCLKS_TOTAL);
243
244 start = vlines_total;
245 stop = vlines_total - info->var.vsync_len;
246 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VSYNC);
247
248 start = vlines_total - info->var.vsync_len - info->var.upper_margin;
249 stop = info->var.lower_margin - 1;
250 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VBLANK);
251 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VACTIVE);
252
253 start = vlines_total;
254 stop = vlines_total + 1;
255 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_VCLK);
256
257 start = hclks_total;
258 stop = hclks_total - info->var.hsync_len;
259 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HSYNC);
260
261 start = hclks_total - info->var.hsync_len - info->var.left_margin;
262 stop = info->var.right_margin - 1;
263 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HBLANK);
264 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HACTIVE);
265
266 start = hclks_total;
267 stop = hclks_total;
268 ep93xxfb_out_locked(fbi, start | (stop << 16), EP93XXFB_HCLK);
269
270 ep93xxfb_out_locked(fbi, 0x0, EP93XXFB_LINE_CARRY);
271 }
272
ep93xxfb_set_par(struct fb_info * info)273 static int ep93xxfb_set_par(struct fb_info *info)
274 {
275 struct ep93xx_fbi *fbi = info->par;
276
277 clk_set_rate(fbi->clk, 1000 * PICOS2KHZ(info->var.pixclock));
278
279 ep93xxfb_set_timing(info);
280
281 info->fix.line_length = info->var.xres_virtual *
282 info->var.bits_per_pixel / 8;
283
284 ep93xxfb_writel(fbi, info->fix.smem_start, EP93XXFB_SCREEN_PAGE);
285 ep93xxfb_writel(fbi, info->var.yres - 1, EP93XXFB_SCREEN_LINES);
286 ep93xxfb_writel(fbi, ((info->var.xres * info->var.bits_per_pixel)
287 / 32) - 1, EP93XXFB_LINE_LENGTH);
288 ep93xxfb_writel(fbi, info->fix.line_length / 4, EP93XXFB_VLINE_STEP);
289 ep93xxfb_set_video_attribs(info);
290 return 0;
291 }
292
ep93xxfb_check_var(struct fb_var_screeninfo * var,struct fb_info * info)293 static int ep93xxfb_check_var(struct fb_var_screeninfo *var,
294 struct fb_info *info)
295 {
296 int err;
297
298 err = ep93xxfb_set_pixelmode(info);
299 if (err)
300 return err;
301
302 var->xres = max_t(unsigned int, var->xres, EP93XXFB_MIN_XRES);
303 var->xres = min_t(unsigned int, var->xres, EP93XXFB_MAX_XRES);
304 var->xres_virtual = max(var->xres_virtual, var->xres);
305
306 var->yres = max_t(unsigned int, var->yres, EP93XXFB_MIN_YRES);
307 var->yres = min_t(unsigned int, var->yres, EP93XXFB_MAX_YRES);
308 var->yres_virtual = max(var->yres_virtual, var->yres);
309
310 return 0;
311 }
312
ep93xxfb_mmap(struct fb_info * info,struct vm_area_struct * vma)313 static int ep93xxfb_mmap(struct fb_info *info, struct vm_area_struct *vma)
314 {
315 unsigned int offset = vma->vm_pgoff << PAGE_SHIFT;
316
317 if (offset < info->fix.smem_len) {
318 return dma_mmap_writecombine(info->dev, vma, info->screen_base,
319 info->fix.smem_start,
320 info->fix.smem_len);
321 }
322
323 return -EINVAL;
324 }
325
ep93xxfb_blank(int blank_mode,struct fb_info * info)326 static int ep93xxfb_blank(int blank_mode, struct fb_info *info)
327 {
328 struct ep93xx_fbi *fbi = info->par;
329 unsigned int attribs = ep93xxfb_readl(fbi, EP93XXFB_ATTRIBS);
330
331 if (blank_mode) {
332 if (fbi->mach_info->blank)
333 fbi->mach_info->blank(blank_mode, info);
334 ep93xxfb_out_locked(fbi, attribs & ~EP93XXFB_ENABLE,
335 EP93XXFB_ATTRIBS);
336 clk_disable(fbi->clk);
337 } else {
338 clk_enable(fbi->clk);
339 ep93xxfb_out_locked(fbi, attribs | EP93XXFB_ENABLE,
340 EP93XXFB_ATTRIBS);
341 if (fbi->mach_info->blank)
342 fbi->mach_info->blank(blank_mode, info);
343 }
344
345 return 0;
346 }
347
ep93xxfb_convert_color(int val,int width)348 static inline int ep93xxfb_convert_color(int val, int width)
349 {
350 return ((val << width) + 0x7fff - val) >> 16;
351 }
352
ep93xxfb_setcolreg(unsigned int regno,unsigned int red,unsigned int green,unsigned int blue,unsigned int transp,struct fb_info * info)353 static int ep93xxfb_setcolreg(unsigned int regno, unsigned int red,
354 unsigned int green, unsigned int blue,
355 unsigned int transp, struct fb_info *info)
356 {
357 struct ep93xx_fbi *fbi = info->par;
358 unsigned int *pal = info->pseudo_palette;
359 unsigned int ctrl, i, rgb, lut_current, lut_stat;
360
361 switch (info->fix.visual) {
362 case FB_VISUAL_PSEUDOCOLOR:
363 if (regno > 255)
364 return 1;
365 rgb = ((red & 0xff00) << 8) | (green & 0xff00) |
366 ((blue & 0xff00) >> 8);
367
368 pal[regno] = rgb;
369 ep93xxfb_writel(fbi, rgb, (EP93XXFB_COLOR_LUT + (regno << 2)));
370 ctrl = ep93xxfb_readl(fbi, EP93XXFB_LUT_SW_CONTROL);
371 lut_stat = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SSTAT);
372 lut_current = !!(ctrl & EP93XXFB_LUT_SW_CONTROL_SWTCH);
373
374 if (lut_stat == lut_current) {
375 for (i = 0; i < 256; i++) {
376 ep93xxfb_writel(fbi, pal[i],
377 EP93XXFB_COLOR_LUT + (i << 2));
378 }
379
380 ep93xxfb_writel(fbi,
381 ctrl ^ EP93XXFB_LUT_SW_CONTROL_SWTCH,
382 EP93XXFB_LUT_SW_CONTROL);
383 }
384 break;
385
386 case FB_VISUAL_TRUECOLOR:
387 if (regno > 16)
388 return 1;
389
390 red = ep93xxfb_convert_color(red, info->var.red.length);
391 green = ep93xxfb_convert_color(green, info->var.green.length);
392 blue = ep93xxfb_convert_color(blue, info->var.blue.length);
393 transp = ep93xxfb_convert_color(transp,
394 info->var.transp.length);
395
396 pal[regno] = (red << info->var.red.offset) |
397 (green << info->var.green.offset) |
398 (blue << info->var.blue.offset) |
399 (transp << info->var.transp.offset);
400 break;
401
402 default:
403 return 1;
404 }
405
406 return 0;
407 }
408
409 static struct fb_ops ep93xxfb_ops = {
410 .owner = THIS_MODULE,
411 .fb_check_var = ep93xxfb_check_var,
412 .fb_set_par = ep93xxfb_set_par,
413 .fb_blank = ep93xxfb_blank,
414 .fb_fillrect = cfb_fillrect,
415 .fb_copyarea = cfb_copyarea,
416 .fb_imageblit = cfb_imageblit,
417 .fb_setcolreg = ep93xxfb_setcolreg,
418 .fb_mmap = ep93xxfb_mmap,
419 };
420
ep93xxfb_calc_fbsize(struct ep93xxfb_mach_info * mach_info)421 static int __init ep93xxfb_calc_fbsize(struct ep93xxfb_mach_info *mach_info)
422 {
423 int i, fb_size = 0;
424
425 if (mach_info->num_modes == EP93XXFB_USE_MODEDB) {
426 fb_size = EP93XXFB_MAX_XRES * EP93XXFB_MAX_YRES *
427 mach_info->bpp / 8;
428 } else {
429 for (i = 0; i < mach_info->num_modes; i++) {
430 const struct fb_videomode *mode;
431 int size;
432
433 mode = &mach_info->modes[i];
434 size = mode->xres * mode->yres * mach_info->bpp / 8;
435 if (size > fb_size)
436 fb_size = size;
437 }
438 }
439
440 return fb_size;
441 }
442
ep93xxfb_alloc_videomem(struct fb_info * info)443 static int __init ep93xxfb_alloc_videomem(struct fb_info *info)
444 {
445 struct ep93xx_fbi *fbi = info->par;
446 char __iomem *virt_addr;
447 dma_addr_t phys_addr;
448 unsigned int fb_size;
449
450 fb_size = ep93xxfb_calc_fbsize(fbi->mach_info);
451 virt_addr = dma_alloc_writecombine(info->dev, fb_size,
452 &phys_addr, GFP_KERNEL);
453 if (!virt_addr)
454 return -ENOMEM;
455
456 /*
457 * There is a bug in the ep93xx framebuffer which causes problems
458 * if bit 27 of the physical address is set.
459 * See: http://marc.info/?l=linux-arm-kernel&m=110061245502000&w=2
460 * There does not seem to be any official errata for this, but I
461 * have confirmed the problem exists on my hardware (ep9315) at
462 * least.
463 */
464 if (check_screenpage_bug && phys_addr & (1 << 27)) {
465 dev_err(info->dev, "ep93xx framebuffer bug. phys addr (0x%x) "
466 "has bit 27 set: cannot init framebuffer\n",
467 phys_addr);
468
469 dma_free_coherent(info->dev, fb_size, virt_addr, phys_addr);
470 return -ENOMEM;
471 }
472
473 info->fix.smem_start = phys_addr;
474 info->fix.smem_len = fb_size;
475 info->screen_base = virt_addr;
476
477 return 0;
478 }
479
ep93xxfb_dealloc_videomem(struct fb_info * info)480 static void ep93xxfb_dealloc_videomem(struct fb_info *info)
481 {
482 if (info->screen_base)
483 dma_free_coherent(info->dev, info->fix.smem_len,
484 info->screen_base, info->fix.smem_start);
485 }
486
ep93xxfb_probe(struct platform_device * pdev)487 static int __devinit ep93xxfb_probe(struct platform_device *pdev)
488 {
489 struct ep93xxfb_mach_info *mach_info = pdev->dev.platform_data;
490 struct fb_info *info;
491 struct ep93xx_fbi *fbi;
492 struct resource *res;
493 char *video_mode;
494 int err;
495
496 if (!mach_info)
497 return -EINVAL;
498
499 info = framebuffer_alloc(sizeof(struct ep93xx_fbi), &pdev->dev);
500 if (!info)
501 return -ENOMEM;
502
503 info->dev = &pdev->dev;
504 platform_set_drvdata(pdev, info);
505 fbi = info->par;
506 fbi->mach_info = mach_info;
507
508 err = fb_alloc_cmap(&info->cmap, 256, 0);
509 if (err)
510 goto failed;
511
512 err = ep93xxfb_alloc_videomem(info);
513 if (err)
514 goto failed;
515
516 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
517 if (!res) {
518 err = -ENXIO;
519 goto failed;
520 }
521
522 res = request_mem_region(res->start, resource_size(res), pdev->name);
523 if (!res) {
524 err = -EBUSY;
525 goto failed;
526 }
527
528 fbi->res = res;
529 fbi->mmio_base = ioremap(res->start, resource_size(res));
530 if (!fbi->mmio_base) {
531 err = -ENXIO;
532 goto failed;
533 }
534
535 strcpy(info->fix.id, pdev->name);
536 info->fbops = &ep93xxfb_ops;
537 info->fix.type = FB_TYPE_PACKED_PIXELS;
538 info->fix.accel = FB_ACCEL_NONE;
539 info->var.activate = FB_ACTIVATE_NOW;
540 info->var.vmode = FB_VMODE_NONINTERLACED;
541 info->flags = FBINFO_DEFAULT;
542 info->node = -1;
543 info->state = FBINFO_STATE_RUNNING;
544 info->pseudo_palette = &fbi->pseudo_palette;
545
546 fb_get_options("ep93xx-fb", &video_mode);
547 err = fb_find_mode(&info->var, info, video_mode,
548 fbi->mach_info->modes, fbi->mach_info->num_modes,
549 fbi->mach_info->default_mode, fbi->mach_info->bpp);
550 if (err == 0) {
551 dev_err(info->dev, "No suitable video mode found\n");
552 err = -EINVAL;
553 goto failed;
554 }
555
556 if (mach_info->setup) {
557 err = mach_info->setup(pdev);
558 if (err)
559 return err;
560 }
561
562 err = ep93xxfb_check_var(&info->var, info);
563 if (err)
564 goto failed;
565
566 fbi->clk = clk_get(info->dev, NULL);
567 if (IS_ERR(fbi->clk)) {
568 err = PTR_ERR(fbi->clk);
569 fbi->clk = NULL;
570 goto failed;
571 }
572
573 ep93xxfb_set_par(info);
574 clk_enable(fbi->clk);
575
576 err = register_framebuffer(info);
577 if (err)
578 goto failed;
579
580 dev_info(info->dev, "registered. Mode = %dx%d-%d\n",
581 info->var.xres, info->var.yres, info->var.bits_per_pixel);
582 return 0;
583
584 failed:
585 if (fbi->clk)
586 clk_put(fbi->clk);
587 if (fbi->mmio_base)
588 iounmap(fbi->mmio_base);
589 if (fbi->res)
590 release_mem_region(fbi->res->start, resource_size(fbi->res));
591 ep93xxfb_dealloc_videomem(info);
592 if (&info->cmap)
593 fb_dealloc_cmap(&info->cmap);
594 if (fbi->mach_info->teardown)
595 fbi->mach_info->teardown(pdev);
596 kfree(info);
597 platform_set_drvdata(pdev, NULL);
598
599 return err;
600 }
601
ep93xxfb_remove(struct platform_device * pdev)602 static int __devexit ep93xxfb_remove(struct platform_device *pdev)
603 {
604 struct fb_info *info = platform_get_drvdata(pdev);
605 struct ep93xx_fbi *fbi = info->par;
606
607 unregister_framebuffer(info);
608 clk_disable(fbi->clk);
609 clk_put(fbi->clk);
610 iounmap(fbi->mmio_base);
611 release_mem_region(fbi->res->start, resource_size(fbi->res));
612 ep93xxfb_dealloc_videomem(info);
613 fb_dealloc_cmap(&info->cmap);
614
615 if (fbi->mach_info->teardown)
616 fbi->mach_info->teardown(pdev);
617
618 kfree(info);
619 platform_set_drvdata(pdev, NULL);
620
621 return 0;
622 }
623
624 static struct platform_driver ep93xxfb_driver = {
625 .probe = ep93xxfb_probe,
626 .remove = __devexit_p(ep93xxfb_remove),
627 .driver = {
628 .name = "ep93xx-fb",
629 .owner = THIS_MODULE,
630 },
631 };
632
ep93xxfb_init(void)633 static int __devinit ep93xxfb_init(void)
634 {
635 return platform_driver_register(&ep93xxfb_driver);
636 }
637
ep93xxfb_exit(void)638 static void __exit ep93xxfb_exit(void)
639 {
640 platform_driver_unregister(&ep93xxfb_driver);
641 }
642
643 module_init(ep93xxfb_init);
644 module_exit(ep93xxfb_exit);
645
646 MODULE_DESCRIPTION("EP93XX Framebuffer Driver");
647 MODULE_ALIAS("platform:ep93xx-fb");
648 MODULE_AUTHOR("Ryan Mallon, "
649 "H Hartley Sweeten <hsweeten@visionengravers.com");
650 MODULE_LICENSE("GPL");
651