1 /*
2 * Driver for the Atmel USBA high speed USB device controller
3 *
4 * Copyright (C) 2005-2007 Atmel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10 #include <linux/clk.h>
11 #include <linux/module.h>
12 #include <linux/init.h>
13 #include <linux/interrupt.h>
14 #include <linux/io.h>
15 #include <linux/slab.h>
16 #include <linux/device.h>
17 #include <linux/dma-mapping.h>
18 #include <linux/list.h>
19 #include <linux/platform_device.h>
20 #include <linux/usb/ch9.h>
21 #include <linux/usb/gadget.h>
22 #include <linux/usb/atmel_usba_udc.h>
23 #include <linux/delay.h>
24
25 #include <asm/gpio.h>
26 #include <mach/board.h>
27
28 #include "atmel_usba_udc.h"
29
30
31 static struct usba_udc the_udc;
32 static struct usba_ep *usba_ep;
33
34 #ifdef CONFIG_USB_GADGET_DEBUG_FS
35 #include <linux/debugfs.h>
36 #include <linux/uaccess.h>
37
queue_dbg_open(struct inode * inode,struct file * file)38 static int queue_dbg_open(struct inode *inode, struct file *file)
39 {
40 struct usba_ep *ep = inode->i_private;
41 struct usba_request *req, *req_copy;
42 struct list_head *queue_data;
43
44 queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL);
45 if (!queue_data)
46 return -ENOMEM;
47 INIT_LIST_HEAD(queue_data);
48
49 spin_lock_irq(&ep->udc->lock);
50 list_for_each_entry(req, &ep->queue, queue) {
51 req_copy = kmemdup(req, sizeof(*req_copy), GFP_ATOMIC);
52 if (!req_copy)
53 goto fail;
54 list_add_tail(&req_copy->queue, queue_data);
55 }
56 spin_unlock_irq(&ep->udc->lock);
57
58 file->private_data = queue_data;
59 return 0;
60
61 fail:
62 spin_unlock_irq(&ep->udc->lock);
63 list_for_each_entry_safe(req, req_copy, queue_data, queue) {
64 list_del(&req->queue);
65 kfree(req);
66 }
67 kfree(queue_data);
68 return -ENOMEM;
69 }
70
71 /*
72 * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0
73 *
74 * b: buffer address
75 * l: buffer length
76 * I/i: interrupt/no interrupt
77 * Z/z: zero/no zero
78 * S/s: short ok/short not ok
79 * s: status
80 * n: nr_packets
81 * F/f: submitted/not submitted to FIFO
82 * D/d: using/not using DMA
83 * L/l: last transaction/not last transaction
84 */
queue_dbg_read(struct file * file,char __user * buf,size_t nbytes,loff_t * ppos)85 static ssize_t queue_dbg_read(struct file *file, char __user *buf,
86 size_t nbytes, loff_t *ppos)
87 {
88 struct list_head *queue = file->private_data;
89 struct usba_request *req, *tmp_req;
90 size_t len, remaining, actual = 0;
91 char tmpbuf[38];
92
93 if (!access_ok(VERIFY_WRITE, buf, nbytes))
94 return -EFAULT;
95
96 mutex_lock(&file->f_dentry->d_inode->i_mutex);
97 list_for_each_entry_safe(req, tmp_req, queue, queue) {
98 len = snprintf(tmpbuf, sizeof(tmpbuf),
99 "%8p %08x %c%c%c %5d %c%c%c\n",
100 req->req.buf, req->req.length,
101 req->req.no_interrupt ? 'i' : 'I',
102 req->req.zero ? 'Z' : 'z',
103 req->req.short_not_ok ? 's' : 'S',
104 req->req.status,
105 req->submitted ? 'F' : 'f',
106 req->using_dma ? 'D' : 'd',
107 req->last_transaction ? 'L' : 'l');
108 len = min(len, sizeof(tmpbuf));
109 if (len > nbytes)
110 break;
111
112 list_del(&req->queue);
113 kfree(req);
114
115 remaining = __copy_to_user(buf, tmpbuf, len);
116 actual += len - remaining;
117 if (remaining)
118 break;
119
120 nbytes -= len;
121 buf += len;
122 }
123 mutex_unlock(&file->f_dentry->d_inode->i_mutex);
124
125 return actual;
126 }
127
queue_dbg_release(struct inode * inode,struct file * file)128 static int queue_dbg_release(struct inode *inode, struct file *file)
129 {
130 struct list_head *queue_data = file->private_data;
131 struct usba_request *req, *tmp_req;
132
133 list_for_each_entry_safe(req, tmp_req, queue_data, queue) {
134 list_del(&req->queue);
135 kfree(req);
136 }
137 kfree(queue_data);
138 return 0;
139 }
140
regs_dbg_open(struct inode * inode,struct file * file)141 static int regs_dbg_open(struct inode *inode, struct file *file)
142 {
143 struct usba_udc *udc;
144 unsigned int i;
145 u32 *data;
146 int ret = -ENOMEM;
147
148 mutex_lock(&inode->i_mutex);
149 udc = inode->i_private;
150 data = kmalloc(inode->i_size, GFP_KERNEL);
151 if (!data)
152 goto out;
153
154 spin_lock_irq(&udc->lock);
155 for (i = 0; i < inode->i_size / 4; i++)
156 data[i] = __raw_readl(udc->regs + i * 4);
157 spin_unlock_irq(&udc->lock);
158
159 file->private_data = data;
160 ret = 0;
161
162 out:
163 mutex_unlock(&inode->i_mutex);
164
165 return ret;
166 }
167
regs_dbg_read(struct file * file,char __user * buf,size_t nbytes,loff_t * ppos)168 static ssize_t regs_dbg_read(struct file *file, char __user *buf,
169 size_t nbytes, loff_t *ppos)
170 {
171 struct inode *inode = file->f_dentry->d_inode;
172 int ret;
173
174 mutex_lock(&inode->i_mutex);
175 ret = simple_read_from_buffer(buf, nbytes, ppos,
176 file->private_data,
177 file->f_dentry->d_inode->i_size);
178 mutex_unlock(&inode->i_mutex);
179
180 return ret;
181 }
182
regs_dbg_release(struct inode * inode,struct file * file)183 static int regs_dbg_release(struct inode *inode, struct file *file)
184 {
185 kfree(file->private_data);
186 return 0;
187 }
188
189 const struct file_operations queue_dbg_fops = {
190 .owner = THIS_MODULE,
191 .open = queue_dbg_open,
192 .llseek = no_llseek,
193 .read = queue_dbg_read,
194 .release = queue_dbg_release,
195 };
196
197 const struct file_operations regs_dbg_fops = {
198 .owner = THIS_MODULE,
199 .open = regs_dbg_open,
200 .llseek = generic_file_llseek,
201 .read = regs_dbg_read,
202 .release = regs_dbg_release,
203 };
204
usba_ep_init_debugfs(struct usba_udc * udc,struct usba_ep * ep)205 static void usba_ep_init_debugfs(struct usba_udc *udc,
206 struct usba_ep *ep)
207 {
208 struct dentry *ep_root;
209
210 ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root);
211 if (!ep_root)
212 goto err_root;
213 ep->debugfs_dir = ep_root;
214
215 ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root,
216 ep, &queue_dbg_fops);
217 if (!ep->debugfs_queue)
218 goto err_queue;
219
220 if (ep->can_dma) {
221 ep->debugfs_dma_status
222 = debugfs_create_u32("dma_status", 0400, ep_root,
223 &ep->last_dma_status);
224 if (!ep->debugfs_dma_status)
225 goto err_dma_status;
226 }
227 if (ep_is_control(ep)) {
228 ep->debugfs_state
229 = debugfs_create_u32("state", 0400, ep_root,
230 &ep->state);
231 if (!ep->debugfs_state)
232 goto err_state;
233 }
234
235 return;
236
237 err_state:
238 if (ep->can_dma)
239 debugfs_remove(ep->debugfs_dma_status);
240 err_dma_status:
241 debugfs_remove(ep->debugfs_queue);
242 err_queue:
243 debugfs_remove(ep_root);
244 err_root:
245 dev_err(&ep->udc->pdev->dev,
246 "failed to create debugfs directory for %s\n", ep->ep.name);
247 }
248
usba_ep_cleanup_debugfs(struct usba_ep * ep)249 static void usba_ep_cleanup_debugfs(struct usba_ep *ep)
250 {
251 debugfs_remove(ep->debugfs_queue);
252 debugfs_remove(ep->debugfs_dma_status);
253 debugfs_remove(ep->debugfs_state);
254 debugfs_remove(ep->debugfs_dir);
255 ep->debugfs_dma_status = NULL;
256 ep->debugfs_dir = NULL;
257 }
258
usba_init_debugfs(struct usba_udc * udc)259 static void usba_init_debugfs(struct usba_udc *udc)
260 {
261 struct dentry *root, *regs;
262 struct resource *regs_resource;
263
264 root = debugfs_create_dir(udc->gadget.name, NULL);
265 if (IS_ERR(root) || !root)
266 goto err_root;
267 udc->debugfs_root = root;
268
269 regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops);
270 if (!regs)
271 goto err_regs;
272
273 regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM,
274 CTRL_IOMEM_ID);
275 regs->d_inode->i_size = resource_size(regs_resource);
276 udc->debugfs_regs = regs;
277
278 usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0));
279
280 return;
281
282 err_regs:
283 debugfs_remove(root);
284 err_root:
285 udc->debugfs_root = NULL;
286 dev_err(&udc->pdev->dev, "debugfs is not available\n");
287 }
288
usba_cleanup_debugfs(struct usba_udc * udc)289 static void usba_cleanup_debugfs(struct usba_udc *udc)
290 {
291 usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0));
292 debugfs_remove(udc->debugfs_regs);
293 debugfs_remove(udc->debugfs_root);
294 udc->debugfs_regs = NULL;
295 udc->debugfs_root = NULL;
296 }
297 #else
usba_ep_init_debugfs(struct usba_udc * udc,struct usba_ep * ep)298 static inline void usba_ep_init_debugfs(struct usba_udc *udc,
299 struct usba_ep *ep)
300 {
301
302 }
303
usba_ep_cleanup_debugfs(struct usba_ep * ep)304 static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep)
305 {
306
307 }
308
usba_init_debugfs(struct usba_udc * udc)309 static inline void usba_init_debugfs(struct usba_udc *udc)
310 {
311
312 }
313
usba_cleanup_debugfs(struct usba_udc * udc)314 static inline void usba_cleanup_debugfs(struct usba_udc *udc)
315 {
316
317 }
318 #endif
319
vbus_is_present(struct usba_udc * udc)320 static int vbus_is_present(struct usba_udc *udc)
321 {
322 if (gpio_is_valid(udc->vbus_pin))
323 return gpio_get_value(udc->vbus_pin) ^ udc->vbus_pin_inverted;
324
325 /* No Vbus detection: Assume always present */
326 return 1;
327 }
328
329 #if defined(CONFIG_ARCH_AT91SAM9RL)
330
331 #include <mach/at91_pmc.h>
332
toggle_bias(int is_on)333 static void toggle_bias(int is_on)
334 {
335 unsigned int uckr = at91_sys_read(AT91_CKGR_UCKR);
336
337 if (is_on)
338 at91_sys_write(AT91_CKGR_UCKR, uckr | AT91_PMC_BIASEN);
339 else
340 at91_sys_write(AT91_CKGR_UCKR, uckr & ~(AT91_PMC_BIASEN));
341 }
342
343 #else
344
toggle_bias(int is_on)345 static void toggle_bias(int is_on)
346 {
347 }
348
349 #endif /* CONFIG_ARCH_AT91SAM9RL */
350
next_fifo_transaction(struct usba_ep * ep,struct usba_request * req)351 static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req)
352 {
353 unsigned int transaction_len;
354
355 transaction_len = req->req.length - req->req.actual;
356 req->last_transaction = 1;
357 if (transaction_len > ep->ep.maxpacket) {
358 transaction_len = ep->ep.maxpacket;
359 req->last_transaction = 0;
360 } else if (transaction_len == ep->ep.maxpacket && req->req.zero)
361 req->last_transaction = 0;
362
363 DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n",
364 ep->ep.name, req, transaction_len,
365 req->last_transaction ? ", done" : "");
366
367 memcpy_toio(ep->fifo, req->req.buf + req->req.actual, transaction_len);
368 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
369 req->req.actual += transaction_len;
370 }
371
submit_request(struct usba_ep * ep,struct usba_request * req)372 static void submit_request(struct usba_ep *ep, struct usba_request *req)
373 {
374 DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n",
375 ep->ep.name, req, req->req.length);
376
377 req->req.actual = 0;
378 req->submitted = 1;
379
380 if (req->using_dma) {
381 if (req->req.length == 0) {
382 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
383 return;
384 }
385
386 if (req->req.zero)
387 usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET);
388 else
389 usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET);
390
391 usba_dma_writel(ep, ADDRESS, req->req.dma);
392 usba_dma_writel(ep, CONTROL, req->ctrl);
393 } else {
394 next_fifo_transaction(ep, req);
395 if (req->last_transaction) {
396 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
397 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
398 } else {
399 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
400 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
401 }
402 }
403 }
404
submit_next_request(struct usba_ep * ep)405 static void submit_next_request(struct usba_ep *ep)
406 {
407 struct usba_request *req;
408
409 if (list_empty(&ep->queue)) {
410 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY);
411 return;
412 }
413
414 req = list_entry(ep->queue.next, struct usba_request, queue);
415 if (!req->submitted)
416 submit_request(ep, req);
417 }
418
send_status(struct usba_udc * udc,struct usba_ep * ep)419 static void send_status(struct usba_udc *udc, struct usba_ep *ep)
420 {
421 ep->state = STATUS_STAGE_IN;
422 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
423 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
424 }
425
receive_data(struct usba_ep * ep)426 static void receive_data(struct usba_ep *ep)
427 {
428 struct usba_udc *udc = ep->udc;
429 struct usba_request *req;
430 unsigned long status;
431 unsigned int bytecount, nr_busy;
432 int is_complete = 0;
433
434 status = usba_ep_readl(ep, STA);
435 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
436
437 DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy);
438
439 while (nr_busy > 0) {
440 if (list_empty(&ep->queue)) {
441 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
442 break;
443 }
444 req = list_entry(ep->queue.next,
445 struct usba_request, queue);
446
447 bytecount = USBA_BFEXT(BYTE_COUNT, status);
448
449 if (status & (1 << 31))
450 is_complete = 1;
451 if (req->req.actual + bytecount >= req->req.length) {
452 is_complete = 1;
453 bytecount = req->req.length - req->req.actual;
454 }
455
456 memcpy_fromio(req->req.buf + req->req.actual,
457 ep->fifo, bytecount);
458 req->req.actual += bytecount;
459
460 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
461
462 if (is_complete) {
463 DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name);
464 req->req.status = 0;
465 list_del_init(&req->queue);
466 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
467 spin_unlock(&udc->lock);
468 req->req.complete(&ep->ep, &req->req);
469 spin_lock(&udc->lock);
470 }
471
472 status = usba_ep_readl(ep, STA);
473 nr_busy = USBA_BFEXT(BUSY_BANKS, status);
474
475 if (is_complete && ep_is_control(ep)) {
476 send_status(udc, ep);
477 break;
478 }
479 }
480 }
481
482 static void
request_complete(struct usba_ep * ep,struct usba_request * req,int status)483 request_complete(struct usba_ep *ep, struct usba_request *req, int status)
484 {
485 struct usba_udc *udc = ep->udc;
486
487 WARN_ON(!list_empty(&req->queue));
488
489 if (req->req.status == -EINPROGRESS)
490 req->req.status = status;
491
492 if (req->mapped) {
493 dma_unmap_single(
494 &udc->pdev->dev, req->req.dma, req->req.length,
495 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
496 req->req.dma = DMA_ADDR_INVALID;
497 req->mapped = 0;
498 }
499
500 DBG(DBG_GADGET | DBG_REQ,
501 "%s: req %p complete: status %d, actual %u\n",
502 ep->ep.name, req, req->req.status, req->req.actual);
503
504 spin_unlock(&udc->lock);
505 req->req.complete(&ep->ep, &req->req);
506 spin_lock(&udc->lock);
507 }
508
509 static void
request_complete_list(struct usba_ep * ep,struct list_head * list,int status)510 request_complete_list(struct usba_ep *ep, struct list_head *list, int status)
511 {
512 struct usba_request *req, *tmp_req;
513
514 list_for_each_entry_safe(req, tmp_req, list, queue) {
515 list_del_init(&req->queue);
516 request_complete(ep, req, status);
517 }
518 }
519
520 static int
usba_ep_enable(struct usb_ep * _ep,const struct usb_endpoint_descriptor * desc)521 usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
522 {
523 struct usba_ep *ep = to_usba_ep(_ep);
524 struct usba_udc *udc = ep->udc;
525 unsigned long flags, ept_cfg, maxpacket;
526 unsigned int nr_trans;
527
528 DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc);
529
530 maxpacket = usb_endpoint_maxp(desc) & 0x7ff;
531
532 if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index)
533 || ep->index == 0
534 || desc->bDescriptorType != USB_DT_ENDPOINT
535 || maxpacket == 0
536 || maxpacket > ep->fifo_size) {
537 DBG(DBG_ERR, "ep_enable: Invalid argument");
538 return -EINVAL;
539 }
540
541 ep->is_isoc = 0;
542 ep->is_in = 0;
543
544 if (maxpacket <= 8)
545 ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8);
546 else
547 /* LSB is bit 1, not 0 */
548 ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3);
549
550 DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n",
551 ep->ep.name, ept_cfg, maxpacket);
552
553 if (usb_endpoint_dir_in(desc)) {
554 ep->is_in = 1;
555 ept_cfg |= USBA_EPT_DIR_IN;
556 }
557
558 switch (usb_endpoint_type(desc)) {
559 case USB_ENDPOINT_XFER_CONTROL:
560 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL);
561 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE);
562 break;
563 case USB_ENDPOINT_XFER_ISOC:
564 if (!ep->can_isoc) {
565 DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n",
566 ep->ep.name);
567 return -EINVAL;
568 }
569
570 /*
571 * Bits 11:12 specify number of _additional_
572 * transactions per microframe.
573 */
574 nr_trans = ((usb_endpoint_maxp(desc) >> 11) & 3) + 1;
575 if (nr_trans > 3)
576 return -EINVAL;
577
578 ep->is_isoc = 1;
579 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO);
580
581 /*
582 * Do triple-buffering on high-bandwidth iso endpoints.
583 */
584 if (nr_trans > 1 && ep->nr_banks == 3)
585 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE);
586 else
587 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
588 ept_cfg |= USBA_BF(NB_TRANS, nr_trans);
589 break;
590 case USB_ENDPOINT_XFER_BULK:
591 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK);
592 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
593 break;
594 case USB_ENDPOINT_XFER_INT:
595 ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT);
596 ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE);
597 break;
598 }
599
600 spin_lock_irqsave(&ep->udc->lock, flags);
601
602 if (ep->desc) {
603 spin_unlock_irqrestore(&ep->udc->lock, flags);
604 DBG(DBG_ERR, "ep%d already enabled\n", ep->index);
605 return -EBUSY;
606 }
607
608 ep->desc = desc;
609 ep->ep.maxpacket = maxpacket;
610
611 usba_ep_writel(ep, CFG, ept_cfg);
612 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
613
614 if (ep->can_dma) {
615 u32 ctrl;
616
617 usba_writel(udc, INT_ENB,
618 (usba_readl(udc, INT_ENB)
619 | USBA_BF(EPT_INT, 1 << ep->index)
620 | USBA_BF(DMA_INT, 1 << ep->index)));
621 ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA;
622 usba_ep_writel(ep, CTL_ENB, ctrl);
623 } else {
624 usba_writel(udc, INT_ENB,
625 (usba_readl(udc, INT_ENB)
626 | USBA_BF(EPT_INT, 1 << ep->index)));
627 }
628
629 spin_unlock_irqrestore(&udc->lock, flags);
630
631 DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index,
632 (unsigned long)usba_ep_readl(ep, CFG));
633 DBG(DBG_HW, "INT_ENB after init: %#08lx\n",
634 (unsigned long)usba_readl(udc, INT_ENB));
635
636 return 0;
637 }
638
usba_ep_disable(struct usb_ep * _ep)639 static int usba_ep_disable(struct usb_ep *_ep)
640 {
641 struct usba_ep *ep = to_usba_ep(_ep);
642 struct usba_udc *udc = ep->udc;
643 LIST_HEAD(req_list);
644 unsigned long flags;
645
646 DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name);
647
648 spin_lock_irqsave(&udc->lock, flags);
649
650 if (!ep->desc) {
651 spin_unlock_irqrestore(&udc->lock, flags);
652 /* REVISIT because this driver disables endpoints in
653 * reset_all_endpoints() before calling disconnect(),
654 * most gadget drivers would trigger this non-error ...
655 */
656 if (udc->gadget.speed != USB_SPEED_UNKNOWN)
657 DBG(DBG_ERR, "ep_disable: %s not enabled\n",
658 ep->ep.name);
659 return -EINVAL;
660 }
661 ep->desc = NULL;
662
663 list_splice_init(&ep->queue, &req_list);
664 if (ep->can_dma) {
665 usba_dma_writel(ep, CONTROL, 0);
666 usba_dma_writel(ep, ADDRESS, 0);
667 usba_dma_readl(ep, STATUS);
668 }
669 usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE);
670 usba_writel(udc, INT_ENB,
671 usba_readl(udc, INT_ENB)
672 & ~USBA_BF(EPT_INT, 1 << ep->index));
673
674 request_complete_list(ep, &req_list, -ESHUTDOWN);
675
676 spin_unlock_irqrestore(&udc->lock, flags);
677
678 return 0;
679 }
680
681 static struct usb_request *
usba_ep_alloc_request(struct usb_ep * _ep,gfp_t gfp_flags)682 usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
683 {
684 struct usba_request *req;
685
686 DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags);
687
688 req = kzalloc(sizeof(*req), gfp_flags);
689 if (!req)
690 return NULL;
691
692 INIT_LIST_HEAD(&req->queue);
693 req->req.dma = DMA_ADDR_INVALID;
694
695 return &req->req;
696 }
697
698 static void
usba_ep_free_request(struct usb_ep * _ep,struct usb_request * _req)699 usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req)
700 {
701 struct usba_request *req = to_usba_req(_req);
702
703 DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req);
704
705 kfree(req);
706 }
707
queue_dma(struct usba_udc * udc,struct usba_ep * ep,struct usba_request * req,gfp_t gfp_flags)708 static int queue_dma(struct usba_udc *udc, struct usba_ep *ep,
709 struct usba_request *req, gfp_t gfp_flags)
710 {
711 unsigned long flags;
712 int ret;
713
714 DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n",
715 ep->ep.name, req->req.length, req->req.dma,
716 req->req.zero ? 'Z' : 'z',
717 req->req.short_not_ok ? 'S' : 's',
718 req->req.no_interrupt ? 'I' : 'i');
719
720 if (req->req.length > 0x10000) {
721 /* Lengths from 0 to 65536 (inclusive) are supported */
722 DBG(DBG_ERR, "invalid request length %u\n", req->req.length);
723 return -EINVAL;
724 }
725
726 req->using_dma = 1;
727
728 if (req->req.dma == DMA_ADDR_INVALID) {
729 req->req.dma = dma_map_single(
730 &udc->pdev->dev, req->req.buf, req->req.length,
731 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
732 req->mapped = 1;
733 } else {
734 dma_sync_single_for_device(
735 &udc->pdev->dev, req->req.dma, req->req.length,
736 ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
737 req->mapped = 0;
738 }
739
740 req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length)
741 | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE
742 | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE;
743
744 if (ep->is_in)
745 req->ctrl |= USBA_DMA_END_BUF_EN;
746
747 /*
748 * Add this request to the queue and submit for DMA if
749 * possible. Check if we're still alive first -- we may have
750 * received a reset since last time we checked.
751 */
752 ret = -ESHUTDOWN;
753 spin_lock_irqsave(&udc->lock, flags);
754 if (ep->desc) {
755 if (list_empty(&ep->queue))
756 submit_request(ep, req);
757
758 list_add_tail(&req->queue, &ep->queue);
759 ret = 0;
760 }
761 spin_unlock_irqrestore(&udc->lock, flags);
762
763 return ret;
764 }
765
766 static int
usba_ep_queue(struct usb_ep * _ep,struct usb_request * _req,gfp_t gfp_flags)767 usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
768 {
769 struct usba_request *req = to_usba_req(_req);
770 struct usba_ep *ep = to_usba_ep(_ep);
771 struct usba_udc *udc = ep->udc;
772 unsigned long flags;
773 int ret;
774
775 DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n",
776 ep->ep.name, req, _req->length);
777
778 if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc)
779 return -ESHUTDOWN;
780
781 req->submitted = 0;
782 req->using_dma = 0;
783 req->last_transaction = 0;
784
785 _req->status = -EINPROGRESS;
786 _req->actual = 0;
787
788 if (ep->can_dma)
789 return queue_dma(udc, ep, req, gfp_flags);
790
791 /* May have received a reset since last time we checked */
792 ret = -ESHUTDOWN;
793 spin_lock_irqsave(&udc->lock, flags);
794 if (ep->desc) {
795 list_add_tail(&req->queue, &ep->queue);
796
797 if ((!ep_is_control(ep) && ep->is_in) ||
798 (ep_is_control(ep)
799 && (ep->state == DATA_STAGE_IN
800 || ep->state == STATUS_STAGE_IN)))
801 usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY);
802 else
803 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
804 ret = 0;
805 }
806 spin_unlock_irqrestore(&udc->lock, flags);
807
808 return ret;
809 }
810
811 static void
usba_update_req(struct usba_ep * ep,struct usba_request * req,u32 status)812 usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status)
813 {
814 req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status);
815 }
816
stop_dma(struct usba_ep * ep,u32 * pstatus)817 static int stop_dma(struct usba_ep *ep, u32 *pstatus)
818 {
819 unsigned int timeout;
820 u32 status;
821
822 /*
823 * Stop the DMA controller. When writing both CH_EN
824 * and LINK to 0, the other bits are not affected.
825 */
826 usba_dma_writel(ep, CONTROL, 0);
827
828 /* Wait for the FIFO to empty */
829 for (timeout = 40; timeout; --timeout) {
830 status = usba_dma_readl(ep, STATUS);
831 if (!(status & USBA_DMA_CH_EN))
832 break;
833 udelay(1);
834 }
835
836 if (pstatus)
837 *pstatus = status;
838
839 if (timeout == 0) {
840 dev_err(&ep->udc->pdev->dev,
841 "%s: timed out waiting for DMA FIFO to empty\n",
842 ep->ep.name);
843 return -ETIMEDOUT;
844 }
845
846 return 0;
847 }
848
usba_ep_dequeue(struct usb_ep * _ep,struct usb_request * _req)849 static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req)
850 {
851 struct usba_ep *ep = to_usba_ep(_ep);
852 struct usba_udc *udc = ep->udc;
853 struct usba_request *req = to_usba_req(_req);
854 unsigned long flags;
855 u32 status;
856
857 DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n",
858 ep->ep.name, req);
859
860 spin_lock_irqsave(&udc->lock, flags);
861
862 if (req->using_dma) {
863 /*
864 * If this request is currently being transferred,
865 * stop the DMA controller and reset the FIFO.
866 */
867 if (ep->queue.next == &req->queue) {
868 status = usba_dma_readl(ep, STATUS);
869 if (status & USBA_DMA_CH_EN)
870 stop_dma(ep, &status);
871
872 #ifdef CONFIG_USB_GADGET_DEBUG_FS
873 ep->last_dma_status = status;
874 #endif
875
876 usba_writel(udc, EPT_RST, 1 << ep->index);
877
878 usba_update_req(ep, req, status);
879 }
880 }
881
882 /*
883 * Errors should stop the queue from advancing until the
884 * completion function returns.
885 */
886 list_del_init(&req->queue);
887
888 request_complete(ep, req, -ECONNRESET);
889
890 /* Process the next request if any */
891 submit_next_request(ep);
892 spin_unlock_irqrestore(&udc->lock, flags);
893
894 return 0;
895 }
896
usba_ep_set_halt(struct usb_ep * _ep,int value)897 static int usba_ep_set_halt(struct usb_ep *_ep, int value)
898 {
899 struct usba_ep *ep = to_usba_ep(_ep);
900 struct usba_udc *udc = ep->udc;
901 unsigned long flags;
902 int ret = 0;
903
904 DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name,
905 value ? "set" : "clear");
906
907 if (!ep->desc) {
908 DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n",
909 ep->ep.name);
910 return -ENODEV;
911 }
912 if (ep->is_isoc) {
913 DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n",
914 ep->ep.name);
915 return -ENOTTY;
916 }
917
918 spin_lock_irqsave(&udc->lock, flags);
919
920 /*
921 * We can't halt IN endpoints while there are still data to be
922 * transferred
923 */
924 if (!list_empty(&ep->queue)
925 || ((value && ep->is_in && (usba_ep_readl(ep, STA)
926 & USBA_BF(BUSY_BANKS, -1L))))) {
927 ret = -EAGAIN;
928 } else {
929 if (value)
930 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
931 else
932 usba_ep_writel(ep, CLR_STA,
933 USBA_FORCE_STALL | USBA_TOGGLE_CLR);
934 usba_ep_readl(ep, STA);
935 }
936
937 spin_unlock_irqrestore(&udc->lock, flags);
938
939 return ret;
940 }
941
usba_ep_fifo_status(struct usb_ep * _ep)942 static int usba_ep_fifo_status(struct usb_ep *_ep)
943 {
944 struct usba_ep *ep = to_usba_ep(_ep);
945
946 return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
947 }
948
usba_ep_fifo_flush(struct usb_ep * _ep)949 static void usba_ep_fifo_flush(struct usb_ep *_ep)
950 {
951 struct usba_ep *ep = to_usba_ep(_ep);
952 struct usba_udc *udc = ep->udc;
953
954 usba_writel(udc, EPT_RST, 1 << ep->index);
955 }
956
957 static const struct usb_ep_ops usba_ep_ops = {
958 .enable = usba_ep_enable,
959 .disable = usba_ep_disable,
960 .alloc_request = usba_ep_alloc_request,
961 .free_request = usba_ep_free_request,
962 .queue = usba_ep_queue,
963 .dequeue = usba_ep_dequeue,
964 .set_halt = usba_ep_set_halt,
965 .fifo_status = usba_ep_fifo_status,
966 .fifo_flush = usba_ep_fifo_flush,
967 };
968
usba_udc_get_frame(struct usb_gadget * gadget)969 static int usba_udc_get_frame(struct usb_gadget *gadget)
970 {
971 struct usba_udc *udc = to_usba_udc(gadget);
972
973 return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM));
974 }
975
usba_udc_wakeup(struct usb_gadget * gadget)976 static int usba_udc_wakeup(struct usb_gadget *gadget)
977 {
978 struct usba_udc *udc = to_usba_udc(gadget);
979 unsigned long flags;
980 u32 ctrl;
981 int ret = -EINVAL;
982
983 spin_lock_irqsave(&udc->lock, flags);
984 if (udc->devstatus & (1 << USB_DEVICE_REMOTE_WAKEUP)) {
985 ctrl = usba_readl(udc, CTRL);
986 usba_writel(udc, CTRL, ctrl | USBA_REMOTE_WAKE_UP);
987 ret = 0;
988 }
989 spin_unlock_irqrestore(&udc->lock, flags);
990
991 return ret;
992 }
993
994 static int
usba_udc_set_selfpowered(struct usb_gadget * gadget,int is_selfpowered)995 usba_udc_set_selfpowered(struct usb_gadget *gadget, int is_selfpowered)
996 {
997 struct usba_udc *udc = to_usba_udc(gadget);
998 unsigned long flags;
999
1000 spin_lock_irqsave(&udc->lock, flags);
1001 if (is_selfpowered)
1002 udc->devstatus |= 1 << USB_DEVICE_SELF_POWERED;
1003 else
1004 udc->devstatus &= ~(1 << USB_DEVICE_SELF_POWERED);
1005 spin_unlock_irqrestore(&udc->lock, flags);
1006
1007 return 0;
1008 }
1009
1010 static int atmel_usba_start(struct usb_gadget_driver *driver,
1011 int (*bind)(struct usb_gadget *));
1012 static int atmel_usba_stop(struct usb_gadget_driver *driver);
1013
1014 static const struct usb_gadget_ops usba_udc_ops = {
1015 .get_frame = usba_udc_get_frame,
1016 .wakeup = usba_udc_wakeup,
1017 .set_selfpowered = usba_udc_set_selfpowered,
1018 .start = atmel_usba_start,
1019 .stop = atmel_usba_stop,
1020 };
1021
1022 static struct usb_endpoint_descriptor usba_ep0_desc = {
1023 .bLength = USB_DT_ENDPOINT_SIZE,
1024 .bDescriptorType = USB_DT_ENDPOINT,
1025 .bEndpointAddress = 0,
1026 .bmAttributes = USB_ENDPOINT_XFER_CONTROL,
1027 .wMaxPacketSize = cpu_to_le16(64),
1028 /* FIXME: I have no idea what to put here */
1029 .bInterval = 1,
1030 };
1031
nop_release(struct device * dev)1032 static void nop_release(struct device *dev)
1033 {
1034
1035 }
1036
1037 static struct usba_udc the_udc = {
1038 .gadget = {
1039 .ops = &usba_udc_ops,
1040 .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list),
1041 .max_speed = USB_SPEED_HIGH,
1042 .name = "atmel_usba_udc",
1043 .dev = {
1044 .init_name = "gadget",
1045 .release = nop_release,
1046 },
1047 },
1048 };
1049
1050 /*
1051 * Called with interrupts disabled and udc->lock held.
1052 */
reset_all_endpoints(struct usba_udc * udc)1053 static void reset_all_endpoints(struct usba_udc *udc)
1054 {
1055 struct usba_ep *ep;
1056 struct usba_request *req, *tmp_req;
1057
1058 usba_writel(udc, EPT_RST, ~0UL);
1059
1060 ep = to_usba_ep(udc->gadget.ep0);
1061 list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) {
1062 list_del_init(&req->queue);
1063 request_complete(ep, req, -ECONNRESET);
1064 }
1065
1066 /* NOTE: normally, the next call to the gadget driver is in
1067 * charge of disabling endpoints... usually disconnect().
1068 * The exception would be entering a high speed test mode.
1069 *
1070 * FIXME remove this code ... and retest thoroughly.
1071 */
1072 list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) {
1073 if (ep->desc) {
1074 spin_unlock(&udc->lock);
1075 usba_ep_disable(&ep->ep);
1076 spin_lock(&udc->lock);
1077 }
1078 }
1079 }
1080
get_ep_by_addr(struct usba_udc * udc,u16 wIndex)1081 static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex)
1082 {
1083 struct usba_ep *ep;
1084
1085 if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
1086 return to_usba_ep(udc->gadget.ep0);
1087
1088 list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) {
1089 u8 bEndpointAddress;
1090
1091 if (!ep->desc)
1092 continue;
1093 bEndpointAddress = ep->desc->bEndpointAddress;
1094 if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
1095 continue;
1096 if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK)
1097 == (wIndex & USB_ENDPOINT_NUMBER_MASK))
1098 return ep;
1099 }
1100
1101 return NULL;
1102 }
1103
1104 /* Called with interrupts disabled and udc->lock held */
set_protocol_stall(struct usba_udc * udc,struct usba_ep * ep)1105 static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep)
1106 {
1107 usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL);
1108 ep->state = WAIT_FOR_SETUP;
1109 }
1110
is_stalled(struct usba_udc * udc,struct usba_ep * ep)1111 static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep)
1112 {
1113 if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL)
1114 return 1;
1115 return 0;
1116 }
1117
set_address(struct usba_udc * udc,unsigned int addr)1118 static inline void set_address(struct usba_udc *udc, unsigned int addr)
1119 {
1120 u32 regval;
1121
1122 DBG(DBG_BUS, "setting address %u...\n", addr);
1123 regval = usba_readl(udc, CTRL);
1124 regval = USBA_BFINS(DEV_ADDR, addr, regval);
1125 usba_writel(udc, CTRL, regval);
1126 }
1127
do_test_mode(struct usba_udc * udc)1128 static int do_test_mode(struct usba_udc *udc)
1129 {
1130 static const char test_packet_buffer[] = {
1131 /* JKJKJKJK * 9 */
1132 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
1133 /* JJKKJJKK * 8 */
1134 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA,
1135 /* JJKKJJKK * 8 */
1136 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE,
1137 /* JJJJJJJKKKKKKK * 8 */
1138 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1139 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF,
1140 /* JJJJJJJK * 8 */
1141 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD,
1142 /* {JKKKKKKK * 10}, JK */
1143 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E
1144 };
1145 struct usba_ep *ep;
1146 struct device *dev = &udc->pdev->dev;
1147 int test_mode;
1148
1149 test_mode = udc->test_mode;
1150
1151 /* Start from a clean slate */
1152 reset_all_endpoints(udc);
1153
1154 switch (test_mode) {
1155 case 0x0100:
1156 /* Test_J */
1157 usba_writel(udc, TST, USBA_TST_J_MODE);
1158 dev_info(dev, "Entering Test_J mode...\n");
1159 break;
1160 case 0x0200:
1161 /* Test_K */
1162 usba_writel(udc, TST, USBA_TST_K_MODE);
1163 dev_info(dev, "Entering Test_K mode...\n");
1164 break;
1165 case 0x0300:
1166 /*
1167 * Test_SE0_NAK: Force high-speed mode and set up ep0
1168 * for Bulk IN transfers
1169 */
1170 ep = &usba_ep[0];
1171 usba_writel(udc, TST,
1172 USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH));
1173 usba_ep_writel(ep, CFG,
1174 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1175 | USBA_EPT_DIR_IN
1176 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1177 | USBA_BF(BK_NUMBER, 1));
1178 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1179 set_protocol_stall(udc, ep);
1180 dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n");
1181 } else {
1182 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1183 dev_info(dev, "Entering Test_SE0_NAK mode...\n");
1184 }
1185 break;
1186 case 0x0400:
1187 /* Test_Packet */
1188 ep = &usba_ep[0];
1189 usba_ep_writel(ep, CFG,
1190 USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64)
1191 | USBA_EPT_DIR_IN
1192 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK)
1193 | USBA_BF(BK_NUMBER, 1));
1194 if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) {
1195 set_protocol_stall(udc, ep);
1196 dev_err(dev, "Test_Packet: ep0 not mapped\n");
1197 } else {
1198 usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE);
1199 usba_writel(udc, TST, USBA_TST_PKT_MODE);
1200 memcpy_toio(ep->fifo, test_packet_buffer,
1201 sizeof(test_packet_buffer));
1202 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1203 dev_info(dev, "Entering Test_Packet mode...\n");
1204 }
1205 break;
1206 default:
1207 dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode);
1208 return -EINVAL;
1209 }
1210
1211 return 0;
1212 }
1213
1214 /* Avoid overly long expressions */
feature_is_dev_remote_wakeup(struct usb_ctrlrequest * crq)1215 static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq)
1216 {
1217 if (crq->wValue == cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP))
1218 return true;
1219 return false;
1220 }
1221
feature_is_dev_test_mode(struct usb_ctrlrequest * crq)1222 static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq)
1223 {
1224 if (crq->wValue == cpu_to_le16(USB_DEVICE_TEST_MODE))
1225 return true;
1226 return false;
1227 }
1228
feature_is_ep_halt(struct usb_ctrlrequest * crq)1229 static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq)
1230 {
1231 if (crq->wValue == cpu_to_le16(USB_ENDPOINT_HALT))
1232 return true;
1233 return false;
1234 }
1235
handle_ep0_setup(struct usba_udc * udc,struct usba_ep * ep,struct usb_ctrlrequest * crq)1236 static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep,
1237 struct usb_ctrlrequest *crq)
1238 {
1239 int retval = 0;
1240
1241 switch (crq->bRequest) {
1242 case USB_REQ_GET_STATUS: {
1243 u16 status;
1244
1245 if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) {
1246 status = cpu_to_le16(udc->devstatus);
1247 } else if (crq->bRequestType
1248 == (USB_DIR_IN | USB_RECIP_INTERFACE)) {
1249 status = cpu_to_le16(0);
1250 } else if (crq->bRequestType
1251 == (USB_DIR_IN | USB_RECIP_ENDPOINT)) {
1252 struct usba_ep *target;
1253
1254 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1255 if (!target)
1256 goto stall;
1257
1258 status = 0;
1259 if (is_stalled(udc, target))
1260 status |= cpu_to_le16(1);
1261 } else
1262 goto delegate;
1263
1264 /* Write directly to the FIFO. No queueing is done. */
1265 if (crq->wLength != cpu_to_le16(sizeof(status)))
1266 goto stall;
1267 ep->state = DATA_STAGE_IN;
1268 __raw_writew(status, ep->fifo);
1269 usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY);
1270 break;
1271 }
1272
1273 case USB_REQ_CLEAR_FEATURE: {
1274 if (crq->bRequestType == USB_RECIP_DEVICE) {
1275 if (feature_is_dev_remote_wakeup(crq))
1276 udc->devstatus
1277 &= ~(1 << USB_DEVICE_REMOTE_WAKEUP);
1278 else
1279 /* Can't CLEAR_FEATURE TEST_MODE */
1280 goto stall;
1281 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1282 struct usba_ep *target;
1283
1284 if (crq->wLength != cpu_to_le16(0)
1285 || !feature_is_ep_halt(crq))
1286 goto stall;
1287 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1288 if (!target)
1289 goto stall;
1290
1291 usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL);
1292 if (target->index != 0)
1293 usba_ep_writel(target, CLR_STA,
1294 USBA_TOGGLE_CLR);
1295 } else {
1296 goto delegate;
1297 }
1298
1299 send_status(udc, ep);
1300 break;
1301 }
1302
1303 case USB_REQ_SET_FEATURE: {
1304 if (crq->bRequestType == USB_RECIP_DEVICE) {
1305 if (feature_is_dev_test_mode(crq)) {
1306 send_status(udc, ep);
1307 ep->state = STATUS_STAGE_TEST;
1308 udc->test_mode = le16_to_cpu(crq->wIndex);
1309 return 0;
1310 } else if (feature_is_dev_remote_wakeup(crq)) {
1311 udc->devstatus |= 1 << USB_DEVICE_REMOTE_WAKEUP;
1312 } else {
1313 goto stall;
1314 }
1315 } else if (crq->bRequestType == USB_RECIP_ENDPOINT) {
1316 struct usba_ep *target;
1317
1318 if (crq->wLength != cpu_to_le16(0)
1319 || !feature_is_ep_halt(crq))
1320 goto stall;
1321
1322 target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex));
1323 if (!target)
1324 goto stall;
1325
1326 usba_ep_writel(target, SET_STA, USBA_FORCE_STALL);
1327 } else
1328 goto delegate;
1329
1330 send_status(udc, ep);
1331 break;
1332 }
1333
1334 case USB_REQ_SET_ADDRESS:
1335 if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE))
1336 goto delegate;
1337
1338 set_address(udc, le16_to_cpu(crq->wValue));
1339 send_status(udc, ep);
1340 ep->state = STATUS_STAGE_ADDR;
1341 break;
1342
1343 default:
1344 delegate:
1345 spin_unlock(&udc->lock);
1346 retval = udc->driver->setup(&udc->gadget, crq);
1347 spin_lock(&udc->lock);
1348 }
1349
1350 return retval;
1351
1352 stall:
1353 pr_err("udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, "
1354 "halting endpoint...\n",
1355 ep->ep.name, crq->bRequestType, crq->bRequest,
1356 le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex),
1357 le16_to_cpu(crq->wLength));
1358 set_protocol_stall(udc, ep);
1359 return -1;
1360 }
1361
usba_control_irq(struct usba_udc * udc,struct usba_ep * ep)1362 static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep)
1363 {
1364 struct usba_request *req;
1365 u32 epstatus;
1366 u32 epctrl;
1367
1368 restart:
1369 epstatus = usba_ep_readl(ep, STA);
1370 epctrl = usba_ep_readl(ep, CTL);
1371
1372 DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n",
1373 ep->ep.name, ep->state, epstatus, epctrl);
1374
1375 req = NULL;
1376 if (!list_empty(&ep->queue))
1377 req = list_entry(ep->queue.next,
1378 struct usba_request, queue);
1379
1380 if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1381 if (req->submitted)
1382 next_fifo_transaction(ep, req);
1383 else
1384 submit_request(ep, req);
1385
1386 if (req->last_transaction) {
1387 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1388 usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE);
1389 }
1390 goto restart;
1391 }
1392 if ((epstatus & epctrl) & USBA_TX_COMPLETE) {
1393 usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE);
1394
1395 switch (ep->state) {
1396 case DATA_STAGE_IN:
1397 usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY);
1398 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1399 ep->state = STATUS_STAGE_OUT;
1400 break;
1401 case STATUS_STAGE_ADDR:
1402 /* Activate our new address */
1403 usba_writel(udc, CTRL, (usba_readl(udc, CTRL)
1404 | USBA_FADDR_EN));
1405 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1406 ep->state = WAIT_FOR_SETUP;
1407 break;
1408 case STATUS_STAGE_IN:
1409 if (req) {
1410 list_del_init(&req->queue);
1411 request_complete(ep, req, 0);
1412 submit_next_request(ep);
1413 }
1414 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1415 ep->state = WAIT_FOR_SETUP;
1416 break;
1417 case STATUS_STAGE_TEST:
1418 usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE);
1419 ep->state = WAIT_FOR_SETUP;
1420 if (do_test_mode(udc))
1421 set_protocol_stall(udc, ep);
1422 break;
1423 default:
1424 pr_err("udc: %s: TXCOMP: Invalid endpoint state %d, "
1425 "halting endpoint...\n",
1426 ep->ep.name, ep->state);
1427 set_protocol_stall(udc, ep);
1428 break;
1429 }
1430
1431 goto restart;
1432 }
1433 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1434 switch (ep->state) {
1435 case STATUS_STAGE_OUT:
1436 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1437 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1438
1439 if (req) {
1440 list_del_init(&req->queue);
1441 request_complete(ep, req, 0);
1442 }
1443 ep->state = WAIT_FOR_SETUP;
1444 break;
1445
1446 case DATA_STAGE_OUT:
1447 receive_data(ep);
1448 break;
1449
1450 default:
1451 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1452 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1453 pr_err("udc: %s: RXRDY: Invalid endpoint state %d, "
1454 "halting endpoint...\n",
1455 ep->ep.name, ep->state);
1456 set_protocol_stall(udc, ep);
1457 break;
1458 }
1459
1460 goto restart;
1461 }
1462 if (epstatus & USBA_RX_SETUP) {
1463 union {
1464 struct usb_ctrlrequest crq;
1465 unsigned long data[2];
1466 } crq;
1467 unsigned int pkt_len;
1468 int ret;
1469
1470 if (ep->state != WAIT_FOR_SETUP) {
1471 /*
1472 * Didn't expect a SETUP packet at this
1473 * point. Clean up any pending requests (which
1474 * may be successful).
1475 */
1476 int status = -EPROTO;
1477
1478 /*
1479 * RXRDY and TXCOMP are dropped when SETUP
1480 * packets arrive. Just pretend we received
1481 * the status packet.
1482 */
1483 if (ep->state == STATUS_STAGE_OUT
1484 || ep->state == STATUS_STAGE_IN) {
1485 usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY);
1486 status = 0;
1487 }
1488
1489 if (req) {
1490 list_del_init(&req->queue);
1491 request_complete(ep, req, status);
1492 }
1493 }
1494
1495 pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA));
1496 DBG(DBG_HW, "Packet length: %u\n", pkt_len);
1497 if (pkt_len != sizeof(crq)) {
1498 pr_warning("udc: Invalid packet length %u "
1499 "(expected %zu)\n", pkt_len, sizeof(crq));
1500 set_protocol_stall(udc, ep);
1501 return;
1502 }
1503
1504 DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo);
1505 memcpy_fromio(crq.data, ep->fifo, sizeof(crq));
1506
1507 /* Free up one bank in the FIFO so that we can
1508 * generate or receive a reply right away. */
1509 usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP);
1510
1511 /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n",
1512 ep->state, crq.crq.bRequestType,
1513 crq.crq.bRequest); */
1514
1515 if (crq.crq.bRequestType & USB_DIR_IN) {
1516 /*
1517 * The USB 2.0 spec states that "if wLength is
1518 * zero, there is no data transfer phase."
1519 * However, testusb #14 seems to actually
1520 * expect a data phase even if wLength = 0...
1521 */
1522 ep->state = DATA_STAGE_IN;
1523 } else {
1524 if (crq.crq.wLength != cpu_to_le16(0))
1525 ep->state = DATA_STAGE_OUT;
1526 else
1527 ep->state = STATUS_STAGE_IN;
1528 }
1529
1530 ret = -1;
1531 if (ep->index == 0)
1532 ret = handle_ep0_setup(udc, ep, &crq.crq);
1533 else {
1534 spin_unlock(&udc->lock);
1535 ret = udc->driver->setup(&udc->gadget, &crq.crq);
1536 spin_lock(&udc->lock);
1537 }
1538
1539 DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n",
1540 crq.crq.bRequestType, crq.crq.bRequest,
1541 le16_to_cpu(crq.crq.wLength), ep->state, ret);
1542
1543 if (ret < 0) {
1544 /* Let the host know that we failed */
1545 set_protocol_stall(udc, ep);
1546 }
1547 }
1548 }
1549
usba_ep_irq(struct usba_udc * udc,struct usba_ep * ep)1550 static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep)
1551 {
1552 struct usba_request *req;
1553 u32 epstatus;
1554 u32 epctrl;
1555
1556 epstatus = usba_ep_readl(ep, STA);
1557 epctrl = usba_ep_readl(ep, CTL);
1558
1559 DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus);
1560
1561 while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) {
1562 DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name);
1563
1564 if (list_empty(&ep->queue)) {
1565 dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n");
1566 usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY);
1567 return;
1568 }
1569
1570 req = list_entry(ep->queue.next, struct usba_request, queue);
1571
1572 if (req->using_dma) {
1573 /* Send a zero-length packet */
1574 usba_ep_writel(ep, SET_STA,
1575 USBA_TX_PK_RDY);
1576 usba_ep_writel(ep, CTL_DIS,
1577 USBA_TX_PK_RDY);
1578 list_del_init(&req->queue);
1579 submit_next_request(ep);
1580 request_complete(ep, req, 0);
1581 } else {
1582 if (req->submitted)
1583 next_fifo_transaction(ep, req);
1584 else
1585 submit_request(ep, req);
1586
1587 if (req->last_transaction) {
1588 list_del_init(&req->queue);
1589 submit_next_request(ep);
1590 request_complete(ep, req, 0);
1591 }
1592 }
1593
1594 epstatus = usba_ep_readl(ep, STA);
1595 epctrl = usba_ep_readl(ep, CTL);
1596 }
1597 if ((epstatus & epctrl) & USBA_RX_BK_RDY) {
1598 DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name);
1599 receive_data(ep);
1600 usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY);
1601 }
1602 }
1603
usba_dma_irq(struct usba_udc * udc,struct usba_ep * ep)1604 static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep)
1605 {
1606 struct usba_request *req;
1607 u32 status, control, pending;
1608
1609 status = usba_dma_readl(ep, STATUS);
1610 control = usba_dma_readl(ep, CONTROL);
1611 #ifdef CONFIG_USB_GADGET_DEBUG_FS
1612 ep->last_dma_status = status;
1613 #endif
1614 pending = status & control;
1615 DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control);
1616
1617 if (status & USBA_DMA_CH_EN) {
1618 dev_err(&udc->pdev->dev,
1619 "DMA_CH_EN is set after transfer is finished!\n");
1620 dev_err(&udc->pdev->dev,
1621 "status=%#08x, pending=%#08x, control=%#08x\n",
1622 status, pending, control);
1623
1624 /*
1625 * try to pretend nothing happened. We might have to
1626 * do something here...
1627 */
1628 }
1629
1630 if (list_empty(&ep->queue))
1631 /* Might happen if a reset comes along at the right moment */
1632 return;
1633
1634 if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) {
1635 req = list_entry(ep->queue.next, struct usba_request, queue);
1636 usba_update_req(ep, req, status);
1637
1638 list_del_init(&req->queue);
1639 submit_next_request(ep);
1640 request_complete(ep, req, 0);
1641 }
1642 }
1643
usba_udc_irq(int irq,void * devid)1644 static irqreturn_t usba_udc_irq(int irq, void *devid)
1645 {
1646 struct usba_udc *udc = devid;
1647 u32 status;
1648 u32 dma_status;
1649 u32 ep_status;
1650
1651 spin_lock(&udc->lock);
1652
1653 status = usba_readl(udc, INT_STA);
1654 DBG(DBG_INT, "irq, status=%#08x\n", status);
1655
1656 if (status & USBA_DET_SUSPEND) {
1657 toggle_bias(0);
1658 usba_writel(udc, INT_CLR, USBA_DET_SUSPEND);
1659 DBG(DBG_BUS, "Suspend detected\n");
1660 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1661 && udc->driver && udc->driver->suspend) {
1662 spin_unlock(&udc->lock);
1663 udc->driver->suspend(&udc->gadget);
1664 spin_lock(&udc->lock);
1665 }
1666 }
1667
1668 if (status & USBA_WAKE_UP) {
1669 toggle_bias(1);
1670 usba_writel(udc, INT_CLR, USBA_WAKE_UP);
1671 DBG(DBG_BUS, "Wake Up CPU detected\n");
1672 }
1673
1674 if (status & USBA_END_OF_RESUME) {
1675 usba_writel(udc, INT_CLR, USBA_END_OF_RESUME);
1676 DBG(DBG_BUS, "Resume detected\n");
1677 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1678 && udc->driver && udc->driver->resume) {
1679 spin_unlock(&udc->lock);
1680 udc->driver->resume(&udc->gadget);
1681 spin_lock(&udc->lock);
1682 }
1683 }
1684
1685 dma_status = USBA_BFEXT(DMA_INT, status);
1686 if (dma_status) {
1687 int i;
1688
1689 for (i = 1; i < USBA_NR_ENDPOINTS; i++)
1690 if (dma_status & (1 << i))
1691 usba_dma_irq(udc, &usba_ep[i]);
1692 }
1693
1694 ep_status = USBA_BFEXT(EPT_INT, status);
1695 if (ep_status) {
1696 int i;
1697
1698 for (i = 0; i < USBA_NR_ENDPOINTS; i++)
1699 if (ep_status & (1 << i)) {
1700 if (ep_is_control(&usba_ep[i]))
1701 usba_control_irq(udc, &usba_ep[i]);
1702 else
1703 usba_ep_irq(udc, &usba_ep[i]);
1704 }
1705 }
1706
1707 if (status & USBA_END_OF_RESET) {
1708 struct usba_ep *ep0;
1709
1710 usba_writel(udc, INT_CLR, USBA_END_OF_RESET);
1711 reset_all_endpoints(udc);
1712
1713 if (udc->gadget.speed != USB_SPEED_UNKNOWN
1714 && udc->driver->disconnect) {
1715 udc->gadget.speed = USB_SPEED_UNKNOWN;
1716 spin_unlock(&udc->lock);
1717 udc->driver->disconnect(&udc->gadget);
1718 spin_lock(&udc->lock);
1719 }
1720
1721 if (status & USBA_HIGH_SPEED)
1722 udc->gadget.speed = USB_SPEED_HIGH;
1723 else
1724 udc->gadget.speed = USB_SPEED_FULL;
1725 DBG(DBG_BUS, "%s bus reset detected\n",
1726 usb_speed_string(udc->gadget.speed));
1727
1728 ep0 = &usba_ep[0];
1729 ep0->desc = &usba_ep0_desc;
1730 ep0->state = WAIT_FOR_SETUP;
1731 usba_ep_writel(ep0, CFG,
1732 (USBA_BF(EPT_SIZE, EP0_EPT_SIZE)
1733 | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL)
1734 | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE)));
1735 usba_ep_writel(ep0, CTL_ENB,
1736 USBA_EPT_ENABLE | USBA_RX_SETUP);
1737 usba_writel(udc, INT_ENB,
1738 (usba_readl(udc, INT_ENB)
1739 | USBA_BF(EPT_INT, 1)
1740 | USBA_DET_SUSPEND
1741 | USBA_END_OF_RESUME));
1742
1743 /*
1744 * Unclear why we hit this irregularly, e.g. in usbtest,
1745 * but it's clearly harmless...
1746 */
1747 if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED))
1748 dev_dbg(&udc->pdev->dev,
1749 "ODD: EP0 configuration is invalid!\n");
1750 }
1751
1752 spin_unlock(&udc->lock);
1753
1754 return IRQ_HANDLED;
1755 }
1756
usba_vbus_irq(int irq,void * devid)1757 static irqreturn_t usba_vbus_irq(int irq, void *devid)
1758 {
1759 struct usba_udc *udc = devid;
1760 int vbus;
1761
1762 /* debounce */
1763 udelay(10);
1764
1765 spin_lock(&udc->lock);
1766
1767 /* May happen if Vbus pin toggles during probe() */
1768 if (!udc->driver)
1769 goto out;
1770
1771 vbus = vbus_is_present(udc);
1772 if (vbus != udc->vbus_prev) {
1773 if (vbus) {
1774 toggle_bias(1);
1775 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1776 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1777 } else {
1778 udc->gadget.speed = USB_SPEED_UNKNOWN;
1779 reset_all_endpoints(udc);
1780 toggle_bias(0);
1781 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1782 if (udc->driver->disconnect) {
1783 spin_unlock(&udc->lock);
1784 udc->driver->disconnect(&udc->gadget);
1785 spin_lock(&udc->lock);
1786 }
1787 }
1788 udc->vbus_prev = vbus;
1789 }
1790
1791 out:
1792 spin_unlock(&udc->lock);
1793
1794 return IRQ_HANDLED;
1795 }
1796
atmel_usba_start(struct usb_gadget_driver * driver,int (* bind)(struct usb_gadget *))1797 static int atmel_usba_start(struct usb_gadget_driver *driver,
1798 int (*bind)(struct usb_gadget *))
1799 {
1800 struct usba_udc *udc = &the_udc;
1801 unsigned long flags;
1802 int ret;
1803
1804 if (!udc->pdev)
1805 return -ENODEV;
1806
1807 spin_lock_irqsave(&udc->lock, flags);
1808 if (udc->driver) {
1809 spin_unlock_irqrestore(&udc->lock, flags);
1810 return -EBUSY;
1811 }
1812
1813 udc->devstatus = 1 << USB_DEVICE_SELF_POWERED;
1814 udc->driver = driver;
1815 udc->gadget.dev.driver = &driver->driver;
1816 spin_unlock_irqrestore(&udc->lock, flags);
1817
1818 clk_enable(udc->pclk);
1819 clk_enable(udc->hclk);
1820
1821 ret = bind(&udc->gadget);
1822 if (ret) {
1823 DBG(DBG_ERR, "Could not bind to driver %s: error %d\n",
1824 driver->driver.name, ret);
1825 goto err_driver_bind;
1826 }
1827
1828 DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name);
1829
1830 udc->vbus_prev = 0;
1831 if (gpio_is_valid(udc->vbus_pin))
1832 enable_irq(gpio_to_irq(udc->vbus_pin));
1833
1834 /* If Vbus is present, enable the controller and wait for reset */
1835 spin_lock_irqsave(&udc->lock, flags);
1836 if (vbus_is_present(udc) && udc->vbus_prev == 0) {
1837 toggle_bias(1);
1838 usba_writel(udc, CTRL, USBA_ENABLE_MASK);
1839 usba_writel(udc, INT_ENB, USBA_END_OF_RESET);
1840 }
1841 spin_unlock_irqrestore(&udc->lock, flags);
1842
1843 return 0;
1844
1845 err_driver_bind:
1846 udc->driver = NULL;
1847 udc->gadget.dev.driver = NULL;
1848 return ret;
1849 }
1850
atmel_usba_stop(struct usb_gadget_driver * driver)1851 static int atmel_usba_stop(struct usb_gadget_driver *driver)
1852 {
1853 struct usba_udc *udc = &the_udc;
1854 unsigned long flags;
1855
1856 if (!udc->pdev)
1857 return -ENODEV;
1858 if (driver != udc->driver || !driver->unbind)
1859 return -EINVAL;
1860
1861 if (gpio_is_valid(udc->vbus_pin))
1862 disable_irq(gpio_to_irq(udc->vbus_pin));
1863
1864 spin_lock_irqsave(&udc->lock, flags);
1865 udc->gadget.speed = USB_SPEED_UNKNOWN;
1866 reset_all_endpoints(udc);
1867 spin_unlock_irqrestore(&udc->lock, flags);
1868
1869 /* This will also disable the DP pullup */
1870 toggle_bias(0);
1871 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1872
1873 if (udc->driver->disconnect)
1874 udc->driver->disconnect(&udc->gadget);
1875
1876 driver->unbind(&udc->gadget);
1877 udc->gadget.dev.driver = NULL;
1878 udc->driver = NULL;
1879
1880 clk_disable(udc->hclk);
1881 clk_disable(udc->pclk);
1882
1883 DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name);
1884
1885 return 0;
1886 }
1887
usba_udc_probe(struct platform_device * pdev)1888 static int __init usba_udc_probe(struct platform_device *pdev)
1889 {
1890 struct usba_platform_data *pdata = pdev->dev.platform_data;
1891 struct resource *regs, *fifo;
1892 struct clk *pclk, *hclk;
1893 struct usba_udc *udc = &the_udc;
1894 int irq, ret, i;
1895
1896 regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID);
1897 fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID);
1898 if (!regs || !fifo || !pdata)
1899 return -ENXIO;
1900
1901 irq = platform_get_irq(pdev, 0);
1902 if (irq < 0)
1903 return irq;
1904
1905 pclk = clk_get(&pdev->dev, "pclk");
1906 if (IS_ERR(pclk))
1907 return PTR_ERR(pclk);
1908 hclk = clk_get(&pdev->dev, "hclk");
1909 if (IS_ERR(hclk)) {
1910 ret = PTR_ERR(hclk);
1911 goto err_get_hclk;
1912 }
1913
1914 spin_lock_init(&udc->lock);
1915 udc->pdev = pdev;
1916 udc->pclk = pclk;
1917 udc->hclk = hclk;
1918 udc->vbus_pin = -ENODEV;
1919
1920 ret = -ENOMEM;
1921 udc->regs = ioremap(regs->start, resource_size(regs));
1922 if (!udc->regs) {
1923 dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n");
1924 goto err_map_regs;
1925 }
1926 dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n",
1927 (unsigned long)regs->start, udc->regs);
1928 udc->fifo = ioremap(fifo->start, resource_size(fifo));
1929 if (!udc->fifo) {
1930 dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n");
1931 goto err_map_fifo;
1932 }
1933 dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n",
1934 (unsigned long)fifo->start, udc->fifo);
1935
1936 device_initialize(&udc->gadget.dev);
1937 udc->gadget.dev.parent = &pdev->dev;
1938 udc->gadget.dev.dma_mask = pdev->dev.dma_mask;
1939
1940 platform_set_drvdata(pdev, udc);
1941
1942 /* Make sure we start from a clean slate */
1943 clk_enable(pclk);
1944 toggle_bias(0);
1945 usba_writel(udc, CTRL, USBA_DISABLE_MASK);
1946 clk_disable(pclk);
1947
1948 usba_ep = kzalloc(sizeof(struct usba_ep) * pdata->num_ep,
1949 GFP_KERNEL);
1950 if (!usba_ep)
1951 goto err_alloc_ep;
1952
1953 the_udc.gadget.ep0 = &usba_ep[0].ep;
1954
1955 INIT_LIST_HEAD(&usba_ep[0].ep.ep_list);
1956 usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0);
1957 usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0);
1958 usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0);
1959 usba_ep[0].ep.ops = &usba_ep_ops;
1960 usba_ep[0].ep.name = pdata->ep[0].name;
1961 usba_ep[0].ep.maxpacket = pdata->ep[0].fifo_size;
1962 usba_ep[0].udc = &the_udc;
1963 INIT_LIST_HEAD(&usba_ep[0].queue);
1964 usba_ep[0].fifo_size = pdata->ep[0].fifo_size;
1965 usba_ep[0].nr_banks = pdata->ep[0].nr_banks;
1966 usba_ep[0].index = pdata->ep[0].index;
1967 usba_ep[0].can_dma = pdata->ep[0].can_dma;
1968 usba_ep[0].can_isoc = pdata->ep[0].can_isoc;
1969
1970 for (i = 1; i < pdata->num_ep; i++) {
1971 struct usba_ep *ep = &usba_ep[i];
1972
1973 ep->ep_regs = udc->regs + USBA_EPT_BASE(i);
1974 ep->dma_regs = udc->regs + USBA_DMA_BASE(i);
1975 ep->fifo = udc->fifo + USBA_FIFO_BASE(i);
1976 ep->ep.ops = &usba_ep_ops;
1977 ep->ep.name = pdata->ep[i].name;
1978 ep->ep.maxpacket = pdata->ep[i].fifo_size;
1979 ep->udc = &the_udc;
1980 INIT_LIST_HEAD(&ep->queue);
1981 ep->fifo_size = pdata->ep[i].fifo_size;
1982 ep->nr_banks = pdata->ep[i].nr_banks;
1983 ep->index = pdata->ep[i].index;
1984 ep->can_dma = pdata->ep[i].can_dma;
1985 ep->can_isoc = pdata->ep[i].can_isoc;
1986
1987 list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list);
1988 }
1989
1990 ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc);
1991 if (ret) {
1992 dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n",
1993 irq, ret);
1994 goto err_request_irq;
1995 }
1996 udc->irq = irq;
1997
1998 ret = device_add(&udc->gadget.dev);
1999 if (ret) {
2000 dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret);
2001 goto err_device_add;
2002 }
2003
2004 if (gpio_is_valid(pdata->vbus_pin)) {
2005 if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) {
2006 udc->vbus_pin = pdata->vbus_pin;
2007 udc->vbus_pin_inverted = pdata->vbus_pin_inverted;
2008
2009 ret = request_irq(gpio_to_irq(udc->vbus_pin),
2010 usba_vbus_irq, 0,
2011 "atmel_usba_udc", udc);
2012 if (ret) {
2013 gpio_free(udc->vbus_pin);
2014 udc->vbus_pin = -ENODEV;
2015 dev_warn(&udc->pdev->dev,
2016 "failed to request vbus irq; "
2017 "assuming always on\n");
2018 } else {
2019 disable_irq(gpio_to_irq(udc->vbus_pin));
2020 }
2021 } else {
2022 /* gpio_request fail so use -EINVAL for gpio_is_valid */
2023 udc->vbus_pin = -EINVAL;
2024 }
2025 }
2026
2027 ret = usb_add_gadget_udc(&pdev->dev, &udc->gadget);
2028 if (ret)
2029 goto err_add_udc;
2030
2031 usba_init_debugfs(udc);
2032 for (i = 1; i < pdata->num_ep; i++)
2033 usba_ep_init_debugfs(udc, &usba_ep[i]);
2034
2035 return 0;
2036
2037 err_add_udc:
2038 if (gpio_is_valid(pdata->vbus_pin)) {
2039 free_irq(gpio_to_irq(udc->vbus_pin), udc);
2040 gpio_free(udc->vbus_pin);
2041 }
2042
2043 device_unregister(&udc->gadget.dev);
2044
2045 err_device_add:
2046 free_irq(irq, udc);
2047 err_request_irq:
2048 kfree(usba_ep);
2049 err_alloc_ep:
2050 iounmap(udc->fifo);
2051 err_map_fifo:
2052 iounmap(udc->regs);
2053 err_map_regs:
2054 clk_put(hclk);
2055 err_get_hclk:
2056 clk_put(pclk);
2057
2058 platform_set_drvdata(pdev, NULL);
2059
2060 return ret;
2061 }
2062
usba_udc_remove(struct platform_device * pdev)2063 static int __exit usba_udc_remove(struct platform_device *pdev)
2064 {
2065 struct usba_udc *udc;
2066 int i;
2067 struct usba_platform_data *pdata = pdev->dev.platform_data;
2068
2069 udc = platform_get_drvdata(pdev);
2070
2071 usb_del_gadget_udc(&udc->gadget);
2072
2073 for (i = 1; i < pdata->num_ep; i++)
2074 usba_ep_cleanup_debugfs(&usba_ep[i]);
2075 usba_cleanup_debugfs(udc);
2076
2077 if (gpio_is_valid(udc->vbus_pin)) {
2078 free_irq(gpio_to_irq(udc->vbus_pin), udc);
2079 gpio_free(udc->vbus_pin);
2080 }
2081
2082 free_irq(udc->irq, udc);
2083 kfree(usba_ep);
2084 iounmap(udc->fifo);
2085 iounmap(udc->regs);
2086 clk_put(udc->hclk);
2087 clk_put(udc->pclk);
2088
2089 device_unregister(&udc->gadget.dev);
2090
2091 return 0;
2092 }
2093
2094 static struct platform_driver udc_driver = {
2095 .remove = __exit_p(usba_udc_remove),
2096 .driver = {
2097 .name = "atmel_usba_udc",
2098 .owner = THIS_MODULE,
2099 },
2100 };
2101
udc_init(void)2102 static int __init udc_init(void)
2103 {
2104 return platform_driver_probe(&udc_driver, usba_udc_probe);
2105 }
2106 module_init(udc_init);
2107
udc_exit(void)2108 static void __exit udc_exit(void)
2109 {
2110 platform_driver_unregister(&udc_driver);
2111 }
2112 module_exit(udc_exit);
2113
2114 MODULE_DESCRIPTION("Atmel USBA UDC driver");
2115 MODULE_AUTHOR("Haavard Skinnemoen (Atmel)");
2116 MODULE_LICENSE("GPL");
2117 MODULE_ALIAS("platform:atmel_usba_udc");
2118