1 /*
2 * ad2s1210.c support for the ADI Resolver to Digital Converters: AD2S1210
3 *
4 * Copyright (c) 2010-2010 Analog Devices Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11 #include <linux/types.h>
12 #include <linux/mutex.h>
13 #include <linux/device.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/delay.h>
18 #include <linux/gpio.h>
19 #include <linux/module.h>
20
21 #include "../iio.h"
22 #include "../sysfs.h"
23 #include "ad2s1210.h"
24
25 #define DRV_NAME "ad2s1210"
26
27 #define AD2S1210_DEF_CONTROL 0x7E
28
29 #define AD2S1210_MSB_IS_HIGH 0x80
30 #define AD2S1210_MSB_IS_LOW 0x7F
31 #define AD2S1210_PHASE_LOCK_RANGE_44 0x20
32 #define AD2S1210_ENABLE_HYSTERESIS 0x10
33 #define AD2S1210_SET_ENRES1 0x08
34 #define AD2S1210_SET_ENRES0 0x04
35 #define AD2S1210_SET_RES1 0x02
36 #define AD2S1210_SET_RES0 0x01
37
38 #define AD2S1210_SET_ENRESOLUTION (AD2S1210_SET_ENRES1 | \
39 AD2S1210_SET_ENRES0)
40 #define AD2S1210_SET_RESOLUTION (AD2S1210_SET_RES1 | AD2S1210_SET_RES0)
41
42 #define AD2S1210_REG_POSITION 0x80
43 #define AD2S1210_REG_VELOCITY 0x82
44 #define AD2S1210_REG_LOS_THRD 0x88
45 #define AD2S1210_REG_DOS_OVR_THRD 0x89
46 #define AD2S1210_REG_DOS_MIS_THRD 0x8A
47 #define AD2S1210_REG_DOS_RST_MAX_THRD 0x8B
48 #define AD2S1210_REG_DOS_RST_MIN_THRD 0x8C
49 #define AD2S1210_REG_LOT_HIGH_THRD 0x8D
50 #define AD2S1210_REG_LOT_LOW_THRD 0x8E
51 #define AD2S1210_REG_EXCIT_FREQ 0x91
52 #define AD2S1210_REG_CONTROL 0x92
53 #define AD2S1210_REG_SOFT_RESET 0xF0
54 #define AD2S1210_REG_FAULT 0xFF
55
56 /* pin SAMPLE, A0, A1, RES0, RES1, is controlled by driver */
57 #define AD2S1210_SAA 3
58 #define AD2S1210_PN (AD2S1210_SAA + AD2S1210_RES)
59
60 #define AD2S1210_MIN_CLKIN 6144000
61 #define AD2S1210_MAX_CLKIN 10240000
62 #define AD2S1210_MIN_EXCIT 2000
63 #define AD2S1210_MAX_EXCIT 20000
64 #define AD2S1210_MIN_FCW 0x4
65 #define AD2S1210_MAX_FCW 0x50
66
67 /* default input clock on serial interface */
68 #define AD2S1210_DEF_CLKIN 8192000
69 /* clock period in nano second */
70 #define AD2S1210_DEF_TCK (1000000000/AD2S1210_DEF_CLKIN)
71 #define AD2S1210_DEF_EXCIT 10000
72
73 enum ad2s1210_mode {
74 MOD_POS = 0,
75 MOD_VEL,
76 MOD_CONFIG,
77 MOD_RESERVED,
78 };
79
80 static const unsigned int ad2s1210_resolution_value[] = { 10, 12, 14, 16 };
81
82 struct ad2s1210_state {
83 const struct ad2s1210_platform_data *pdata;
84 struct mutex lock;
85 struct spi_device *sdev;
86 unsigned int fclkin;
87 unsigned int fexcit;
88 bool hysteresis;
89 bool old_data;
90 u8 resolution;
91 enum ad2s1210_mode mode;
92 u8 rx[2] ____cacheline_aligned;
93 u8 tx[2] ____cacheline_aligned;
94 };
95
96 static const int ad2s1210_mode_vals[4][2] = {
97 [MOD_POS] = { 0, 0 },
98 [MOD_VEL] = { 0, 1 },
99 [MOD_CONFIG] = { 1, 0 },
100 };
ad2s1210_set_mode(enum ad2s1210_mode mode,struct ad2s1210_state * st)101 static inline void ad2s1210_set_mode(enum ad2s1210_mode mode,
102 struct ad2s1210_state *st)
103 {
104 gpio_set_value(st->pdata->a[0], ad2s1210_mode_vals[mode][0]);
105 gpio_set_value(st->pdata->a[1], ad2s1210_mode_vals[mode][1]);
106 st->mode = mode;
107 }
108
109 /* write 1 bytes (address or data) to the chip */
ad2s1210_config_write(struct ad2s1210_state * st,u8 data)110 static int ad2s1210_config_write(struct ad2s1210_state *st, u8 data)
111 {
112 int ret;
113
114 ad2s1210_set_mode(MOD_CONFIG, st);
115 st->tx[0] = data;
116 ret = spi_write(st->sdev, st->tx, 1);
117 if (ret < 0)
118 return ret;
119 st->old_data = true;
120
121 return 0;
122 }
123
124 /* read value from one of the registers */
ad2s1210_config_read(struct ad2s1210_state * st,unsigned char address)125 static int ad2s1210_config_read(struct ad2s1210_state *st,
126 unsigned char address)
127 {
128 struct spi_transfer xfer = {
129 .len = 2,
130 .rx_buf = st->rx,
131 .tx_buf = st->tx,
132 };
133 struct spi_message msg;
134 int ret = 0;
135
136 ad2s1210_set_mode(MOD_CONFIG, st);
137 spi_message_init(&msg);
138 spi_message_add_tail(&xfer, &msg);
139 st->tx[0] = address | AD2S1210_MSB_IS_HIGH;
140 st->tx[1] = AD2S1210_REG_FAULT;
141 ret = spi_sync(st->sdev, &msg);
142 if (ret < 0)
143 return ret;
144 st->old_data = true;
145
146 return st->rx[1];
147 }
148
149 static inline
ad2s1210_update_frequency_control_word(struct ad2s1210_state * st)150 int ad2s1210_update_frequency_control_word(struct ad2s1210_state *st)
151 {
152 int ret;
153 unsigned char fcw;
154
155 fcw = (unsigned char)(st->fexcit * (1 << 15) / st->fclkin);
156 if (fcw < AD2S1210_MIN_FCW || fcw > AD2S1210_MAX_FCW) {
157 pr_err("ad2s1210: FCW out of range\n");
158 return -ERANGE;
159 }
160
161 ret = ad2s1210_config_write(st, AD2S1210_REG_EXCIT_FREQ);
162 if (ret < 0)
163 return ret;
164
165 return ad2s1210_config_write(st, fcw);
166 }
167
ad2s1210_read_resolution_pin(struct ad2s1210_state * st)168 static unsigned char ad2s1210_read_resolution_pin(struct ad2s1210_state *st)
169 {
170 return ad2s1210_resolution_value[
171 (gpio_get_value(st->pdata->res[0]) << 1) |
172 gpio_get_value(st->pdata->res[1])];
173 }
174
175 static const int ad2s1210_res_pins[4][2] = {
176 { 0, 0 }, {0, 1}, {1, 0}, {1, 1}
177 };
178
ad2s1210_set_resolution_pin(struct ad2s1210_state * st)179 static inline void ad2s1210_set_resolution_pin(struct ad2s1210_state *st)
180 {
181 gpio_set_value(st->pdata->res[0],
182 ad2s1210_res_pins[(st->resolution - 10)/2][0]);
183 gpio_set_value(st->pdata->res[1],
184 ad2s1210_res_pins[(st->resolution - 10)/2][1]);
185 }
186
ad2s1210_soft_reset(struct ad2s1210_state * st)187 static inline int ad2s1210_soft_reset(struct ad2s1210_state *st)
188 {
189 int ret;
190
191 ret = ad2s1210_config_write(st, AD2S1210_REG_SOFT_RESET);
192 if (ret < 0)
193 return ret;
194
195 return ad2s1210_config_write(st, 0x0);
196 }
197
ad2s1210_store_softreset(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)198 static ssize_t ad2s1210_store_softreset(struct device *dev,
199 struct device_attribute *attr,
200 const char *buf,
201 size_t len)
202 {
203 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
204 int ret;
205
206 mutex_lock(&st->lock);
207 ret = ad2s1210_soft_reset(st);
208 mutex_unlock(&st->lock);
209
210 return ret < 0 ? ret : len;
211 }
212
ad2s1210_show_fclkin(struct device * dev,struct device_attribute * attr,char * buf)213 static ssize_t ad2s1210_show_fclkin(struct device *dev,
214 struct device_attribute *attr,
215 char *buf)
216 {
217 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
218 return sprintf(buf, "%d\n", st->fclkin);
219 }
220
ad2s1210_store_fclkin(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)221 static ssize_t ad2s1210_store_fclkin(struct device *dev,
222 struct device_attribute *attr,
223 const char *buf,
224 size_t len)
225 {
226 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
227 unsigned long fclkin;
228 int ret;
229
230 ret = strict_strtoul(buf, 10, &fclkin);
231 if (ret)
232 return ret;
233 if (fclkin < AD2S1210_MIN_CLKIN || fclkin > AD2S1210_MAX_CLKIN) {
234 pr_err("ad2s1210: fclkin out of range\n");
235 return -EINVAL;
236 }
237
238 mutex_lock(&st->lock);
239 st->fclkin = fclkin;
240
241 ret = ad2s1210_update_frequency_control_word(st);
242 if (ret < 0)
243 goto error_ret;
244 ret = ad2s1210_soft_reset(st);
245 error_ret:
246 mutex_unlock(&st->lock);
247
248 return ret < 0 ? ret : len;
249 }
250
ad2s1210_show_fexcit(struct device * dev,struct device_attribute * attr,char * buf)251 static ssize_t ad2s1210_show_fexcit(struct device *dev,
252 struct device_attribute *attr,
253 char *buf)
254 {
255 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
256 return sprintf(buf, "%d\n", st->fexcit);
257 }
258
ad2s1210_store_fexcit(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)259 static ssize_t ad2s1210_store_fexcit(struct device *dev,
260 struct device_attribute *attr,
261 const char *buf, size_t len)
262 {
263 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
264 unsigned long fexcit;
265 int ret;
266
267 ret = strict_strtoul(buf, 10, &fexcit);
268 if (ret < 0)
269 return ret;
270 if (fexcit < AD2S1210_MIN_EXCIT || fexcit > AD2S1210_MAX_EXCIT) {
271 pr_err("ad2s1210: excitation frequency out of range\n");
272 return -EINVAL;
273 }
274 mutex_lock(&st->lock);
275 st->fexcit = fexcit;
276 ret = ad2s1210_update_frequency_control_word(st);
277 if (ret < 0)
278 goto error_ret;
279 ret = ad2s1210_soft_reset(st);
280 error_ret:
281 mutex_unlock(&st->lock);
282
283 return ret < 0 ? ret : len;
284 }
285
ad2s1210_show_control(struct device * dev,struct device_attribute * attr,char * buf)286 static ssize_t ad2s1210_show_control(struct device *dev,
287 struct device_attribute *attr,
288 char *buf)
289 {
290 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
291 int ret;
292 mutex_lock(&st->lock);
293 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
294 mutex_unlock(&st->lock);
295 return ret < 0 ? ret : sprintf(buf, "0x%x\n", ret);
296 }
297
ad2s1210_store_control(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)298 static ssize_t ad2s1210_store_control(struct device *dev,
299 struct device_attribute *attr,
300 const char *buf, size_t len)
301 {
302 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
303 unsigned long udata;
304 unsigned char data;
305 int ret;
306
307 ret = strict_strtoul(buf, 16, &udata);
308 if (ret)
309 return -EINVAL;
310
311 mutex_lock(&st->lock);
312 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
313 if (ret < 0)
314 goto error_ret;
315 data = udata & AD2S1210_MSB_IS_LOW;
316 ret = ad2s1210_config_write(st, data);
317 if (ret < 0)
318 goto error_ret;
319
320 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
321 if (ret < 0)
322 goto error_ret;
323 if (ret & AD2S1210_MSB_IS_HIGH) {
324 ret = -EIO;
325 pr_err("ad2s1210: write control register fail\n");
326 goto error_ret;
327 }
328 st->resolution
329 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
330 if (st->pdata->gpioin) {
331 data = ad2s1210_read_resolution_pin(st);
332 if (data != st->resolution)
333 pr_warning("ad2s1210: resolution settings not match\n");
334 } else
335 ad2s1210_set_resolution_pin(st);
336
337 ret = len;
338 st->hysteresis = !!(data & AD2S1210_ENABLE_HYSTERESIS);
339
340 error_ret:
341 mutex_unlock(&st->lock);
342 return ret;
343 }
344
ad2s1210_show_resolution(struct device * dev,struct device_attribute * attr,char * buf)345 static ssize_t ad2s1210_show_resolution(struct device *dev,
346 struct device_attribute *attr, char *buf)
347 {
348 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
349 return sprintf(buf, "%d\n", st->resolution);
350 }
351
ad2s1210_store_resolution(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)352 static ssize_t ad2s1210_store_resolution(struct device *dev,
353 struct device_attribute *attr,
354 const char *buf, size_t len)
355 {
356 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
357 unsigned char data;
358 unsigned long udata;
359 int ret;
360
361 ret = strict_strtoul(buf, 10, &udata);
362 if (ret || udata < 10 || udata > 16) {
363 pr_err("ad2s1210: resolution out of range\n");
364 return -EINVAL;
365 }
366 mutex_lock(&st->lock);
367 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
368 if (ret < 0)
369 goto error_ret;
370 data = ret;
371 data &= ~AD2S1210_SET_RESOLUTION;
372 data |= (udata - 10) >> 1;
373 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
374 if (ret < 0)
375 goto error_ret;
376 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
377 if (ret < 0)
378 goto error_ret;
379 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
380 if (ret < 0)
381 goto error_ret;
382 data = ret;
383 if (data & AD2S1210_MSB_IS_HIGH) {
384 ret = -EIO;
385 pr_err("ad2s1210: setting resolution fail\n");
386 goto error_ret;
387 }
388 st->resolution
389 = ad2s1210_resolution_value[data & AD2S1210_SET_RESOLUTION];
390 if (st->pdata->gpioin) {
391 data = ad2s1210_read_resolution_pin(st);
392 if (data != st->resolution)
393 pr_warning("ad2s1210: resolution settings not match\n");
394 } else
395 ad2s1210_set_resolution_pin(st);
396 ret = len;
397 error_ret:
398 mutex_unlock(&st->lock);
399 return ret;
400 }
401
402 /* read the fault register since last sample */
ad2s1210_show_fault(struct device * dev,struct device_attribute * attr,char * buf)403 static ssize_t ad2s1210_show_fault(struct device *dev,
404 struct device_attribute *attr, char *buf)
405 {
406 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
407 int ret;
408
409 mutex_lock(&st->lock);
410 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
411 mutex_unlock(&st->lock);
412
413 return ret ? ret : sprintf(buf, "0x%x\n", ret);
414 }
415
ad2s1210_clear_fault(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)416 static ssize_t ad2s1210_clear_fault(struct device *dev,
417 struct device_attribute *attr,
418 const char *buf,
419 size_t len)
420 {
421 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
422 int ret;
423
424 mutex_lock(&st->lock);
425 gpio_set_value(st->pdata->sample, 0);
426 /* delay (2 * tck + 20) nano seconds */
427 udelay(1);
428 gpio_set_value(st->pdata->sample, 1);
429 ret = ad2s1210_config_read(st, AD2S1210_REG_FAULT);
430 if (ret < 0)
431 goto error_ret;
432 gpio_set_value(st->pdata->sample, 0);
433 gpio_set_value(st->pdata->sample, 1);
434 error_ret:
435 mutex_unlock(&st->lock);
436
437 return ret < 0 ? ret : len;
438 }
439
ad2s1210_show_reg(struct device * dev,struct device_attribute * attr,char * buf)440 static ssize_t ad2s1210_show_reg(struct device *dev,
441 struct device_attribute *attr,
442 char *buf)
443 {
444 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
445 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
446 int ret;
447
448 mutex_lock(&st->lock);
449 ret = ad2s1210_config_read(st, iattr->address);
450 mutex_unlock(&st->lock);
451
452 return ret < 0 ? ret : sprintf(buf, "%d\n", ret);
453 }
454
ad2s1210_store_reg(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)455 static ssize_t ad2s1210_store_reg(struct device *dev,
456 struct device_attribute *attr, const char *buf, size_t len)
457 {
458 struct ad2s1210_state *st = iio_priv(dev_get_drvdata(dev));
459 unsigned long data;
460 int ret;
461 struct iio_dev_attr *iattr = to_iio_dev_attr(attr);
462
463 ret = strict_strtoul(buf, 10, &data);
464 if (ret)
465 return -EINVAL;
466 mutex_lock(&st->lock);
467 ret = ad2s1210_config_write(st, iattr->address);
468 if (ret < 0)
469 goto error_ret;
470 ret = ad2s1210_config_write(st, data & AD2S1210_MSB_IS_LOW);
471 error_ret:
472 mutex_unlock(&st->lock);
473 return ret < 0 ? ret : len;
474 }
475
ad2s1210_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)476 static int ad2s1210_read_raw(struct iio_dev *indio_dev,
477 struct iio_chan_spec const *chan,
478 int *val,
479 int *val2,
480 long m)
481 {
482 struct ad2s1210_state *st = iio_priv(indio_dev);
483 bool negative;
484 int ret = 0;
485 u16 pos;
486 s16 vel;
487
488 mutex_lock(&st->lock);
489 gpio_set_value(st->pdata->sample, 0);
490 /* delay (6 * tck + 20) nano seconds */
491 udelay(1);
492
493 switch (chan->type) {
494 case IIO_ANGL:
495 ad2s1210_set_mode(MOD_POS, st);
496 break;
497 case IIO_ANGL_VEL:
498 ad2s1210_set_mode(MOD_VEL, st);
499 break;
500 default:
501 ret = -EINVAL;
502 break;
503 }
504 if (ret < 0)
505 goto error_ret;
506 ret = spi_read(st->sdev, st->rx, 2);
507 if (ret < 0)
508 goto error_ret;
509
510 switch (chan->type) {
511 case IIO_ANGL:
512 pos = be16_to_cpup((u16 *)st->rx);
513 if (st->hysteresis)
514 pos >>= 16 - st->resolution;
515 *val = pos;
516 ret = IIO_VAL_INT;
517 break;
518 case IIO_ANGL_VEL:
519 negative = st->rx[0] & 0x80;
520 vel = be16_to_cpup((s16 *)st->rx);
521 vel >>= 16 - st->resolution;
522 if (vel & 0x8000) {
523 negative = (0xffff >> st->resolution) << st->resolution;
524 vel |= negative;
525 }
526 *val = vel;
527 ret = IIO_VAL_INT;
528 break;
529 default:
530 mutex_unlock(&st->lock);
531 return -EINVAL;
532 }
533
534 error_ret:
535 gpio_set_value(st->pdata->sample, 1);
536 /* delay (2 * tck + 20) nano seconds */
537 udelay(1);
538 mutex_unlock(&st->lock);
539 return ret;
540 }
541
542 static IIO_DEVICE_ATTR(reset, S_IWUSR,
543 NULL, ad2s1210_store_softreset, 0);
544 static IIO_DEVICE_ATTR(fclkin, S_IRUGO | S_IWUSR,
545 ad2s1210_show_fclkin, ad2s1210_store_fclkin, 0);
546 static IIO_DEVICE_ATTR(fexcit, S_IRUGO | S_IWUSR,
547 ad2s1210_show_fexcit, ad2s1210_store_fexcit, 0);
548 static IIO_DEVICE_ATTR(control, S_IRUGO | S_IWUSR,
549 ad2s1210_show_control, ad2s1210_store_control, 0);
550 static IIO_DEVICE_ATTR(bits, S_IRUGO | S_IWUSR,
551 ad2s1210_show_resolution, ad2s1210_store_resolution, 0);
552 static IIO_DEVICE_ATTR(fault, S_IRUGO | S_IWUSR,
553 ad2s1210_show_fault, ad2s1210_clear_fault, 0);
554
555 static IIO_DEVICE_ATTR(los_thrd, S_IRUGO | S_IWUSR,
556 ad2s1210_show_reg, ad2s1210_store_reg,
557 AD2S1210_REG_LOS_THRD);
558 static IIO_DEVICE_ATTR(dos_ovr_thrd, S_IRUGO | S_IWUSR,
559 ad2s1210_show_reg, ad2s1210_store_reg,
560 AD2S1210_REG_DOS_OVR_THRD);
561 static IIO_DEVICE_ATTR(dos_mis_thrd, S_IRUGO | S_IWUSR,
562 ad2s1210_show_reg, ad2s1210_store_reg,
563 AD2S1210_REG_DOS_MIS_THRD);
564 static IIO_DEVICE_ATTR(dos_rst_max_thrd, S_IRUGO | S_IWUSR,
565 ad2s1210_show_reg, ad2s1210_store_reg,
566 AD2S1210_REG_DOS_RST_MAX_THRD);
567 static IIO_DEVICE_ATTR(dos_rst_min_thrd, S_IRUGO | S_IWUSR,
568 ad2s1210_show_reg, ad2s1210_store_reg,
569 AD2S1210_REG_DOS_RST_MIN_THRD);
570 static IIO_DEVICE_ATTR(lot_high_thrd, S_IRUGO | S_IWUSR,
571 ad2s1210_show_reg, ad2s1210_store_reg,
572 AD2S1210_REG_LOT_HIGH_THRD);
573 static IIO_DEVICE_ATTR(lot_low_thrd, S_IRUGO | S_IWUSR,
574 ad2s1210_show_reg, ad2s1210_store_reg,
575 AD2S1210_REG_LOT_LOW_THRD);
576
577
578 static struct iio_chan_spec ad2s1210_channels[] = {
579 {
580 .type = IIO_ANGL,
581 .indexed = 1,
582 .channel = 0,
583 }, {
584 .type = IIO_ANGL_VEL,
585 .indexed = 1,
586 .channel = 0,
587 }
588 };
589
590 static struct attribute *ad2s1210_attributes[] = {
591 &iio_dev_attr_reset.dev_attr.attr,
592 &iio_dev_attr_fclkin.dev_attr.attr,
593 &iio_dev_attr_fexcit.dev_attr.attr,
594 &iio_dev_attr_control.dev_attr.attr,
595 &iio_dev_attr_bits.dev_attr.attr,
596 &iio_dev_attr_fault.dev_attr.attr,
597 &iio_dev_attr_los_thrd.dev_attr.attr,
598 &iio_dev_attr_dos_ovr_thrd.dev_attr.attr,
599 &iio_dev_attr_dos_mis_thrd.dev_attr.attr,
600 &iio_dev_attr_dos_rst_max_thrd.dev_attr.attr,
601 &iio_dev_attr_dos_rst_min_thrd.dev_attr.attr,
602 &iio_dev_attr_lot_high_thrd.dev_attr.attr,
603 &iio_dev_attr_lot_low_thrd.dev_attr.attr,
604 NULL,
605 };
606
607 static const struct attribute_group ad2s1210_attribute_group = {
608 .attrs = ad2s1210_attributes,
609 };
610
ad2s1210_initial(struct ad2s1210_state * st)611 static int __devinit ad2s1210_initial(struct ad2s1210_state *st)
612 {
613 unsigned char data;
614 int ret;
615
616 mutex_lock(&st->lock);
617 if (st->pdata->gpioin)
618 st->resolution = ad2s1210_read_resolution_pin(st);
619 else
620 ad2s1210_set_resolution_pin(st);
621
622 ret = ad2s1210_config_write(st, AD2S1210_REG_CONTROL);
623 if (ret < 0)
624 goto error_ret;
625 data = AD2S1210_DEF_CONTROL & ~(AD2S1210_SET_RESOLUTION);
626 data |= (st->resolution - 10) >> 1;
627 ret = ad2s1210_config_write(st, data);
628 if (ret < 0)
629 goto error_ret;
630 ret = ad2s1210_config_read(st, AD2S1210_REG_CONTROL);
631 if (ret < 0)
632 goto error_ret;
633
634 if (ret & AD2S1210_MSB_IS_HIGH) {
635 ret = -EIO;
636 goto error_ret;
637 }
638
639 ret = ad2s1210_update_frequency_control_word(st);
640 if (ret < 0)
641 goto error_ret;
642 ret = ad2s1210_soft_reset(st);
643 error_ret:
644 mutex_unlock(&st->lock);
645 return ret;
646 }
647
648 static const struct iio_info ad2s1210_info = {
649 .read_raw = &ad2s1210_read_raw,
650 .attrs = &ad2s1210_attribute_group,
651 .driver_module = THIS_MODULE,
652 };
653
ad2s1210_setup_gpios(struct ad2s1210_state * st)654 static int ad2s1210_setup_gpios(struct ad2s1210_state *st)
655 {
656 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
657 struct gpio ad2s1210_gpios[] = {
658 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
659 { st->pdata->a[0], flags, "a0" },
660 { st->pdata->a[1], flags, "a1" },
661 { st->pdata->res[0], flags, "res0" },
662 { st->pdata->res[0], flags, "res1" },
663 };
664
665 return gpio_request_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
666 }
667
ad2s1210_free_gpios(struct ad2s1210_state * st)668 static void ad2s1210_free_gpios(struct ad2s1210_state *st)
669 {
670 unsigned long flags = st->pdata->gpioin ? GPIOF_DIR_IN : GPIOF_DIR_OUT;
671 struct gpio ad2s1210_gpios[] = {
672 { st->pdata->sample, GPIOF_DIR_IN, "sample" },
673 { st->pdata->a[0], flags, "a0" },
674 { st->pdata->a[1], flags, "a1" },
675 { st->pdata->res[0], flags, "res0" },
676 { st->pdata->res[0], flags, "res1" },
677 };
678
679 gpio_free_array(ad2s1210_gpios, ARRAY_SIZE(ad2s1210_gpios));
680 }
681
ad2s1210_probe(struct spi_device * spi)682 static int __devinit ad2s1210_probe(struct spi_device *spi)
683 {
684 struct iio_dev *indio_dev;
685 struct ad2s1210_state *st;
686 int ret;
687
688 if (spi->dev.platform_data == NULL)
689 return -EINVAL;
690
691 indio_dev = iio_allocate_device(sizeof(*st));
692 if (indio_dev == NULL) {
693 ret = -ENOMEM;
694 goto error_ret;
695 }
696 st = iio_priv(indio_dev);
697 st->pdata = spi->dev.platform_data;
698 ret = ad2s1210_setup_gpios(st);
699 if (ret < 0)
700 goto error_free_dev;
701
702 spi_set_drvdata(spi, indio_dev);
703
704 mutex_init(&st->lock);
705 st->sdev = spi;
706 st->hysteresis = true;
707 st->mode = MOD_CONFIG;
708 st->resolution = 12;
709 st->fexcit = AD2S1210_DEF_EXCIT;
710
711 indio_dev->dev.parent = &spi->dev;
712 indio_dev->info = &ad2s1210_info;
713 indio_dev->modes = INDIO_DIRECT_MODE;
714 indio_dev->channels = ad2s1210_channels;
715 indio_dev->num_channels = ARRAY_SIZE(ad2s1210_channels);
716 indio_dev->name = spi_get_device_id(spi)->name;
717
718 ret = iio_device_register(indio_dev);
719 if (ret)
720 goto error_free_gpios;
721
722 st->fclkin = spi->max_speed_hz;
723 spi->mode = SPI_MODE_3;
724 spi_setup(spi);
725 ad2s1210_initial(st);
726
727 return 0;
728
729 error_free_gpios:
730 ad2s1210_free_gpios(st);
731 error_free_dev:
732 iio_free_device(indio_dev);
733 error_ret:
734 return ret;
735 }
736
ad2s1210_remove(struct spi_device * spi)737 static int __devexit ad2s1210_remove(struct spi_device *spi)
738 {
739 struct iio_dev *indio_dev = spi_get_drvdata(spi);
740
741 iio_device_unregister(indio_dev);
742 ad2s1210_free_gpios(iio_priv(indio_dev));
743 iio_free_device(indio_dev);
744
745 return 0;
746 }
747
748 static const struct spi_device_id ad2s1210_id[] = {
749 { "ad2s1210" },
750 {}
751 };
752 MODULE_DEVICE_TABLE(spi, ad2s1210_id);
753
754 static struct spi_driver ad2s1210_driver = {
755 .driver = {
756 .name = DRV_NAME,
757 .owner = THIS_MODULE,
758 },
759 .probe = ad2s1210_probe,
760 .remove = __devexit_p(ad2s1210_remove),
761 .id_table = ad2s1210_id,
762 };
763 module_spi_driver(ad2s1210_driver);
764
765 MODULE_AUTHOR("Graff Yang <graff.yang@gmail.com>");
766 MODULE_DESCRIPTION("Analog Devices AD2S1210 Resolver to Digital SPI driver");
767 MODULE_LICENSE("GPL v2");
768