1 /*
2  * AD5686R, AD5685R, AD5684R Digital to analog converters  driver
3  *
4  * Copyright 2011 Analog Devices Inc.
5  *
6  * Licensed under the GPL-2.
7  */
8 
9 #include <linux/interrupt.h>
10 #include <linux/fs.h>
11 #include <linux/device.h>
12 #include <linux/module.h>
13 #include <linux/kernel.h>
14 #include <linux/spi/spi.h>
15 #include <linux/slab.h>
16 #include <linux/sysfs.h>
17 #include <linux/regulator/consumer.h>
18 #include <linux/module.h>
19 
20 #include "../iio.h"
21 #include "../sysfs.h"
22 #include "dac.h"
23 
24 #define AD5686_DAC_CHANNELS			4
25 
26 #define AD5686_ADDR(x)				((x) << 16)
27 #define AD5686_CMD(x)				((x) << 20)
28 
29 #define AD5686_ADDR_DAC(chan)		(0x1 << (chan))
30 #define AD5686_ADDR_ALL_DAC			0xF
31 
32 #define AD5686_CMD_NOOP				0x0
33 #define AD5686_CMD_WRITE_INPUT_N		0x1
34 #define AD5686_CMD_UPDATE_DAC_N			0x2
35 #define AD5686_CMD_WRITE_INPUT_N_UPDATE_N	0x3
36 #define AD5686_CMD_POWERDOWN_DAC		0x4
37 #define AD5686_CMD_LDAC_MASK			0x5
38 #define AD5686_CMD_RESET			0x6
39 #define AD5686_CMD_INTERNAL_REFER_SETUP		0x7
40 #define AD5686_CMD_DAISY_CHAIN_ENABLE		0x8
41 #define AD5686_CMD_READBACK_ENABLE		0x9
42 
43 #define AD5686_LDAC_PWRDN_NONE			0x0
44 #define AD5686_LDAC_PWRDN_1K			0x1
45 #define AD5686_LDAC_PWRDN_100K			0x2
46 #define AD5686_LDAC_PWRDN_3STATE		0x3
47 
48 /**
49  * struct ad5686_chip_info - chip specific information
50  * @int_vref_mv:	AD5620/40/60: the internal reference voltage
51  * @channel:		channel specification
52 */
53 
54 struct ad5686_chip_info {
55 	u16				int_vref_mv;
56 	struct iio_chan_spec		channel[AD5686_DAC_CHANNELS];
57 };
58 
59 /**
60  * struct ad5446_state - driver instance specific data
61  * @spi:		spi_device
62  * @chip_info:		chip model specific constants, available modes etc
63  * @reg:		supply regulator
64  * @vref_mv:		actual reference voltage used
65  * @pwr_down_mask:	power down mask
66  * @pwr_down_mode:	current power down mode
67  * @data:		spi transfer buffers
68  */
69 
70 struct ad5686_state {
71 	struct spi_device		*spi;
72 	const struct ad5686_chip_info	*chip_info;
73 	struct regulator		*reg;
74 	unsigned short			vref_mv;
75 	unsigned			pwr_down_mask;
76 	unsigned			pwr_down_mode;
77 	/*
78 	 * DMA (thus cache coherency maintenance) requires the
79 	 * transfer buffers to live in their own cache lines.
80 	 */
81 
82 	union {
83 		u32 d32;
84 		u8 d8[4];
85 	} data[3] ____cacheline_aligned;
86 };
87 
88 /**
89  * ad5686_supported_device_ids:
90  */
91 
92 enum ad5686_supported_device_ids {
93 	ID_AD5684,
94 	ID_AD5685,
95 	ID_AD5686,
96 };
97 #define AD5868_CHANNEL(chan, bits, shift) {			\
98 		.type = IIO_VOLTAGE,				\
99 		.indexed = 1,					\
100 		.output = 1,					\
101 		.channel = chan,				\
102 		.info_mask = IIO_CHAN_INFO_SCALE_SHARED_BIT,	\
103 		.address = AD5686_ADDR_DAC(chan),			\
104 		.scan_type = IIO_ST('u', bits, 16, shift)	\
105 }
106 static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
107 	[ID_AD5684] = {
108 		.channel[0] = AD5868_CHANNEL(0, 12, 4),
109 		.channel[1] = AD5868_CHANNEL(1, 12, 4),
110 		.channel[2] = AD5868_CHANNEL(2, 12, 4),
111 		.channel[3] = AD5868_CHANNEL(3, 12, 4),
112 		.int_vref_mv = 2500,
113 	},
114 	[ID_AD5685] = {
115 		.channel[0] = AD5868_CHANNEL(0, 14, 2),
116 		.channel[1] = AD5868_CHANNEL(1, 14, 2),
117 		.channel[2] = AD5868_CHANNEL(2, 14, 2),
118 		.channel[3] = AD5868_CHANNEL(3, 14, 2),
119 		.int_vref_mv = 2500,
120 	},
121 	[ID_AD5686] = {
122 		.channel[0] = AD5868_CHANNEL(0, 16, 0),
123 		.channel[1] = AD5868_CHANNEL(1, 16, 0),
124 		.channel[2] = AD5868_CHANNEL(2, 16, 0),
125 		.channel[3] = AD5868_CHANNEL(3, 16, 0),
126 		.int_vref_mv = 2500,
127 	},
128 };
129 
ad5686_spi_write(struct ad5686_state * st,u8 cmd,u8 addr,u16 val,u8 shift)130 static int ad5686_spi_write(struct ad5686_state *st,
131 			     u8 cmd, u8 addr, u16 val, u8 shift)
132 {
133 	val <<= shift;
134 
135 	st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
136 			      AD5686_ADDR(addr) |
137 			      val);
138 
139 	return spi_write(st->spi, &st->data[0].d8[1], 3);
140 }
141 
ad5686_spi_read(struct ad5686_state * st,u8 addr)142 static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
143 {
144 	struct spi_transfer t[] = {
145 		{
146 			.tx_buf = &st->data[0].d8[1],
147 			.len = 3,
148 			.cs_change = 1,
149 		}, {
150 			.tx_buf = &st->data[1].d8[1],
151 			.rx_buf = &st->data[2].d8[1],
152 			.len = 3,
153 		},
154 	};
155 	struct spi_message m;
156 	int ret;
157 
158 	spi_message_init(&m);
159 	spi_message_add_tail(&t[0], &m);
160 	spi_message_add_tail(&t[1], &m);
161 
162 	st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
163 			      AD5686_ADDR(addr));
164 	st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
165 
166 	ret = spi_sync(st->spi, &m);
167 	if (ret < 0)
168 		return ret;
169 
170 	return be32_to_cpu(st->data[2].d32);
171 }
172 
ad5686_read_powerdown_mode(struct device * dev,struct device_attribute * attr,char * buf)173 static ssize_t ad5686_read_powerdown_mode(struct device *dev,
174 				      struct device_attribute *attr, char *buf)
175 {
176 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
177 	struct ad5686_state *st = iio_priv(indio_dev);
178 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
179 
180 	char mode[][15] = {"", "1kohm_to_gnd", "100kohm_to_gnd", "three_state"};
181 
182 	return sprintf(buf, "%s\n", mode[(st->pwr_down_mode >>
183 					 (this_attr->address * 2)) & 0x3]);
184 }
185 
ad5686_write_powerdown_mode(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)186 static ssize_t ad5686_write_powerdown_mode(struct device *dev,
187 				       struct device_attribute *attr,
188 				       const char *buf, size_t len)
189 {
190 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
191 	struct ad5686_state *st = iio_priv(indio_dev);
192 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
193 	unsigned mode;
194 
195 	if (sysfs_streq(buf, "1kohm_to_gnd"))
196 		mode = AD5686_LDAC_PWRDN_1K;
197 	else if (sysfs_streq(buf, "100kohm_to_gnd"))
198 		mode = AD5686_LDAC_PWRDN_100K;
199 	else if (sysfs_streq(buf, "three_state"))
200 		mode = AD5686_LDAC_PWRDN_3STATE;
201 	else
202 		return  -EINVAL;
203 
204 	st->pwr_down_mode &= ~(0x3 << (this_attr->address * 2));
205 	st->pwr_down_mode |= (mode << (this_attr->address * 2));
206 
207 	return len;
208 }
209 
ad5686_read_dac_powerdown(struct device * dev,struct device_attribute * attr,char * buf)210 static ssize_t ad5686_read_dac_powerdown(struct device *dev,
211 					   struct device_attribute *attr,
212 					   char *buf)
213 {
214 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
215 	struct ad5686_state *st = iio_priv(indio_dev);
216 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
217 
218 	return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
219 			(0x3 << (this_attr->address * 2))));
220 }
221 
ad5686_write_dac_powerdown(struct device * dev,struct device_attribute * attr,const char * buf,size_t len)222 static ssize_t ad5686_write_dac_powerdown(struct device *dev,
223 					    struct device_attribute *attr,
224 					    const char *buf, size_t len)
225 {
226 	bool readin;
227 	int ret;
228 	struct iio_dev *indio_dev = dev_get_drvdata(dev);
229 	struct ad5686_state *st = iio_priv(indio_dev);
230 	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
231 
232 	ret = strtobool(buf, &readin);
233 	if (ret)
234 		return ret;
235 
236 	if (readin == true)
237 		st->pwr_down_mask |= (0x3 << (this_attr->address * 2));
238 	else
239 		st->pwr_down_mask &= ~(0x3 << (this_attr->address * 2));
240 
241 	ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
242 			       st->pwr_down_mask & st->pwr_down_mode, 0);
243 
244 	return ret ? ret : len;
245 }
246 
247 static IIO_CONST_ATTR(out_voltage_powerdown_mode_available,
248 			"1kohm_to_gnd 100kohm_to_gnd three_state");
249 
250 #define IIO_DEV_ATTR_DAC_POWERDOWN_MODE(_num)				\
251 	IIO_DEVICE_ATTR(out_voltage##_num##_powerdown_mode,		\
252 			S_IRUGO | S_IWUSR,				\
253 			ad5686_read_powerdown_mode,			\
254 			ad5686_write_powerdown_mode, _num)
255 
256 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(0);
257 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(1);
258 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(2);
259 static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(3);
260 
261 #define IIO_DEV_ATTR_DAC_POWERDOWN(_num)				\
262 	IIO_DEVICE_ATTR(out_voltage##_num##_powerdown,			\
263 			S_IRUGO | S_IWUSR,				\
264 			ad5686_read_dac_powerdown,			\
265 			ad5686_write_dac_powerdown, _num)
266 
267 static IIO_DEV_ATTR_DAC_POWERDOWN(0);
268 static IIO_DEV_ATTR_DAC_POWERDOWN(1);
269 static IIO_DEV_ATTR_DAC_POWERDOWN(2);
270 static IIO_DEV_ATTR_DAC_POWERDOWN(3);
271 
272 static struct attribute *ad5686_attributes[] = {
273 	&iio_dev_attr_out_voltage0_powerdown.dev_attr.attr,
274 	&iio_dev_attr_out_voltage1_powerdown.dev_attr.attr,
275 	&iio_dev_attr_out_voltage2_powerdown.dev_attr.attr,
276 	&iio_dev_attr_out_voltage3_powerdown.dev_attr.attr,
277 	&iio_dev_attr_out_voltage0_powerdown_mode.dev_attr.attr,
278 	&iio_dev_attr_out_voltage1_powerdown_mode.dev_attr.attr,
279 	&iio_dev_attr_out_voltage2_powerdown_mode.dev_attr.attr,
280 	&iio_dev_attr_out_voltage3_powerdown_mode.dev_attr.attr,
281 	&iio_const_attr_out_voltage_powerdown_mode_available.dev_attr.attr,
282 	NULL,
283 };
284 
285 static const struct attribute_group ad5686_attribute_group = {
286 	.attrs = ad5686_attributes,
287 };
288 
ad5686_read_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int * val,int * val2,long m)289 static int ad5686_read_raw(struct iio_dev *indio_dev,
290 			   struct iio_chan_spec const *chan,
291 			   int *val,
292 			   int *val2,
293 			   long m)
294 {
295 	struct ad5686_state *st = iio_priv(indio_dev);
296 	unsigned long scale_uv;
297 	int ret;
298 
299 	switch (m) {
300 	case 0:
301 		mutex_lock(&indio_dev->mlock);
302 		ret = ad5686_spi_read(st, chan->address);
303 		mutex_unlock(&indio_dev->mlock);
304 		if (ret < 0)
305 			return ret;
306 		*val = ret;
307 		return IIO_VAL_INT;
308 		break;
309 	case IIO_CHAN_INFO_SCALE:
310 		scale_uv = (st->vref_mv * 100000)
311 			>> (chan->scan_type.realbits);
312 		*val =  scale_uv / 100000;
313 		*val2 = (scale_uv % 100000) * 10;
314 		return IIO_VAL_INT_PLUS_MICRO;
315 
316 	}
317 	return -EINVAL;
318 }
319 
ad5686_write_raw(struct iio_dev * indio_dev,struct iio_chan_spec const * chan,int val,int val2,long mask)320 static int ad5686_write_raw(struct iio_dev *indio_dev,
321 			       struct iio_chan_spec const *chan,
322 			       int val,
323 			       int val2,
324 			       long mask)
325 {
326 	struct ad5686_state *st = iio_priv(indio_dev);
327 	int ret;
328 
329 	switch (mask) {
330 	case 0:
331 		if (val > (1 << chan->scan_type.realbits) || val < 0)
332 			return -EINVAL;
333 
334 		mutex_lock(&indio_dev->mlock);
335 		ret = ad5686_spi_write(st,
336 				 AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
337 				 chan->address,
338 				 val,
339 				 chan->scan_type.shift);
340 		mutex_unlock(&indio_dev->mlock);
341 		break;
342 	default:
343 		ret = -EINVAL;
344 	}
345 
346 	return ret;
347 }
348 
349 static const struct iio_info ad5686_info = {
350 	.read_raw = ad5686_read_raw,
351 	.write_raw = ad5686_write_raw,
352 	.attrs = &ad5686_attribute_group,
353 	.driver_module = THIS_MODULE,
354 };
355 
ad5686_probe(struct spi_device * spi)356 static int __devinit ad5686_probe(struct spi_device *spi)
357 {
358 	struct ad5686_state *st;
359 	struct iio_dev *indio_dev;
360 	int ret, regdone = 0, voltage_uv = 0;
361 
362 	indio_dev = iio_allocate_device(sizeof(*st));
363 	if (indio_dev == NULL)
364 		return  -ENOMEM;
365 
366 	st = iio_priv(indio_dev);
367 	spi_set_drvdata(spi, indio_dev);
368 
369 	st->reg = regulator_get(&spi->dev, "vcc");
370 	if (!IS_ERR(st->reg)) {
371 		ret = regulator_enable(st->reg);
372 		if (ret)
373 			goto error_put_reg;
374 
375 		voltage_uv = regulator_get_voltage(st->reg);
376 	}
377 
378 	st->chip_info =
379 		&ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
380 
381 	if (voltage_uv)
382 		st->vref_mv = voltage_uv / 1000;
383 	else
384 		st->vref_mv = st->chip_info->int_vref_mv;
385 
386 	st->spi = spi;
387 
388 	indio_dev->dev.parent = &spi->dev;
389 	indio_dev->name = spi_get_device_id(spi)->name;
390 	indio_dev->info = &ad5686_info;
391 	indio_dev->modes = INDIO_DIRECT_MODE;
392 	indio_dev->channels = st->chip_info->channel;
393 	indio_dev->num_channels = AD5686_DAC_CHANNELS;
394 
395 	regdone = 1;
396 	ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
397 				!!voltage_uv, 0);
398 	if (ret)
399 		goto error_disable_reg;
400 
401 	ret = iio_device_register(indio_dev);
402 	if (ret)
403 		goto error_disable_reg;
404 
405 	return 0;
406 
407 error_disable_reg:
408 	if (!IS_ERR(st->reg))
409 		regulator_disable(st->reg);
410 error_put_reg:
411 	if (!IS_ERR(st->reg))
412 		regulator_put(st->reg);
413 
414 	iio_free_device(indio_dev);
415 
416 	return ret;
417 }
418 
ad5686_remove(struct spi_device * spi)419 static int __devexit ad5686_remove(struct spi_device *spi)
420 {
421 	struct iio_dev *indio_dev = spi_get_drvdata(spi);
422 	struct ad5686_state *st = iio_priv(indio_dev);
423 
424 	iio_device_unregister(indio_dev);
425 	if (!IS_ERR(st->reg)) {
426 		regulator_disable(st->reg);
427 		regulator_put(st->reg);
428 	}
429 	iio_free_device(indio_dev);
430 
431 	return 0;
432 }
433 
434 static const struct spi_device_id ad5686_id[] = {
435 	{"ad5684", ID_AD5684},
436 	{"ad5685", ID_AD5685},
437 	{"ad5686", ID_AD5686},
438 	{}
439 };
440 MODULE_DEVICE_TABLE(spi, ad5686_id);
441 
442 static struct spi_driver ad5686_driver = {
443 	.driver = {
444 		   .name = "ad5686",
445 		   .owner = THIS_MODULE,
446 		   },
447 	.probe = ad5686_probe,
448 	.remove = __devexit_p(ad5686_remove),
449 	.id_table = ad5686_id,
450 };
451 module_spi_driver(ad5686_driver);
452 
453 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
454 MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
455 MODULE_LICENSE("GPL v2");
456